| /external/llvm/test/CodeGen/AMDGPU/ |
| D | rotl.i64.ll | 7 ; BOTH-DAG: s_lshr_b64
|
| D | rotr.i64.ll | 6 ; BOTH-DAG: s_lshr_b64
|
| D | select64.ll | 7 ; CHECK-NOT: s_lshr_b64
|
| D | cgp-bitfield-extract.ll | 175 ; GCN: s_lshr_b64 s{{\[}}[[LO:[0-9]+]]:{{[0-9]+}}], s{{\[[0-9]+:[0-9]+\]}}, 30
179 ; GCN: s_lshr_b64 s{{\[}}[[LO:[0-9]+]]:{{[0-9]+}}], s{{\[[0-9]+:[0-9]+\]}}, 30
|
| D | fceil64.ll | 17 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP1]]
|
| D | ftrunc.f64.ll | 29 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP1]]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | rotl.i64.ll | 7 ; BOTH-DAG: s_lshr_b64
|
| D | rotr.i64.ll | 6 ; BOTH-DAG: s_lshr_b64
|
| D | select64.ll | 7 ; CHECK-NOT: s_lshr_b64
|
| D | ftrunc.f64.ll | 29 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP1]]
|
| D | fceil64.ll | 19 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP0]]
|
| D | extract_vector_elt-i16.ll | 115 ; GCN: s_lshr_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s
|
| D | extract_vector_elt-f16.ll | 87 ; GCN: s_lshr_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}
|
| D | extract_vector_elt-i8.ll | 186 ; VI: s_lshr_b64 s{{\[}}[[EXTRACT_LO:[0-9]+]]:{{[0-9]+\]}}, [[VEC8]], [[SCALED_IDX]]
|
| /external/llvm/test/MC/AMDGPU/ |
| D | sop2.s | 119 s_lshr_b64 s[2:3], s[4:5], s6 label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | sop2.s | 125 s_lshr_b64 s[2:3], s[4:5], s6 label
|
| D | gfx7_asm_all.s | 18651 s_lshr_b64 s[10:11], s[2:3], s2 label
18654 s_lshr_b64 s[12:13], s[2:3], s2 label
18657 s_lshr_b64 s[102:103], s[2:3], s2 label
18660 s_lshr_b64 flat_scratch, s[2:3], s2 label
18663 s_lshr_b64 vcc, s[2:3], s2 label
18666 s_lshr_b64 tba, s[2:3], s2 label
18669 s_lshr_b64 tma, s[2:3], s2 label
18672 s_lshr_b64 ttmp[10:11], s[2:3], s2 label
18675 s_lshr_b64 exec, s[2:3], s2 label
18678 s_lshr_b64 s[10:11], s[4:5], s2 label
[all …]
|
| D | gfx8_asm_all.s | 19323 s_lshr_b64 s[10:11], s[2:3], s2 label
19326 s_lshr_b64 s[12:13], s[2:3], s2 label
19329 s_lshr_b64 s[100:101], s[2:3], s2 label
19332 s_lshr_b64 flat_scratch, s[2:3], s2 label
19335 s_lshr_b64 vcc, s[2:3], s2 label
19338 s_lshr_b64 tba, s[2:3], s2 label
19341 s_lshr_b64 tma, s[2:3], s2 label
19344 s_lshr_b64 ttmp[10:11], s[2:3], s2 label
19347 s_lshr_b64 exec, s[2:3], s2 label
19350 s_lshr_b64 s[10:11], s[4:5], s2 label
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop2_vi.txt | 60 # VI: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop2_vi.txt | 60 # VI: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SOPInstructions.td | 443 def S_LSHR_B64 : SOP2_64_32 <"s_lshr_b64",
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUAsmGFX7.rst | 446 s_lshr_b64 dst, src0, src1
|
| D | AMDGPUAsmGFX8.rst | 464 s_lshr_b64 dst, src0, src1
|
| D | AMDGPUAsmGFX9.rst | 611 s_lshr_b64 dst, src0, src1
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 287 defm S_LSHR_B64 : SOP2_64_32 <sop2<0x21, 0x1f>, "s_lshr_b64",
|