/external/llvm/test/CodeGen/AMDGPU/ |
D | sext-in-reg.ll | 26 ; SI: s_sext_i32_i8 [[EXTRACT:s[0-9]+]], [[VAL]] 62 ; SI: s_sext_i32_i8 [[EXTRACT:s[0-9]+]], [[VAL]] 315 ; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 316 ; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 332 ; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 333 ; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 334 ; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 335 ; SI: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 487 ; SI: s_sext_i32_i8 s{{[0-9]+}}, s{{[0-9]+}}
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D | smed3.ll | 381 ; GCN: s_sext_i32_i8 382 ; GCN: s_sext_i32_i8 383 ; GCN: s_sext_i32_i8
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D | min.ll | 61 ; SI: s_sext_i32_i8 62 ; SI: s_sext_i32_i8
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D | sign_extend.ll | 67 ; GCN-DAG: s_sext_i32_i8 [[EXT0:s[0-9]+]], [[VAL]]
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D | load-constant-i8.ll | 196 ; GCN-DAG: s_sext_i32_i8 232 ; GCN-DAG: s_sext_i32_i8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | sext-in-reg.ll | 27 ; GCN: s_sext_i32_i8 [[EXTRACT:s[0-9]+]], [[VAL]] 63 ; GCN: s_sext_i32_i8 [[EXTRACT:s[0-9]+]], [[VAL]] 338 ; GCN: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 339 ; GCN: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 355 ; GCN: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 356 ; GCN: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 357 ; GCN: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 358 ; GCN: s_sext_i32_i8 {{s[0-9]+}}, {{s[0-9]+}} 621 ; SI: s_sext_i32_i8 [[SSEXT:s[0-9]+]], [[VAL]]
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D | smed3.ll | 384 ; GCN: s_sext_i32_i8 385 ; GCN: s_sext_i32_i8 386 ; GCN: s_sext_i32_i8
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D | sign_extend.ll | 110 ; GCN-DAG: s_sext_i32_i8 [[EXT0:s[0-9]+]], [[VAL]]
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D | min.ll | 65 ; GCN: s_sext_i32_i8 66 ; GCN: s_sext_i32_i8
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D | load-constant-i8.ll | 226 ; GCN-DAG: s_sext_i32_i8 277 ; GCN-DAG: s_sext_i32_i8
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D | llvm.amdgcn.sbfe.ll | 458 ; GCN: s_sext_i32_i8 s{{[0-9]+}}, s{{[0-9]+}}
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D | kernel-args.ll | 59 ; HSA-VI: s_sext_i32_i8 s{{[0-9]+}}, [[VAL]]
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/external/llvm/test/MC/AMDGPU/ |
D | sop1.s | 139 s_sext_i32_i8 s1, s2 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | sop1.s | 142 s_sext_i32_i8 s1, s2 label
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D | gfx7_asm_all.s | 12372 s_sext_i32_i8 s5, s1 label 12375 s_sext_i32_i8 s103, s1 label 12378 s_sext_i32_i8 flat_scratch_lo, s1 label 12381 s_sext_i32_i8 flat_scratch_hi, s1 label 12384 s_sext_i32_i8 vcc_lo, s1 label 12387 s_sext_i32_i8 vcc_hi, s1 label 12390 s_sext_i32_i8 tba_lo, s1 label 12393 s_sext_i32_i8 tba_hi, s1 label 12396 s_sext_i32_i8 tma_lo, s1 label 12399 s_sext_i32_i8 tma_hi, s1 label [all …]
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D | gfx8_asm_all.s | 12987 s_sext_i32_i8 s5, s1 label 12990 s_sext_i32_i8 s101, s1 label 12993 s_sext_i32_i8 flat_scratch_lo, s1 label 12996 s_sext_i32_i8 flat_scratch_hi, s1 label 12999 s_sext_i32_i8 vcc_lo, s1 label 13002 s_sext_i32_i8 vcc_hi, s1 label 13005 s_sext_i32_i8 tba_lo, s1 label 13008 s_sext_i32_i8 tba_hi, s1 label 13011 s_sext_i32_i8 tma_lo, s1 label 13014 s_sext_i32_i8 tma_hi, s1 label [all …]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop1_vi.txt | 96 # VI: s_sext_i32_i8 s1, s2 ; encoding: [0x02,0x16,0x81,0xbe]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop1_vi.txt | 105 # VI: s_sext_i32_i8 s1, s2 ; encoding: [0x02,0x16,0x81,0xbe]
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D | gfx8_dasm_all.txt | 9723 # CHECK: s_sext_i32_i8 s5, s1 ; encoding: [0x01,0x16,0x85,0xbe] 9726 # CHECK: s_sext_i32_i8 s101, s1 ; encoding: [0x01,0x16,0xe5,0xbe] 9729 # CHECK: s_sext_i32_i8 flat_scratch_lo, s1 ; encoding: [0x01,0x16,0xe6,0xbe] 9732 # CHECK: s_sext_i32_i8 flat_scratch_hi, s1 ; encoding: [0x01,0x16,0xe7,0xbe] 9735 # CHECK: s_sext_i32_i8 vcc_lo, s1 ; encoding: [0x01,0x16,0xea,0xbe] 9738 # CHECK: s_sext_i32_i8 vcc_hi, s1 ; encoding: [0x01,0x16,0xeb,0xbe] 9741 # CHECK: s_sext_i32_i8 tba_lo, s1 ; encoding: [0x01,0x16,0xec,0xbe] 9744 # CHECK: s_sext_i32_i8 tba_hi, s1 ; encoding: [0x01,0x16,0xed,0xbe] 9747 # CHECK: s_sext_i32_i8 tma_lo, s1 ; encoding: [0x01,0x16,0xee,0xbe] 9750 # CHECK: s_sext_i32_i8 tma_hi, s1 ; encoding: [0x01,0x16,0xef,0xbe] [all …]
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D | gfx9_dasm_all.txt | 10506 # CHECK: s_sext_i32_i8 s5, s1 ; encoding: [0x01,0x16,0x85,0xbe] 10509 # CHECK: s_sext_i32_i8 s101, s1 ; encoding: [0x01,0x16,0xe5,0xbe] 10512 # CHECK: s_sext_i32_i8 flat_scratch_lo, s1 ; encoding: [0x01,0x16,0xe6,0xbe] 10515 # CHECK: s_sext_i32_i8 flat_scratch_hi, s1 ; encoding: [0x01,0x16,0xe7,0xbe] 10518 # CHECK: s_sext_i32_i8 vcc_lo, s1 ; encoding: [0x01,0x16,0xea,0xbe] 10521 # CHECK: s_sext_i32_i8 vcc_hi, s1 ; encoding: [0x01,0x16,0xeb,0xbe] 10524 # CHECK: s_sext_i32_i8 m0, s1 ; encoding: [0x01,0x16,0xfc,0xbe] 10527 # CHECK: s_sext_i32_i8 exec_lo, s1 ; encoding: [0x01,0x16,0xfe,0xbe] 10530 # CHECK: s_sext_i32_i8 exec_hi, s1 ; encoding: [0x01,0x16,0xff,0xbe] 10533 # CHECK: s_sext_i32_i8 s5, s101 ; encoding: [0x65,0x16,0x85,0xbe] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 187 def S_SEXT_I32_I8 : SOP1_32 <"s_sext_i32_i8",
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 412 s_sext_i32_i8 dst, src0
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D | AMDGPUAsmGFX8.rst | 430 s_sext_i32_i8 dst, src0
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D | AMDGPUAsmGFX9.rst | 573 s_sext_i32_i8 dst, src0
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 145 defm S_SEXT_I32_I8 : SOP1_32 <sop1<0x19, 0x16>, "s_sext_i32_i8",
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