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Searched refs:sctx (Results 1 – 25 of 46) sorted by relevance

12

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_cp_dma.c46 static inline unsigned cp_dma_max_byte_count(struct si_context *sctx) in cp_dma_max_byte_count() argument
48 unsigned max = sctx->b.chip_class >= GFX9 ? in cp_dma_max_byte_count()
61 static void si_emit_cp_dma(struct si_context *sctx, uint64_t dst_va, in si_emit_cp_dma() argument
65 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_cp_dma()
69 assert(size <= cp_dma_max_byte_count(sctx)); in si_emit_cp_dma()
71 if (sctx->b.chip_class >= GFX9) in si_emit_cp_dma()
80 if (sctx->b.chip_class >= GFX9) in si_emit_cp_dma()
90 if (sctx->b.chip_class >= GFX9 && !(flags & CP_DMA_CLEAR) && in si_emit_cp_dma()
101 if (sctx->b.chip_class >= CIK) { in si_emit_cp_dma()
131 static unsigned get_flush_flags(struct si_context *sctx, enum r600_coherency coher) in get_flush_flags() argument
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Dsi_pipe.c108 struct si_context *sctx = (struct si_context *)context; in si_destroy_context() local
118 si_release_all_descriptors(sctx); in si_destroy_context()
120 pipe_resource_reference(&sctx->esgs_ring, NULL); in si_destroy_context()
121 pipe_resource_reference(&sctx->gsvs_ring, NULL); in si_destroy_context()
122 pipe_resource_reference(&sctx->tf_ring, NULL); in si_destroy_context()
123 pipe_resource_reference(&sctx->tess_offchip_ring, NULL); in si_destroy_context()
124 pipe_resource_reference(&sctx->null_const_buf.buffer, NULL); in si_destroy_context()
125 r600_resource_reference(&sctx->border_color_buffer, NULL); in si_destroy_context()
126 free(sctx->border_color_table); in si_destroy_context()
127 r600_resource_reference(&sctx->scratch_buffer, NULL); in si_destroy_context()
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Dsi_state_draw.c95 static void si_emit_derived_tess_state(struct si_context *sctx, in si_emit_derived_tess_state() argument
99 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_derived_tess_state()
105 sctx->tcs_shader.cso ? sctx->tcs_shader.cso : sctx->tes_shader.cso; in si_emit_derived_tess_state()
106 unsigned tess_uses_primid = sctx->ia_multi_vgt_param_key.u.tess_uses_prim_id; in si_emit_derived_tess_state()
107 bool has_primid_instancing_bug = sctx->b.chip_class == SI && in si_emit_derived_tess_state()
108 sctx->b.screen->info.max_se == 1; in si_emit_derived_tess_state()
109 unsigned tes_sh_base = sctx->shader_pointers.sh_base[PIPE_SHADER_TESS_EVAL]; in si_emit_derived_tess_state()
120 if (sctx->b.chip_class >= GFX9) { in si_emit_derived_tess_state()
121 if (sctx->tcs_shader.cso) in si_emit_derived_tess_state()
122 ls_current = sctx->tcs_shader.current; in si_emit_derived_tess_state()
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Dsi_state_streamout.c31 static void si_set_streamout_enable(struct si_context *sctx, bool enable);
45 struct si_context *sctx = (struct si_context *)ctx; in si_create_so_target() local
54 u_suballocator_alloc(sctx->b.allocator_zeroed_memory, 4, 4, in si_create_so_target()
82 void si_streamout_buffers_dirty(struct si_context *sctx) in si_streamout_buffers_dirty() argument
84 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 si_mark_atom_dirty(sctx, &sctx->streamout.begin_atom); in si_streamout_buffers_dirty()
88 si_set_streamout_enable(sctx, true); in si_streamout_buffers_dirty()
96 struct si_context *sctx = (struct si_context *)ctx; in si_set_streamout_targets() local
97 struct si_buffer_resources *buffers = &sctx->rw_buffers; in si_set_streamout_targets()
98 struct si_descriptors *descs = &sctx->descriptors[SI_DESCS_RW_BUFFERS]; in si_set_streamout_targets()
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Dsi_descriptors.c135 static bool si_upload_descriptors(struct si_context *sctx, in si_upload_descriptors() argument
159 si_mark_atom_dirty(sctx, &sctx->shader_pointers.atom); in si_upload_descriptors()
165 u_upload_alloc(sctx->b.b.const_uploader, first_slot_offset, upload_size, in si_upload_descriptors()
166 si_optimal_tcc_alignment(sctx, upload_size), in si_upload_descriptors()
178 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, desc->buffer, in si_upload_descriptors()
185 si_mark_atom_dirty(sctx, &sctx->shader_pointers.atom); in si_upload_descriptors()
190 si_descriptors_begin_new_cs(struct si_context *sctx, struct si_descriptors *desc) in si_descriptors_begin_new_cs() argument
195 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, desc->buffer, in si_descriptors_begin_new_cs()
221 si_sampler_and_image_descriptors(struct si_context *sctx, unsigned shader) in si_sampler_and_image_descriptors() argument
223 return &sctx->descriptors[si_sampler_and_image_descriptors_idx(shader)]; in si_sampler_and_image_descriptors()
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Dsi_state_shaders.c1124 static unsigned si_get_alpha_test_func(struct si_context *sctx) in si_get_alpha_test_func() argument
1127 if (sctx->queued.named.dsa) in si_get_alpha_test_func()
1128 return sctx->queued.named.dsa->alpha_func; in si_get_alpha_test_func()
1133 static void si_shader_selector_key_vs(struct si_context *sctx, in si_shader_selector_key_vs() argument
1138 if (!sctx->vertex_elements) in si_shader_selector_key_vs()
1142 sctx->vertex_elements->instance_divisor_is_one; in si_shader_selector_key_vs()
1144 sctx->vertex_elements->instance_divisor_is_fetched; in si_shader_selector_key_vs()
1152 sctx->vertex_elements->count); in si_shader_selector_key_vs()
1153 memcpy(key->mono.vs_fix_fetch, sctx->vertex_elements->fix_fetch, count); in si_shader_selector_key_vs()
1156 static void si_shader_selector_key_hw_vs(struct si_context *sctx, in si_shader_selector_key_hw_vs() argument
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Dsi_blit.c45 struct si_context *sctx = (struct si_context *)ctx; in si_blitter_begin() local
47 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso); in si_blitter_begin()
48 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso); in si_blitter_begin()
49 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso); in si_blitter_begin()
50 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso); in si_blitter_begin()
51 util_blitter_save_so_targets(sctx->blitter, sctx->streamout.num_targets, in si_blitter_begin()
52 (struct pipe_stream_output_target**)sctx->streamout.targets); in si_blitter_begin()
53 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer); in si_blitter_begin()
56 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend); in si_blitter_begin()
57 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa); in si_blitter_begin()
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Dsi_compute.c152 struct si_context *sctx = (struct si_context *)ctx; in si_create_compute_state() local
172 program->compiler_ctx_state.debug = sctx->debug; in si_create_compute_state()
173 program->compiler_ctx_state.is_debug_context = sctx->is_debug; in si_create_compute_state()
179 (sctx->debug.debug_message && !sctx->debug.async) || in si_create_compute_state()
180 sctx->is_debug || in si_create_compute_state()
194 u_async_debug_drain(&async_debug, &sctx->debug); in si_create_compute_state()
212 si_shader_dump(sctx->screen, &program->shader, &sctx->debug, in si_create_compute_state()
214 if (si_shader_binary_upload(sctx->screen, &program->shader) < 0) { in si_create_compute_state()
226 struct si_context *sctx = (struct si_context*)ctx; in si_bind_compute_state() local
229 sctx->cs_shader_state.program = program; in si_bind_compute_state()
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Dsi_state.c39 si_init_external_atom(struct si_context *sctx, struct r600_atom *atom, in si_init_external_atom() argument
42 atom->id = list_elem - sctx->atoms.array; in si_init_external_atom()
47 void si_init_atom(struct si_context *sctx, struct r600_atom *atom, in si_init_atom() argument
52 atom->id = list_elem - sctx->atoms.array; in si_init_atom()
87 static void si_emit_cb_render_state(struct si_context *sctx, struct r600_atom *atom) in si_emit_cb_render_state() argument
89 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_cb_render_state()
90 struct si_state_blend *blend = sctx->queued.named.blend; in si_emit_cb_render_state()
93 uint32_t cb_target_mask = sctx->framebuffer.colorbuf_enabled_4bit; in si_emit_cb_render_state()
106 sctx->ps_shader.cso && in si_emit_cb_render_state()
107 (sctx->ps_shader.cso->info.colors_written & 0x3) != 0x3) in si_emit_cb_render_state()
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Dsi_state.h299 #define si_pm4_state_changed(sctx, member) \ argument
300 ((sctx)->queued.named.member != (sctx)->emitted.named.member)
302 #define si_pm4_state_enabled_and_changed(sctx, member) \ argument
303 ((sctx)->queued.named.member && si_pm4_state_changed(sctx, member))
305 #define si_pm4_bind_state(sctx, member, value) \ argument
307 (sctx)->queued.named.member = (value); \
308 (sctx)->dirty_states |= 1 << si_pm4_block_idx(member); \
311 #define si_pm4_delete_state(sctx, member, value) \ argument
313 if ((sctx)->queued.named.member == (value)) { \
314 (sctx)->queued.named.member = NULL; \
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Dsi_debug.c35 static void si_dump_bo_list(struct si_context *sctx,
225 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f, in si_dump_mmapped_reg() argument
228 struct radeon_winsys *ws = sctx->b.ws; in si_dump_mmapped_reg()
232 ac_dump_reg(f, sctx->b.chip_class, offset, value, ~0); in si_dump_mmapped_reg()
235 static void si_dump_debug_registers(struct si_context *sctx, FILE *f) in si_dump_debug_registers() argument
237 if (sctx->screen->info.drm_major == 2 && in si_dump_debug_registers()
238 sctx->screen->info.drm_minor < 42) in si_dump_debug_registers()
242 si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS); in si_dump_debug_registers()
245 if (sctx->screen->info.drm_major < 3 || in si_dump_debug_registers()
246 sctx->screen->info.drm_minor < 1) { in si_dump_debug_registers()
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Dsi_state_binning.c67 static struct uvec2 si_get_color_bin_size(struct si_context *sctx, in si_get_color_bin_size() argument
70 unsigned nr_samples = sctx->framebuffer.nr_samples; in si_get_color_bin_size()
74 for (unsigned i = 0; i < sctx->framebuffer.state.nr_cbufs; i++) { in si_get_color_bin_size()
79 (struct r600_texture*)sctx->framebuffer.state.cbufs[i]->texture; in si_get_color_bin_size()
85 if (sctx->ps_iter_samples >= 2) in si_get_color_bin_size()
189 return si_find_bin_size(sctx->screen, table, sum); in si_get_color_bin_size()
192 static struct uvec2 si_get_depth_bin_size(struct si_context *sctx) in si_get_depth_bin_size() argument
194 struct si_state_dsa *dsa = sctx->queued.named.dsa; in si_get_depth_bin_size()
196 if (!sctx->framebuffer.state.zsbuf || in si_get_depth_bin_size()
204 (struct r600_texture*)sctx->framebuffer.state.zsbuf->texture; in si_get_depth_bin_size()
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Dsi_clear.c193 void vi_dcc_clear_level(struct si_context *sctx, in vi_dcc_clear_level() argument
210 if (sctx->b.chip_class >= GFX9) { in vi_dcc_clear_level()
232 si_clear_buffer(&sctx->b.b, dcc_buffer, dcc_offset, clear_size, in vi_dcc_clear_level()
344 static void si_do_fast_color_clear(struct si_context *sctx, in si_do_fast_color_clear() argument
348 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state; in si_do_fast_color_clear()
356 if (sctx->b.render_cond) in si_do_fast_color_clear()
398 if (sctx->b.chip_class == CIK && in si_do_fast_color_clear()
400 sctx->screen->info.drm_major == 2 && in si_do_fast_color_clear()
401 sctx->screen->info.drm_minor < 38) { in si_do_fast_color_clear()
408 if (sctx->b.chip_class >= VI && in si_do_fast_color_clear()
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Dsi_pipe.h633 void cik_init_sdma_functions(struct si_context *sctx);
646 void si_init_blit_functions(struct si_context *sctx);
647 void si_decompress_textures(struct si_context *sctx, unsigned shader_mask);
657 void vi_dcc_clear_level(struct si_context *sctx,
660 void si_init_clear_functions(struct si_context *sctx);
683 void si_copy_buffer(struct si_context *sctx,
687 void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf,
689 void cik_emit_prefetch_L2(struct si_context *sctx);
690 void si_init_cp_dma_functions(struct si_context *sctx);
694 void si_log_hw_flush(struct si_context *sctx);
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Dcik_sdma.c75 struct si_context *sctx = (struct si_context *)ctx; in cik_sdma_clear_buffer() local
76 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_clear_buffer()
95 si_need_dma_space(&sctx->b, ncopy * 5, rdst, NULL); in cik_sdma_clear_buffer()
104 radeon_emit(cs, sctx->b.chip_class >= GFX9 ? csize - 1 : csize); in cik_sdma_clear_buffer()
116 static unsigned encode_tile_info(struct si_context *sctx, in encode_tile_info() argument
120 struct radeon_info *info = &sctx->screen->info; in encode_tile_info()
138 static bool cik_sdma_copy_texture(struct si_context *sctx, in cik_sdma_copy_texture() argument
146 struct radeon_info *info = &sctx->screen->info; in cik_sdma_copy_texture()
194 if (!si_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty, in cik_sdma_copy_texture()
224 (sctx->b.chip_class != CIK || in cik_sdma_copy_texture()
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Dsi_pm4.c109 void si_pm4_free_state(struct si_context *sctx, in si_pm4_free_state() argument
116 if (idx != ~0 && sctx->emitted.array[idx] == state) { in si_pm4_free_state()
117 sctx->emitted.array[idx] = NULL; in si_pm4_free_state()
124 void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state) in si_pm4_emit() argument
126 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_pm4_emit()
129 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, state->bo[i], in si_pm4_emit()
138 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, ib, in si_pm4_emit()
149 void si_pm4_reset_emitted(struct si_context *sctx) in si_pm4_reset_emitted() argument
151 memset(&sctx->emitted, 0, sizeof(sctx->emitted)); in si_pm4_reset_emitted()
152 sctx->dirty_states |= u_bit_consecutive(0, SI_NUM_STATES); in si_pm4_reset_emitted()
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Dsi_state_msaa.c190 void si_init_msaa_functions(struct si_context *sctx) in si_init_msaa_functions() argument
194 sctx->b.b.get_sample_position = si_get_sample_position; in si_init_msaa_functions()
196 si_get_sample_position(&sctx->b.b, 1, 0, sctx->sample_locations_1x[0]); in si_init_msaa_functions()
199 si_get_sample_position(&sctx->b.b, 2, i, sctx->sample_locations_2x[i]); in si_init_msaa_functions()
201 si_get_sample_position(&sctx->b.b, 4, i, sctx->sample_locations_4x[i]); in si_init_msaa_functions()
203 si_get_sample_position(&sctx->b.b, 8, i, sctx->sample_locations_8x[i]); in si_init_msaa_functions()
205 si_get_sample_position(&sctx->b.b, 16, i, sctx->sample_locations_16x[i]); in si_init_msaa_functions()
Dsi_pm4.h65 void si_pm4_upload_indirect_buffer(struct si_context *sctx,
69 void si_pm4_free_state(struct si_context *sctx,
73 void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state);
74 void si_pm4_reset_emitted(struct si_context *sctx);
Dsi_dma.c84 struct si_context *sctx = (struct si_context *)ctx; in si_dma_clear_buffer() local
85 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in si_dma_clear_buffer()
104 si_need_dma_space(&sctx->b, ncopy * 4, rdst, NULL); in si_dma_clear_buffer()
226 struct si_context *sctx = (struct si_context *)ctx; in si_dma_copy() local
234 if (sctx->b.dma.cs == NULL || in si_dma_copy()
241 si_dma_copy_buffer(sctx, dst, src, dst_x, src_box->x, src_box->width); in si_dma_copy()
261 !si_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty, in si_dma_copy()
309 si_dma_copy_buffer(sctx, dst, src, dst_offset, src_offset, in si_dma_copy()
312 si_dma_copy_tile(sctx, dst, dst_level, dst_x, dst_y, dst_z, in si_dma_copy()
324 void si_init_dma_functions(struct si_context *sctx) in si_init_dma_functions() argument
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/external/u-boot/tools/
Dmxsimage.c323 struct sb_section_ctx *sctx = ictx->sect_head; in sb_encrypt_sb_sections_header() local
328 while (sctx) { in sb_encrypt_sb_sections_header()
329 shdr = &sctx->payload; in sb_encrypt_sb_sections_header()
336 sctx = sctx->sect; in sb_encrypt_sb_sections_header()
397 struct sb_section_ctx *sctx = ictx->sect_head; in sb_encrypt_image() local
399 while (sctx) { in sb_encrypt_image()
400 cctx = sctx->cmd_head; in sb_encrypt_image()
421 sctx = sctx->sect; in sb_encrypt_image()
712 struct sb_section_ctx *sctx; in sb_build_section() local
719 sctx = calloc(1, sizeof(*sctx)); in sb_build_section()
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/external/ipsec-tools/src/racoon/
Dproposal.c320 if (*pp1->sctx.ctx_str && !(*pp2->sctx.ctx_str)) {
325 if (!(*pp1->sctx.ctx_str) && *pp2->sctx.ctx_str) {
331 if (*pp1->sctx.ctx_str && *pp2->sctx.ctx_str) {
332 if (pp1->sctx.ctx_doi == pp2->sctx.ctx_doi)
333 newpp->sctx.ctx_doi = pp1->sctx.ctx_doi;
337 pp2->sctx.ctx_doi, pp1->sctx.ctx_doi);
341 if (pp1->sctx.ctx_alg == pp2->sctx.ctx_alg)
342 newpp->sctx.ctx_alg = pp1->sctx.ctx_alg;
346 pp2->sctx.ctx_alg, pp1->sctx.ctx_alg);
350 if ((pp1->sctx.ctx_strlen != pp2->sctx.ctx_strlen) ||
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Dsecurity.c168 iph2->proposal->sctx.ctx_doi = spidx.sec_ctx.ctx_doi;
169 iph2->proposal->sctx.ctx_alg = spidx.sec_ctx.ctx_alg;
170 iph2->proposal->sctx.ctx_strlen = spidx.sec_ctx.ctx_strlen;
171 memcpy(iph2->proposal->sctx.ctx_str, spidx.sec_ctx.ctx_str,
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_core.cpp50 sb_context *sctx = new sb_context(); in r600_sb_context_create() local
52 if (sctx->init(rctx->isa, translate_chip(rctx->b.family), in r600_sb_context_create()
54 delete sctx; in r600_sb_context_create()
55 sctx = NULL; in r600_sb_context_create()
70 return sctx; in r600_sb_context_create()
73 void r600_sb_context_destroy(void * sctx) { in r600_sb_context_destroy() argument
74 if (sctx) { in r600_sb_context_destroy()
75 sb_context *ctx = static_cast<sb_context*>(sctx); in r600_sb_context_destroy()
/external/compiler-rt/lib/tsan/rtl/
Dtsan_interceptors.cc471 ThreadSignalContext *sctx = SigCtx(thr); in SetJmp() local
472 buf->int_signal_send = sctx ? sctx->int_signal_send : 0; in SetJmp()
473 buf->in_blocking_func = sctx ? in SetJmp()
474 atomic_load(&sctx->in_blocking_func, memory_order_relaxed) : in SetJmp()
500 ThreadSignalContext *sctx = SigCtx(thr); in LongJmp() local
501 if (sctx) { in LongJmp()
502 sctx->int_signal_send = buf->int_signal_send; in LongJmp()
503 atomic_store(&sctx->in_blocking_func, buf->in_blocking_func, in LongJmp()
836 ThreadSignalContext *sctx = thr->signal_ctx; in DestroyThreadState() local
837 if (sctx) { in DestroyThreadState()
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/external/boringssl/src/crypto/evp/
Dp_rsa.c118 RSA_PKEY_CTX *dctx, *sctx; in pkey_rsa_copy() local
122 sctx = src->data; in pkey_rsa_copy()
124 dctx->nbits = sctx->nbits; in pkey_rsa_copy()
125 if (sctx->pub_exp) { in pkey_rsa_copy()
126 dctx->pub_exp = BN_dup(sctx->pub_exp); in pkey_rsa_copy()
132 dctx->pad_mode = sctx->pad_mode; in pkey_rsa_copy()
133 dctx->md = sctx->md; in pkey_rsa_copy()
134 dctx->mgf1md = sctx->mgf1md; in pkey_rsa_copy()
135 if (sctx->oaep_label) { in pkey_rsa_copy()
137 dctx->oaep_label = BUF_memdup(sctx->oaep_label, sctx->oaep_labellen); in pkey_rsa_copy()
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