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Searched refs:slwpcb (Results 1 – 10 of 10) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
Dlwp-x86_64.s7 slwpcb %rax label
8 # CHECK: slwpcb %rax
Dlwp.s9 slwpcb %eax label
10 # CHECK: slwpcb %eax
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dlwp-intrinsics.ll31 ; X86-NEXT: slwpcb %eax
36 ; X64-NEXT: slwpcb %rax
38 %1 = tail call i8* @llvm.x86.slwpcb()
119 declare i8* @llvm.x86.slwpcb() nounwind
Dlwp-schedule.ll25 ; GENERIC-NEXT: slwpcb %rax # sched: [100:0.33]
30 ; BDVER-NEXT: slwpcb %rax
32 %1 = tail call i8* @llvm.x86.slwpcb()
175 declare i8* @llvm.x86.slwpcb() nounwind
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/
Dx86-64.txt482 # CHECK: slwpcb %rax
Dx86-32.txt783 #CHECK: slwpcb %ecx
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrInfo.td2682 def SLWPCB : I<0x12, MRM1r, (outs GR32:$dst), (ins), "slwpcb\t$dst",
2687 def SLWPCB64 : I<0x12, MRM1r, (outs GR64:$dst), (ins), "slwpcb\t$dst",
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc6386 x86_slwpcb, // llvm.x86.slwpcb
DIntrinsicImpl.inc6412 "llvm.x86.slwpcb",
15290 3, // llvm.x86.slwpcb
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc6670 "kinit\004sldt\005sldtl\005sldtq\005sldtw\006slwpcb\004smsw\005smswl\005"
9266 { 7524 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
9267 { 7524 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
23816 { 7524 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
23817 { 7524 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },