/external/u-boot/board/sunxi/ |
D | dram_timings_sun4i.h | 7 .tpr1 = 0xa090, 13 .tpr1 = 0xa0a0, 19 .tpr1 = 0xa0a0, 25 .tpr1 = 0xa0a8, 31 .tpr1 = 0xa0b0, 37 .tpr1 = 0xa0b8, 43 .tpr1 = 0xa0c0, 49 .tpr1 = 0xa0c0, 55 .tpr1 = 0xa0d0, 61 .tpr1 = 0xa0d8, [all …]
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D | dram_sun4i_auto.c | 17 .tpr1 = 0x1090,
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D | dram_sun5i_auto.c | 20 .tpr1 = 0xa090,
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/external/u-boot/arch/arm/mach-at91/ |
D | mpddrc.c | 60 writel(mpddr_value->tpr1, &mpddr->tpr1); in ddr2_init() 169 writel(mpddr_value->tpr1, &mpddr->tpr1); in ddr3_init()
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/external/u-boot/arch/arm/mach-at91/include/mach/ |
D | atmel_mpddrc.h | 18 u32 tpr1; member 32 u32 tpr1; /* 0x10: Timing Parameter 1 Register */ member
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/external/u-boot/arch/arm/include/asm/arch-sunxi/ |
D | dram_sun4i.h | 21 u32 tpr1; /* 0x18 dram timing parameters register 1 */ member 80 u32 tpr1; member
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D | dram_sun8i_a23.h | 29 u32 tpr1; member
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/external/u-boot/arch/arm/mach-sunxi/ |
D | dram_sun8i_a23.c | 43 .tpr1 = 0x18082356, 131 writel((dram_para.tpr1 & 0x1fffffff), &mctl_phy->ptr3); in mctl_init()
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D | dram_sun4i.c | 639 writel(para->tpr1, &dram->tpr1); in dramc_init_helper()
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/external/u-boot/board/atmel/sama5d2_xplained/ |
D | sama5d2_xplained.c | 123 ddrc->tpr1 = (27 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET | in ddrc_conf()
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/external/u-boot/board/atmel/sama5d3_xplained/ |
D | sama5d3_xplained.c | 150 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/atmel/sama5d27_som1_ek/ |
D | sama5d27_som1_ek.c | 122 ddrc->tpr1 = ((22 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) | in ddrc_conf()
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/external/u-boot/board/laird/wb45n/ |
D | wb45n.c | 167 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/atmel/at91sam9x5ek/ |
D | at91sam9x5ek.c | 169 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/laird/wb50n/ |
D | wb50n.c | 161 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/atmel/sama5d4_xplained/ |
D | sama5d4_xplained.c | 173 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/atmel/sama5d4ek/ |
D | sama5d4ek.c | 161 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/siemens/corvus/ |
D | board.c | 156 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
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/external/u-boot/board/atmel/at91sam9m10g45ek/ |
D | at91sam9m10g45ek.c | 114 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
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/external/u-boot/board/atmel/at91sam9n12ek/ |
D | at91sam9n12ek.c | 257 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/atmel/sama5d3xek/ |
D | sama5d3xek.c | 234 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
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/external/u-boot/board/mini-box/picosam9g45/ |
D | picosam9g45.c | 69 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
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/external/u-boot/include/synopsys/ |
D | dwcddr21mctl.h | 21 unsigned int tpr1; /* SDRAM Timing Parameters 1 */ member
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