Searched refs:v48 (Results 1 – 25 of 227) sorted by relevance
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | sdr-reg-profit.ll | 34 %v10 = phi i32 [ %v5, %b2 ], [ %v48, %b8 ]
72 %v48 = load i32, i32* %v42, align 4
78 %v52 = zext i32 %v48 to i64
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| D | swp-phi-dep1.ll | 70 %v48 = zext i8 %v38 to i32
78 %v56 = add i32 %v50, %v48
86 %v64 = sub i32 %v48, %v50
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| D | jump-prob.ll | 131 …%v48 = load i32, i32* bitcast (i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32…
132 %v49 = and i32 %v48, 255
133 %v50 = lshr i32 %v48, 8
135 %v52 = lshr i32 %v48, 16
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| D | swp-bad-sched.ll | 31 %v3 = phi i32 [ %v48, %b3 ], [ 0, %b2 ]
84 %v48 = or i32 %v47, %v37
94 %v52 = phi i32 [ 0, %b1 ], [ %v48, %b4 ]
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| D | wcsrtomb.ll | 98 %v48 = phi i8* [ %v7, %b12 ], [ %v31, %b11 ]
100 %v50 = call i32 @f2(i8* %v48, i32 %v49, %s.0* %v4) #1
105 %v52 = icmp eq i8* %v31, %v48
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| D | early-if-merge-loop.ll | 60 %v48 = lshr i64 %v47, 32
61 %v49 = trunc i64 %v48 to i32
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| D | swp-phi.ll | 62 %v48 = phi float [ undef, %b0 ], [ %v47, %b1 ]
63 %v49 = phi float [ undef, %b0 ], [ %v48, %b1 ]
85 %v71 = fmul float %v49, %v48
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| D | registerscav-missing-spill-slot.ll | 127 %v48 = load double, double* undef, align 8, !tbaa !0
128 %v49 = select i1 undef, double %v48, double %v40
132 %v53 = select i1 undef, double %v48, double %v41
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| D | registerscavenger-fail1.ll | 135 %v48 = load double, double* %v44, align 8, !tbaa !0
136 %v49 = select i1 undef, double %v48, double %v35
143 %v56 = fcmp ogt double %v36, %v48
144 %v57 = select i1 %v56, double %v48, double %v36
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| D | v6vect-no-sideeffects.ll | 78 %v48 = tail call <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32> %v32, <16 x i32> %v44)
82 … call <16 x i32> @llvm.hexagon.V6.vdmpyhvsat.acc(<16 x i32> %v51, <16 x i32> %v48, <16 x i32> %v48)
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| D | vect_setcc_v2i16.ll | 87 %v48 = bitcast i16* %v45 to <4 x i16>*
88 %v49 = load <4 x i16>, <4 x i16>* %v48, align 8
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| D | expand-condsets.ll | 71 %v48 = icmp eq i32 %v47, 32
72 br i1 %v48, label %b4, label %b3
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | env-amdgizcl.ll | 4 …4-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256…
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| D | env-amdgiz.ll | 4 …4-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256…
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| D | fence-amdgiz.ll | 3 …4-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256…
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| D | load-private-double16-amdgiz.ll | 3 …4-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Bitcode/ |
| D | highLevelStructure.3.2.ll | 8 …6:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96…
9 …6:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96…
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| /external/llvm/test/Bitcode/ |
| D | highLevelStructure.3.2.ll | 8 …6:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96…
9 …6:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/autohvx/ |
| D | float-cost.ll | 69 %v48 = fsub float %v45, %v44
70 %v49 = fmul float %v48, 0x3FD99999A0000000
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| /external/spirv-llvm/test/SPIRV/ |
| D | SPIRVVersionAutodetect_1_0.ll | 7 target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:51…
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| D | spirv.Queue.ll | 6 target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:51…
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| D | opencl.queue_t.ll | 6 target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:51…
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| D | SPIRVVersionAutodetect_1_1.ll | 7 target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:51…
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| D | linked-list.ll | 3 target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:51…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/MemorySSA/ |
| D | ptr-const-mem.ll | 3 …2-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256…
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