| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | vop-err.s | 9 v_movreld_b32 v0, s1 label
12 v_movreld_b32 v0, flat_scratch_lo label
15 v_movreld_b32 v0, flat_scratch_hi label
18 v_movreld_b32 v0, vcc_lo label
21 v_movreld_b32 v0, vcc_hi label
24 v_movreld_b32 v0, exec_lo label
27 v_movreld_b32 v0, exec_hi label
30 v_movreld_b32 v0, ttmp0 label
33 v_movreld_b32 v0, ttmp1 label
36 v_movreld_b32 v0, 123 label
|
| D | vop3-convert.s | 73 v_movreld_b32 v1, v2 label
|
| D | gfx7_asm_all.s | 31203 v_movreld_b32 v5, v1 label
31206 v_movreld_b32 v255, v1 label
31209 v_movreld_b32 v5, v255 label
31212 v_movreld_b32 v5, m0 label
31215 v_movreld_b32 v5, 0 label
31218 v_movreld_b32 v5, -1 label
31221 v_movreld_b32 v5, 0.5 label
31224 v_movreld_b32 v5, -4.0 label
|
| D | gfx8_asm_all.s | 31509 v_movreld_b32 v5, v1 label
31512 v_movreld_b32 v255, v1 label
31515 v_movreld_b32 v5, v255 label
31518 v_movreld_b32 v5, m0 label
31521 v_movreld_b32 v5, 0 label
31524 v_movreld_b32 v5, -1 label
31527 v_movreld_b32 v5, 0.5 label
31530 v_movreld_b32 v5, -4.0 label
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | insert_vector_elt.ll | 139 ; GCN: v_movreld_b32
159 ; GCN: v_movreld_b32
168 ; GCN: v_movreld_b32
178 ; GCN: v_movreld_b32
364 ; FIXME: Inline immediate should be folded into v_movreld_b32.
|
| D | vector-extract-insert.ll | 30 ; GCN: v_movreld_b32
|
| D | indirect-addressing-si.ll | 109 ; CHECK-NEXT: v_movreld_b32
|
| /external/llvm/test/MC/AMDGPU/ |
| D | vop1.s | 266 v_movreld_b32 v1, v2 label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | vector-extract-insert.ll | 30 ; GCN: v_movreld_b32
|
| D | insert_vector_elt.ll | 139 ; GCN: v_movreld_b32
169 ; GCN: v_movreld_b32
179 ; GCN: v_movreld_b32
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | VOP1Instructions.td | 280 // v_movreld_b32 is a special case because the destination output
286 defm V_MOVRELD_B32 : VOP1Inst <"v_movreld_b32", VOP_MOVRELD>;
640 // This is a pseudo variant of the v_movreld_b32 instruction in which the
|
| D | SIInstrInfo.td | 1683 field bit EmitDst = HasDst; // force dst encoding, see v_movreld_b32 special case
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUAsmGFX7.rst | 605 v_movreld_b32 dst, src0
|
| D | AMDGPUAsmGFX8.rst | 724 v_movreld_b32 dst, src0
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 1391 defm V_MOVRELD_B32 : VOP1Inst <vop1<0x42, 0x36>, "v_movreld_b32", VOP_NO_EXT<VOP_I32_I32>>;
|