Home
last modified time | relevance | path

Searched refs:vw (Results 1 – 25 of 208) sorted by relevance

123456789

/external/boringssl/src/crypto/fipsmodule/sha/
Dsha1-altivec.c200 vec_uint32_t vw[20]; in sha1_block_data_order() local
201 const uint32_t *w = (const uint32_t *)&vw; in sha1_block_data_order()
204 const vec_uint32_t w0 = sched_00_15(vw + 0, data + 0, k); in sha1_block_data_order()
210 const vec_uint32_t w4 = sched_00_15(vw + 1, data + 16, k); in sha1_block_data_order()
216 const vec_uint32_t w8 = sched_00_15(vw + 2, data + 32, k); in sha1_block_data_order()
222 const vec_uint32_t w12 = sched_00_15(vw + 3, data + 48, k); in sha1_block_data_order()
228 const vec_uint32_t w16 = sched_16_31(vw + 4, w12, w8, w4, w0, k); in sha1_block_data_order()
235 const vec_uint32_t w20 = sched_16_31(vw + 5, w16, w12, w8, w4, k); in sha1_block_data_order()
241 const vec_uint32_t w24 = sched_16_31(vw + 6, w20, w16, w12, w8, k); in sha1_block_data_order()
247 const vec_uint32_t w28 = sched_16_31(vw + 7, w24, w20, w16, w12, k); in sha1_block_data_order()
[all …]
/external/llvm/test/CodeGen/Hexagon/vect/
Dvect-vshifts.ll24 %9 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %8, i32 1)
40 %14 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %13, i32 31)
48 %20 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %19, i32 %gb)
69 %25 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %24, i32 31)
77 %31 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %30, i32 %gb)
98 %36 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %35, i32 31)
106 %42 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %41, i32 %gb)
127 %47 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %46, i32 31)
135 %53 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %52, i32 %gb)
156 %58 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %57, i32 31)
[all …]
Dvect-shift-imm.ll21 %0 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %x, i32 9)
22 %1 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %x, i32 8)
23 %2 = tail call i64 @llvm.hexagon.S2.lsr.i.vw(i64 %x, i32 7)
35 declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32) nounwind readnone
36 declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32) nounwind readnone
37 declare i64 @llvm.hexagon.S2.lsr.i.vw(i64, i32) nounwind readnone
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/vect/
Dvect-vshifts.ll24 %9 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %8, i32 1)
40 %14 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %13, i32 31)
48 %20 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %19, i32 %gb)
69 %25 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %24, i32 31)
77 %31 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %30, i32 %gb)
98 %36 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %35, i32 31)
106 %42 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %41, i32 %gb)
127 %47 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %46, i32 31)
135 %53 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %52, i32 %gb)
156 %58 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %57, i32 31)
[all …]
Dvect-shift-imm.ll21 %0 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %x, i32 9)
22 %1 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %x, i32 8)
23 %2 = tail call i64 @llvm.hexagon.S2.lsr.i.vw(i64 %x, i32 7)
35 declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32) nounwind readnone
36 declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32) nounwind readnone
37 declare i64 @llvm.hexagon.S2.lsr.i.vw(i64, i32) nounwind readnone
/external/libaom/libaom/aom_dsp/
Dentdec.c160 od_ec_window vw; in od_ec_decode_bool_q15() local
173 vw = (od_ec_window)v << (OD_EC_WINDOW_SIZE - 16); in od_ec_decode_bool_q15()
176 if (dif >= vw) { in od_ec_decode_bool_q15()
178 dif -= vw; in od_ec_decode_bool_q15()
/external/pdfium/third_party/libopenjpeg20/
Ddwt.c2312 __m128* OPJ_RESTRICT vw = (__m128*) w; in opj_v4dwt_decode_step1_sse() local
2315 vw += 2 * start; in opj_v4dwt_decode_step1_sse()
2316 for (i = start; i + 3 < end; i += 4, vw += 8) { in opj_v4dwt_decode_step1_sse()
2317 __m128 xmm0 = _mm_mul_ps(vw[0], c); in opj_v4dwt_decode_step1_sse()
2318 __m128 xmm2 = _mm_mul_ps(vw[2], c); in opj_v4dwt_decode_step1_sse()
2319 __m128 xmm4 = _mm_mul_ps(vw[4], c); in opj_v4dwt_decode_step1_sse()
2320 __m128 xmm6 = _mm_mul_ps(vw[6], c); in opj_v4dwt_decode_step1_sse()
2321 vw[0] = xmm0; in opj_v4dwt_decode_step1_sse()
2322 vw[2] = xmm2; in opj_v4dwt_decode_step1_sse()
2323 vw[4] = xmm4; in opj_v4dwt_decode_step1_sse()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dswp-dead-regseq.ll29 %v14 = tail call i64 @llvm.hexagon.S2.asr.r.vw(i64 %v13, i32 6)
38 declare i64 @llvm.hexagon.S2.asr.r.vw(i64, i32) #1
DS3_2op.ll311 %v3 = call i64 @llvm.hexagon.S2.asr.i.vw(i64 %v2, i32 1)
316 declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32) #1
326 %v3 = call i64 @llvm.hexagon.S2.lsr.i.vw(i64 %v2, i32 1)
331 declare i64 @llvm.hexagon.S2.lsr.i.vw(i64, i32) #1
341 %v3 = call i64 @llvm.hexagon.S2.asl.i.vw(i64 %v2, i32 1)
346 declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32) #1
/external/toybox/scripts/
Dchange.sh15 for i in $(generated/instlist | egrep -vw "sh|help")
/external/tensorflow/tensorflow/compiler/xla/client/lib/
Dself_adjoint_eig_test.cc110 auto vw = Mul(result.v, BroadcastInDim(result.w, out_dims, broadcast_dims)); in ComputeMatmulVWVt() local
111 return BatchDot(vw, TransposeInMinorDims(result.v), in ComputeMatmulVWVt()
/external/mesa3d/src/gallium/drivers/swr/
Dswr_shader.cpp1105 Value *vw = nullptr, *pAttribs; in CompileFS() local
1111 vw = VRCP(LOAD(pPS, {0, SWR_PS_CONTEXT_vOneOverW, PixelPositions_center})); in CompileFS()
1114 vw = VRCP(LOAD(pPS, {0, SWR_PS_CONTEXT_vOneOverW, PixelPositions_centroid})); in CompileFS()
1117 vw = VRCP(LOAD(pPS, {0, SWR_PS_CONTEXT_vOneOverW, PixelPositions_sample})); in CompileFS()
1122 vw = VIMMED1(1.f); in CompileFS()
1125 vw->setName("w"); in CompileFS()
1249 interp = FMUL(interp, vw); in CompileFS()
/external/swiftshader/src/Shader/
DPixelPipeline.cpp1544 Float4 vw; in TEXCOORD() local
1560 vw = Max(v, Float4(0.0f)); in TEXCOORD()
1561 vw = Min(vw, Float4(1.0f)); in TEXCOORD()
1562 dst.y = convertFixed12(vw); in TEXCOORD()
1586 Float4 vw = v; in TEXCRD() local
1592 vw *= Rcp_pp(s); in TEXCRD()
1609 vw *= Float4(0x1000); in TEXCRD()
1610 vw = Max(vw, Float4(-0x8000)); in TEXCRD()
1611 vw = Min(vw, Float4(0x7FFF)); in TEXCRD()
1612 dst.y = RoundShort4(vw); in TEXCRD()
/external/cldr/tools/cldr-unittest/src/org/unicode/cldr/unittest/data/transformtest/
Dja-t-pl-fonipa.txt292 vwɔdava ブウォダバ
293 vwɔt͡swavɛk ブウォツワベク
Dpl-fonipa-t-pl.txt291 Włocławek vwɔt͡swavɛk
292 Włodawa vwɔdava
Dcy-fonipa-t-cy.txt176 fwynhau'r ˈvwən̥aɨr
441 fwynhau ˈvwən̥aɨ
/external/webrtc/talk/media/testdata/
Dvoice.rtpdump7 …���kchefj{�}mim������������9R�4����pjjq���~x��������y{x���xt{��qouwjlk�z{vw����~��������zr{�~y��…
15 …~}�ysns���������v���|us����xzxx|�}~����skoq{zz|z{xny����z����|ps|�{vw{����~~����vw||����xttry���…
17 …�yxw|��~z{~�����}}zvwy{���������}|�����������u{ruqqu�x|~������~�����|uz}�{vw�������{������ Ā�9��4�
64 …|���~{������ytrvy{ttwonlkku{�zxnv������������{r��������~x�����y|��~unmv��{vw��}y|���������to~��zn…
86 …���������:��5uJ��pj��|u����u���lh�����{|wto���~pr��yot���ony��yx���row~|vw|�{mio��oo��ynny��tx…
90 …vw{��yrt|~i_cr��ldntwnqxunz}��{zpmoyvonz��~uoijs��|��������������������qx���������:��5����pj�~s{…
95 …���uz����us|����wpst~��~tqx�����~}{}����������������������|qnox��zrmln{���vw~����zy�������x}�����…
/external/honggfuzz/examples/apache-httpd/corpus_http2/
De688054144168d17591bbb792be16248.00002281.honggfuzz.cov10 Y��#�t����ՂO�E�zO{:Vg�G����Yjb�?�SO7��P�75W D�wEH�,��;�A���}�̜l�^��QW���kV��P�OR��vw��*�A:f�条…
/external/icu/icu4c/source/data/translit/
Dvec_vec_FONIPA.txt33 {fɾ} {fj} {fl} {fw} {fɾw} {vɾ} {vj} {vw} {ɾw} {ɾj}
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/intrinsics/
Dxtype_shift.ll692 declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32)
694 %z = call i64 @llvm.hexagon.S2.asr.i.vw(i64 %a, i32 0)
699 declare i64 @llvm.hexagon.S2.lsr.i.vw(i64, i32)
701 %z = call i64 @llvm.hexagon.S2.lsr.i.vw(i64 %a, i32 0)
706 declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32)
708 %z = call i64 @llvm.hexagon.S2.asl.i.vw(i64 %a, i32 0)
/external/llvm/test/CodeGen/Hexagon/intrinsics/
Dxtype_shift.ll692 declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32)
694 %z = call i64 @llvm.hexagon.S2.asr.i.vw(i64 %a, i32 0)
699 declare i64 @llvm.hexagon.S2.lsr.i.vw(i64, i32)
701 %z = call i64 @llvm.hexagon.S2.lsr.i.vw(i64 %a, i32 0)
706 declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32)
708 %z = call i64 @llvm.hexagon.S2.asl.i.vw(i64 %a, i32 0)
/external/python/cpython2/Lib/test/
Dtest_codecs.py102 vw = []
105 vw.append((i*200+200)*u"\u3042" + lineend)
107 self.assertEqual(readalllines("".join(vw), True), "|".join(vw))
108 self.assertEqual(readalllines("".join(vw), False), "|".join(vwo))
/external/ImageMagick/PerlMagick/t/reference/filter/
DConvolve.miff15 …vw�xu�d_{RM^E@E=95:61<:1B=/H@0J@2D>2>;4;:6L83�;8�=0�<*�;'�<*�<.�:/�:-�;.�>2�7-�5,�4,�0*�0'�4"�5#�;…
/external/tensorflow/tensorflow/compiler/tests/
Dvariable_ops_test.py193 vw, vb = session.run([w, b])
198 vw,
/external/strace/tests-m32/
DMakefile.am239 btrfs-vw.test \

123456789