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Searched refs:xor16 (Results 1 – 25 of 25) sorted by relevance

/external/llvm/test/CodeGen/Mips/llvm-ir/
Dxor.ll40 ; MM: xor16 $[[T0:[0-9]+]], $5
55 ; MM: xor16 $[[T0:[0-9]+]], $5
70 ; MM: xor16 $[[T0:[0-9]+]], $5
86 ; MM32: xor16 $[[T0:[0-9]+]], $5
105 ; MM32: xor16 $[[T0:[0-9]+]], $6
106 ; MM32: xor16 $[[T1:[0-9]+]], $7
134 ; MM32: xor16 $[[T1]], $4
135 ; MM32: xor16 $[[T0]], $5
137 ; MM32: xor16 $[[T2]], $6
139 ; MM32: xor16 $[[T3]], $7
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dxor.ll67 ; MM32R3-NEXT: xor16 $4, $5
116 ; MM32R3-NEXT: xor16 $4, $5
165 ; MM32R3-NEXT: xor16 $4, $5
211 ; MM32R3-NEXT: xor16 $4, $5
260 ; MM32R3-NEXT: xor16 $4, $6
261 ; MM32R3-NEXT: xor16 $5, $7
334 ; MM32R3-NEXT: xor16 $2, $4
335 ; MM32R3-NEXT: xor16 $3, $5
337 ; MM32R3-NEXT: xor16 $4, $6
339 ; MM32R3-NEXT: xor16 $5, $7
/external/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s18 # CHECK-EL: xor16 $17, $5 # encoding: [0x4d,0x44]
73 # CHECK-EB: xor16 $17, $5 # encoding: [0x44,0x4d]
126 xor16 $17, $5
Dmicromips-invalid.s15 xor16 $15, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s18 # CHECK-EL: xor16 $17, $5 # encoding: [0x4d,0x44]
73 # CHECK-EB: xor16 $17, $5 # encoding: [0x44,0x4d]
126 xor16 $17, $5
Dmicromips-invalid.s15 xor16 $15, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dmicromips-xor16.ll18 ; CHECK: xor16
/external/llvm/test/CodeGen/Mips/
Dmicromips-xor16.ll18 ; CHECK: xor16
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/micromips-sizereduction/
Dmicromips-xor16.ll7 ; CHECK: xor16
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s150 xor16 $17, $5 # CHECK: xor16 $17, $5 # encoding: [0x44,0xd8]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/
Dvalid.s28 xor16 $17, $5 # CHECK: xor16 $17, $5 # encoding: [0x44,0x4d] label
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s272 xor16 $17, $5 # CHECK: xor16 $17, $5 # encoding: [0x44,0xd8]
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid.txt16 0x44 0x4d # CHECK: xor16 $17, $5
Dvalid-el.txt16 0x4d 0x44 # CHECK: xor16 $17, $5
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/
Dvalid.s315 xor16 $17, $5 # CHECK: xor16 $17, $5 # encoding: [0x44,0xd8]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt16 0x4d 0x44 # CHECK: xor16 $17, $5
Dvalid.txt16 0x44 0x4d # CHECK: xor16 $17, $5
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt159 0x44 0xd8 # CHECK: xor16 $17, $5
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt235 0x44 0xd8 # CHECK: xor16 $17, $5
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt239 0x44 0xd8 # CHECK: xor16 $17, $5
/external/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td1118 class XOR16_MMR6_DESC : LogicRMM16<"xor16", GPRMM16Opnd, II_XOR, xor>,
1119 MMR6Arch<"xor16"> {
DMicroMipsInstrInfo.td611 def XOR16_MM : LogicRMM16<"xor16", GPRMM16Opnd, II_XOR, xor>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td1110 class XOR16_MMR6_DESC : LogicRMM16<"xor16", GPRMM16Opnd, II_XOR>,
1111 MMR6Arch<"xor16">;
DMicroMipsInstrInfo.td648 def XOR16_MM : LogicRMM16<"xor16", GPRMM16Opnd, II_XOR, xor>,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc5017 "wait\005wrdsp\006wrpgpr\004wsbh\003xor\005xor.v\005xor16\004xori\006xor"
7657 …{ 9547 /* xor16 */, Mips::XOR16_MM, Convert__GPRMM16AsmReg1_0__GPRMM16AsmReg1_1__Tie0_1_1, Feature…
7658 …{ 9547 /* xor16 */, Mips::XOR16_MMR6, Convert__GPRMM16AsmReg1_0__GPRMM16AsmReg1_1__Tie0_1_1, Featu…
11121 { Feature_InMicroMips|Feature_NotMips32r6, 9547 /* xor16 */, MCK_GPRMM16AsmReg, 3 /* 0, 1 */ },
11122 { Feature_InMicroMips|Feature_HasMips32r6, 9547 /* xor16 */, MCK_GPRMM16AsmReg, 3 /* 0, 1 */ },