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Searched refs:FDIVS (Results 1 – 17 of 17) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/
DLeonFeatures.td59 "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store"
DSparcInstrInfo.td1273 // FDIVS generates an erratum on LEON processors, so by disabling this instruction
1275 def FDIVS : F3_3<2, 0b110100, 0b001001101,
/external/llvm/lib/Target/Sparc/
DLeonFeatures.td72 "LEON3 erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD "
DLeonPasses.cpp862 case SP::FDIVS: in runOnMachineFunction()
DSparcInstrInfo.td1268 // FDIVS generates an erratum on LEON processors, so by disabling this instruction
1270 def FDIVS : F3_3<2, 0b110100, 0b001001101,
/external/pcre/dist2/src/sljit/
DsljitNativeSPARC_common.c144 #define FDIVS (OPC1(0x2) | OPC3(0x34) | DOP(0x4d)) macro
1164 …FAIL_IF(push_inst(compiler, SELECT_FOP(op, FDIVS, FDIVD) | FD(dst_r) | FS1(src1) | FS2(src2), MOVA… in sljit_emit_fop2()
DsljitNativePPC_common.c176 #define FDIVS (HI(59) | LO(18)) macro
1740 FAIL_IF(push_inst(compiler, SELECT_FOP(op, FDIVS, FDIV) | FD(dst_r) | FA(src1) | FB(src2))); in sljit_emit_fop2()
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DSparcInstrInfo.td670 def FDIVS : F3_3<2, 0b110100, 0b001001101,
/external/v8/src/ppc/
Dconstants-ppc.h1844 V(fdivs, FDIVS, 0xEC000024) \
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DP9InstrResources.td1191 FDIVS
DPPCInstrInfo.td2879 defm FDIVS : AForm_2r<59, 18,
/external/capstone/arch/Sparc/
DSparcGenDisassemblerTables.inc626 /* 2409 */ MCD_OPC_Decode, 165, 1, 26, // Opcode: FDIVS
DSparcGenAsmWriter.inc186 5815U, // FDIVS
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrInfo.td1299 def FDIVS : AForm_2<59, 18,
/external/capstone/arch/PowerPC/
DPPCGenDisassemblerTables.inc1476 /* 6068 */ MCD_OPC_Decode, 243, 3, 88, // Opcode: FDIVS
DPPCGenAsmWriter.inc519 22153U, // FDIVS
1792 0U, // FDIVS
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td2599 defm FDIVS : AForm_2r<59, 18,