| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPatterns.td | 300 def Sub: pf2<sub>; def Or: pf2<or>; def Srl: pf2<srl>;
973 def: OpR_RI_pat<S2_lsr_i_r, Srl, i32, I32, u5_0ImmPred>;
976 def: OpR_RI_pat<S2_lsr_i_p, Srl, i64, I64, u6_0ImmPred>;
979 def: OpR_RI_pat<S2_lsr_i_vh, Srl, v4i16, V4I16, u4_0ImmPred>;
982 def: OpR_RI_pat<S2_lsr_i_vh, Srl, v2i32, V2I32, u5_0ImmPred>;
986 def: OpR_RR_pat<S2_lsr_r_r, Srl, i32, I32, I32>;
989 def: OpR_RR_pat<S2_lsr_r_p, Srl, i64, I64, I32>;
1018 def: AccRRI_pat<S2_lsr_i_r_acc, Add, Su<Srl>, I32, u5_0ImmPred>;
1019 def: AccRRI_pat<S2_lsr_i_r_nac, Sub, Su<Srl>, I32, u5_0ImmPred>;
1020 def: AccRRI_pat<S2_lsr_i_r_and, And, Su<Srl>, I32, u5_0ImmPred>;
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 1584 const SDValue &Srl = N->getOperand(0); in SelectS_BFE() local
1585 ConstantSDNode *Shift = dyn_cast<ConstantSDNode>(Srl.getOperand(1)); in SelectS_BFE()
1596 Srl.getOperand(0), ShiftVal, WidthVal)); in SelectS_BFE()
1914 SDValue Srl = In.getOperand(0); in isExtractHiElt() local
1915 if (Srl.getOpcode() == ISD::SRL) { in isExtractHiElt()
1916 if (ConstantSDNode *ShiftAmt = dyn_cast<ConstantSDNode>(Srl.getOperand(1))) { in isExtractHiElt()
1918 Out = stripBitcast(Srl.getOperand(0)); in isExtractHiElt()
|
| D | SIISelLowering.cpp | 7264 SDValue Srl = DAG.getNode(ISD::SRL, SL, MVT::i32, Elt, in performExtractVectorEltCombine() local
7266 DCI.AddToWorklist(Srl.getNode()); in performExtractVectorEltCombine()
7268 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, EltVT.changeTypeToInteger(), Srl); in performExtractVectorEltCombine()
7732 SDValue Srl = N->getOperand(0); in performCvtF32UByteNCombine() local
7733 if (Srl.getOpcode() == ISD::ZERO_EXTEND) in performCvtF32UByteNCombine()
7734 Srl = Srl.getOperand(0); in performCvtF32UByteNCombine()
7737 if (Srl.getOpcode() == ISD::SRL) { in performCvtF32UByteNCombine()
7743 dyn_cast<ConstantSDNode>(Srl.getOperand(1))) { in performCvtF32UByteNCombine()
7744 Srl = DAG.getZExtOrTrunc(Srl.getOperand(0), SDLoc(Srl.getOperand(0)), in performCvtF32UByteNCombine()
7750 MVT::f32, Srl); in performCvtF32UByteNCombine()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1004 SDValue Srl = CurDAG->getNode(ISD::SRL, dl, N.getValueType(), in MatchAddressRecursively() local
1007 Srl, Mask); in MatchAddressRecursively()
1023 if (Srl.getNode()->getNodeId() == -1 || in MatchAddressRecursively()
1024 Srl.getNode()->getNodeId() > Shift.getNode()->getNodeId()) { in MatchAddressRecursively()
1025 CurDAG->RepositionNode(Shift.getNode(), Srl.getNode()); in MatchAddressRecursively()
1026 Srl.getNode()->setNodeId(Shift.getNode()->getNodeId()); in MatchAddressRecursively()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 384 SDValue Srl = N1.getOperand(0); in PreprocessISelDAG() local
386 if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) || in PreprocessISelDAG()
405 Srl = CurDAG->getNode(ISD::SRL, SDLoc(Srl), MVT::i32, in PreprocessISelDAG()
406 Srl.getOperand(0), in PreprocessISelDAG()
407 CurDAG->getConstant(Srl_imm + TZ, SDLoc(Srl), in PreprocessISelDAG()
410 Srl, in PreprocessISelDAG()
411 CurDAG->getConstant(And_imm, SDLoc(Srl), MVT::i32)); in PreprocessISelDAG()
413 N1, CurDAG->getConstant(TZ, SDLoc(Srl), MVT::i32)); in PreprocessISelDAG()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 360 SDValue Srl = N1.getOperand(0); in PreprocessISelDAG() local
362 if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) || in PreprocessISelDAG()
381 Srl = CurDAG->getNode(ISD::SRL, SDLoc(Srl), MVT::i32, in PreprocessISelDAG()
382 Srl.getOperand(0), in PreprocessISelDAG()
383 CurDAG->getConstant(Srl_imm + TZ, SDLoc(Srl), in PreprocessISelDAG()
386 Srl, in PreprocessISelDAG()
387 CurDAG->getConstant(And_imm, SDLoc(Srl), MVT::i32)); in PreprocessISelDAG()
389 N1, CurDAG->getConstant(TZ, SDLoc(Srl), MVT::i32)); in PreprocessISelDAG()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 1260 const SDValue &Srl = N->getOperand(0); in SelectS_BFE() local
1261 ConstantSDNode *Shift = dyn_cast<ConstantSDNode>(Srl.getOperand(1)); in SelectS_BFE()
1272 Srl.getOperand(0), ShiftVal, WidthVal)); in SelectS_BFE()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.h | 269 Srl, enumerator
1274 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>;
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 936 SDValue Srl = DAG.getNode(ISD::SRL, DL, VT, X, Eight); in foldMaskAndShiftToExtract() local
937 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask); in foldMaskAndShiftToExtract()
947 insertDAGNode(DAG, N, Srl); in foldMaskAndShiftToExtract()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1154 SDValue Srl = DAG.getNode(ISD::SRL, DL, VT, X, Eight); in foldMaskAndShiftToExtract() local
1155 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask); in foldMaskAndShiftToExtract()
1165 insertDAGNode(DAG, N, Srl); in foldMaskAndShiftToExtract()
|
| D | X86ISelLowering.cpp | 18007 SDValue Srl = DAG.getNode(ISD::SRL, dl, MVT::i16, FNStSW, in ConvertCmpIfNecessary() local
18009 SDValue TruncSrl = DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, Srl); in ConvertCmpIfNecessary()
24591 SDValue Srl = in LowerVectorCTPOPBitmath() local
24593 SDValue And = GetMask(Srl, APInt::getSplat(Len, APInt(8, 0x55))); in LowerVectorCTPOPBitmath()
24598 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 2)); in LowerVectorCTPOPBitmath()
24599 SDValue AndRHS = GetMask(Srl, APInt::getSplat(Len, APInt(8, 0x33))); in LowerVectorCTPOPBitmath()
24603 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 4)); in LowerVectorCTPOPBitmath()
24604 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, V, Srl); in LowerVectorCTPOPBitmath()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 3190 SDValue Srl = DAG.getNode(ISD::SRL, DL, VT, Sign, Inexact); in visitSDIVLike() local
3191 AddToWorklist(Srl.getNode()); in visitSDIVLike()
3192 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0, Srl); in visitSDIVLike()
|