Searched refs:isExtractSubreg (Results 1 – 17 of 17) sorted by relevance
136 FLAG(isExtractSubreg) in EmitInstrDocs()
259 bool isExtractSubreg : 1; variable
604 if (Inst.isExtractSubreg) OS << "|(1ULL<<MCID::ExtractSubreg)"; in emitRecord()
328 isExtractSubreg = R->getValueAsBit("isExtractSubreg"); in CodeGenInstruction()
199 MI.isExtractSubreg())); in isCoalescableCopy()1022 assert(MI.isExtractSubreg() && "Invalid instruction"); in ExtractSubregRewriter()1818 assert((Def->isExtractSubreg() || in getNextSourceFromExtractSubreg()1906 if (Def->isExtractSubreg() || Def->isExtractSubregLike()) in getNextSourceImpl()
1151 assert((MI.isExtractSubreg() || in getExtractSubregInputs()1154 if (!MI.isExtractSubreg()) in getExtractSubregInputs()
242 MI.isExtractSubreg())); in isCoalescableCopy()960 assert(MI.isExtractSubreg() && "Invalid instruction"); in ExtractSubregRewriter()1973 assert((Def->isExtractSubreg() || in getNextSourceFromExtractSubreg()2065 if (Def->isExtractSubreg() || Def->isExtractSubregLike()) in getNextSourceImpl()
1183 assert((MI.isExtractSubreg() || in getExtractSubregInputs()1186 if (!MI.isExtractSubreg()) in getExtractSubregInputs()
256 bool isExtractSubreg : 1; variable
507 if (Inst.isExtractSubreg) OS << "|(1ULL<<MCID::ExtractSubreg)"; in emitRecord()
324 isExtractSubreg = R->getValueAsBit("isExtractSubreg"); in CodeGenInstruction()
334 if (isExtractSubreg() && OpIdx == 2)900 bool isExtractSubreg() const {
823 bool isExtractSubreg() const {
394 bit isExtractSubreg = 0; // Is this instruction a kind of extract subreg?
475 bit isExtractSubreg = 0; // Is this instruction a kind of extract subreg?
1056 let isExtractSubreg = 1;
1104 let isExtractSubreg = 1;