/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Generic/ |
D | resources-3dnow.s | 6 pavgusb %mm0, %mm2 label 7 pavgusb (%rax), %mm2 label 91 # CHECK-NEXT: 1 3 1.00 pavgusb %mm0, %mm2 92 # CHECK-NEXT: 2 8 1.00 * pavgusb (%rax), %mm2 159 # CHECK-NEXT: - - - 1.00 - - - - pavgusb %mm0, %mm2 160 # CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pavgusb (%rax), %mm2
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/external/llvm/test/MC/X86/ |
D | 3DNow.s | 6 pavgusb %mm2, %mm1 label 9 pavgusb 9(%esi,%edx), %mm3 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
D | 3DNow.s | 6 pavgusb %mm2, %mm1 label 9 pavgusb 9(%esi,%edx), %mm3 label
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/external/swiftshader/third_party/LLVM/test/MC/X86/ |
D | 3DNow.s | 6 pavgusb %mm2, %mm1 label 9 pavgusb 9(%esi,%edx), %mm3 label
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/external/capstone/suite/MC/X86/ |
D | 3DNow.s.cs | 2 0x0f,0x0f,0xca,0xbf = pavgusb %mm2, %mm1 3 0x67,0x0f,0x0f,0x5c,0x16,0x09,0xbf = pavgusb 9(%esi,%edx), %mm3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | commute-3dnow.ll | 221 ; X32-NEXT: pavgusb (%eax), %mm0 222 ; X32-NEXT: pavgusb (%ecx), %mm0 229 ; X64-NEXT: pavgusb (%rsi), %mm0 230 ; X64-NEXT: pavgusb (%rdx), %mm0 236 %4 = tail call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %1, x86_mmx %2) 237 %5 = tail call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %3, x86_mmx %4) 241 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx)
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D | 3dnow-schedule.ll | 17 ; CHECK-NEXT: pavgusb %mm1, %mm0 # sched: [3:1.00] 18 ; CHECK-NEXT: pavgusb (%rdi), %mm0 # sched: [8:1.00] 21 %1 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %a0, x86_mmx %a1) 23 %3 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %1, x86_mmx %2) 27 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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D | stack-folding-3dnow.ll | 5 ;CHECK: pavgusb {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload 7 %2 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %a, x86_mmx %b) nounwind readnone 10 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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D | 3dnow-intrinsics.ll | 9 ; X86-NEXT: pavgusb %mm1, %mm0 15 ; X64-NEXT: pavgusb %mm1, %mm0 25 %4 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %2, x86_mmx %3) 30 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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/external/llvm/test/CodeGen/X86/ |
D | stack-folding-3dnow.ll | 5 ;CHECK: pavgusb {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload 7 %2 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %a, x86_mmx %b) nounwind readnone 10 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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D | 3dnow-intrinsics.ll | 4 ; CHECK: pavgusb 10 %4 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %2, x86_mmx %3) 15 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
D | 3dnow-intrinsics.ll | 4 ; CHECK: pavgusb 10 %4 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %2, x86_mmx %3) 15 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/ |
D | amd3dnow.txt | 78 # CHECK: pavgusb %mm1, %mm3
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86Instr3DNow.td | 66 defm PAVGUSB : I3DNow_binop_rm_int<0xBF, "pavgusb">;
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D | X86GenAsmMatcher.inc | 4195 { X86::PAVGUSBrr, "pavgusb", Convert__Reg1_1__Tie0__Reg1_0, { MCK_VR64, MCK_VR64 }, 0}, 4196 { X86::PAVGUSBrm, "pavgusb", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_VR64 }, 0},
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D | X86GenAsmWriter.inc | 3953 "pause\000pavgusb\t\000pblendvb\t\000pblendw\t\000pclmulqdq\t\000pcmpeqq"
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D | X86GenAsmWriter1.inc | 3920 "L\000outsb\000outsd\000outsw\000packusdw\t\000pause\000pavgusb\t\000pbl"
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/external/llvm/lib/Target/X86/ |
D | X86Instr3DNow.td | 66 defm PAVGUSB : I3DNow_binop_rm_int<0xBF, "pavgusb">;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86Instr3DNow.td | 57 defm PAVGUSB : I3DNow_binop_rm_int<0xBF, "pavgusb", SchedWriteVecALU.MMX, 1>;
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/external/elfutils/tests/ |
D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
D | testfile45.expect.bz2 |
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 1605 #define PAVGUSB(a, b) pavgusb P_ARG2(a, b)
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/external/swiftshader/third_party/LLVM/include/llvm/ |
D | Intrinsics.gen | 101 x86_3dnow_pavgusb, // llvm.x86.3dnow.pavgusb 628 "llvm.x86.3dnow.pavgusb", 3211 return Intrinsic::x86_3dnow_pavgusb; // "86.3dnow.pavgusb" 6205 case Intrinsic::x86_3dnow_pavgusb: // llvm.x86.3dnow.pavgusb 7537 case Intrinsic::x86_3dnow_pavgusb: // llvm.x86.3dnow.pavgusb
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/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
D | IntrinsicEnums.inc | 5405 x86_3dnow_pavgusb, // llvm.x86.3dnow.pavgusb
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenAsmMatcher.inc | 6626 "use\005pavgb\007pavgusb\005pavgw\010pblendvb\007pblendw\014pclmulhqhqdq" 8419 …{ 5266 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }… 8420 …{ 5266 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR6… 22959 …{ 5266 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }… 22960 …{ 5266 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem6…
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