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/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-3dnow.s39 pfnacc %mm0, %mm2 label
40 pfnacc (%rax), %mm2 label
113 # CHECK-NEXT: 1 3 1.00 pfnacc %mm0, %mm2
114 # CHECK-NEXT: 2 9 1.00 * pfnacc (%rax), %mm2
181 # CHECK-NEXT: - - - 1.00 - - - - pfnacc %mm0, %mm2
182 # CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfnacc (%rax), %mm2
/external/llvm/test/MC/X86/
D3DNow.s86 pfnacc %mm2, %mm1 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
D3DNow.s88 pfnacc %mm2, %mm1 label
/external/swiftshader/third_party/LLVM/test/MC/X86/
D3DNow.s86 pfnacc %mm2, %mm1 label
/external/capstone/suite/MC/X86/
D3DNow.s.cs27 0x0f,0x0f,0xca,0x8a = pfnacc %mm2, %mm1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D3dnow-schedule.ll182 ; CHECK-NEXT: pfnacc %mm1, %mm0 # sched: [3:1.00]
183 ; CHECK-NEXT: pfnacc (%rdi), %mm0 # sched: [9:1.00]
186 %1 = call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %a0, x86_mmx %a1)
188 %3 = call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %1, x86_mmx %2)
192 declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
Dstack-folding-3dnow.ll104 ;CHECK: pfnacc {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
106 %2 = call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %a, x86_mmx %b) nounwind readnone
109 declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll751 ; X86-NEXT: pfnacc %mm1, %mm2
763 ; X64-NEXT: pfnacc %mm0, %mm1
770 %2 = tail call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %0, x86_mmx %1)
775 declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
/external/llvm/test/CodeGen/X86/
Dstack-folding-3dnow.ll104 ;CHECK: pfnacc {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
106 %2 = call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %a, x86_mmx %b) nounwind readnone
109 declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll244 ; CHECK: pfnacc
248 %2 = tail call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %0, x86_mmx %1)
253 declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D3dnow-intrinsics.ll244 ; CHECK: pfnacc
248 %2 = tail call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %0, x86_mmx %1)
253 declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/
Damd3dnow.txt57 # CHECK: pfnacc 16(%eax,%ebx,4), %mm0
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86Instr3DNow.td100 defm PFNACC : I3DNow_binop_rm_int<0x8A, "pfnacc", "a">;
DX86GenAsmMatcher.inc4300 { X86::PFNACCrr, "pfnacc", Convert__Reg1_1__Tie0__Reg1_0, { MCK_VR64, MCK_VR64 }, 0},
4301 { X86::PFNACCrm, "pfnacc", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_VR64 }, 0},
DX86GenAsmWriter.inc3957 "n\t\000pfmul\t\000pfnacc\t\000pfpnacc\t\000pfrcpit1\t\000pfrcpit2\t\000"
DX86GenAsmWriter1.inc3924 "\000pfcmpge\t\000pfcmpgt\t\000pfmax\t\000pfmin\t\000pfmul\t\000pfnacc\t"
/external/llvm/lib/Target/X86/
DX86Instr3DNow.td101 defm PFNACC : I3DNow_binop_rm_int<0x8A, "pfnacc", "a">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86Instr3DNow.td109 defm PFNACC : I3DNow_binop_rm_int<0x8A, "pfnacc", WriteFAdd, 0, "a">;
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsics.gen121 x86_3dnowa_pfnacc, // llvm.x86.3dnowa.pfnacc
648 "llvm.x86.3dnowa.pfnacc",
3255 return Intrinsic::x86_3dnowa_pfnacc; // "86.3dnowa.pfnacc"
6220 case Intrinsic::x86_3dnowa_pfnacc: // llvm.x86.3dnowa.pfnacc
7552 case Intrinsic::x86_3dnowa_pfnacc: // llvm.x86.3dnowa.pfnacc
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc5425 x86_3dnowa_pfnacc, // llvm.x86.3dnowa.pfnacc
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc6632 "mpgt\005pfmax\005pfmin\005pfmul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpi"
8515 …{ 5599 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, …
8516 …{ 5599 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 …
23055 …{ 5599 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, …
23056 …{ 5599 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 …
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen4441 x86_3dnowa_pfnacc, // llvm.x86.3dnowa.pfnacc
10499 "llvm.x86.3dnowa.pfnacc",
18439 1, // llvm.x86.3dnowa.pfnacc
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen4441 x86_3dnowa_pfnacc, // llvm.x86.3dnowa.pfnacc
10499 "llvm.x86.3dnowa.pfnacc",
18439 1, // llvm.x86.3dnowa.pfnacc
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen4441 x86_3dnowa_pfnacc, // llvm.x86.3dnowa.pfnacc
10499 "llvm.x86.3dnowa.pfnacc",
18439 1, // llvm.x86.3dnowa.pfnacc
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen4435 x86_3dnowa_pfnacc, // llvm.x86.3dnowa.pfnacc
10459 "llvm.x86.3dnowa.pfnacc",
18344 1, // llvm.x86.3dnowa.pfnacc

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