1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|*Target Register Enum Values *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9/* Capstone Disassembly Engine, http://www.capstone-engine.org */ 10/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */ 11 12 13#ifdef GET_REGINFO_ENUM 14#undef GET_REGINFO_ENUM 15 16enum { 17 X86_NoRegister, 18 X86_AH = 1, 19 X86_AL = 2, 20 X86_AX = 3, 21 X86_BH = 4, 22 X86_BL = 5, 23 X86_BP = 6, 24 X86_BPL = 7, 25 X86_BX = 8, 26 X86_CH = 9, 27 X86_CL = 10, 28 X86_CS = 11, 29 X86_CX = 12, 30 X86_DH = 13, 31 X86_DI = 14, 32 X86_DIL = 15, 33 X86_DL = 16, 34 X86_DS = 17, 35 X86_DX = 18, 36 X86_EAX = 19, 37 X86_EBP = 20, 38 X86_EBX = 21, 39 X86_ECX = 22, 40 X86_EDI = 23, 41 X86_EDX = 24, 42 X86_EFLAGS = 25, 43 X86_EIP = 26, 44 X86_EIZ = 27, 45 X86_ES = 28, 46 X86_ESI = 29, 47 X86_ESP = 30, 48 X86_FPSW = 31, 49 X86_FS = 32, 50 X86_GS = 33, 51 X86_IP = 34, 52 X86_RAX = 35, 53 X86_RBP = 36, 54 X86_RBX = 37, 55 X86_RCX = 38, 56 X86_RDI = 39, 57 X86_RDX = 40, 58 X86_RIP = 41, 59 X86_RIZ = 42, 60 X86_RSI = 43, 61 X86_RSP = 44, 62 X86_SI = 45, 63 X86_SIL = 46, 64 X86_SP = 47, 65 X86_SPL = 48, 66 X86_SS = 49, 67 X86_CR0 = 50, 68 X86_CR1 = 51, 69 X86_CR2 = 52, 70 X86_CR3 = 53, 71 X86_CR4 = 54, 72 X86_CR5 = 55, 73 X86_CR6 = 56, 74 X86_CR7 = 57, 75 X86_CR8 = 58, 76 X86_CR9 = 59, 77 X86_CR10 = 60, 78 X86_CR11 = 61, 79 X86_CR12 = 62, 80 X86_CR13 = 63, 81 X86_CR14 = 64, 82 X86_CR15 = 65, 83 X86_DR0 = 66, 84 X86_DR1 = 67, 85 X86_DR2 = 68, 86 X86_DR3 = 69, 87 X86_DR4 = 70, 88 X86_DR5 = 71, 89 X86_DR6 = 72, 90 X86_DR7 = 73, 91 X86_FP0 = 74, 92 X86_FP1 = 75, 93 X86_FP2 = 76, 94 X86_FP3 = 77, 95 X86_FP4 = 78, 96 X86_FP5 = 79, 97 X86_FP6 = 80, 98 X86_FP7 = 81, 99 X86_K0 = 82, 100 X86_K1 = 83, 101 X86_K2 = 84, 102 X86_K3 = 85, 103 X86_K4 = 86, 104 X86_K5 = 87, 105 X86_K6 = 88, 106 X86_K7 = 89, 107 X86_MM0 = 90, 108 X86_MM1 = 91, 109 X86_MM2 = 92, 110 X86_MM3 = 93, 111 X86_MM4 = 94, 112 X86_MM5 = 95, 113 X86_MM6 = 96, 114 X86_MM7 = 97, 115 X86_R8 = 98, 116 X86_R9 = 99, 117 X86_R10 = 100, 118 X86_R11 = 101, 119 X86_R12 = 102, 120 X86_R13 = 103, 121 X86_R14 = 104, 122 X86_R15 = 105, 123 X86_ST0 = 106, 124 X86_ST1 = 107, 125 X86_ST2 = 108, 126 X86_ST3 = 109, 127 X86_ST4 = 110, 128 X86_ST5 = 111, 129 X86_ST6 = 112, 130 X86_ST7 = 113, 131 X86_XMM0 = 114, 132 X86_XMM1 = 115, 133 X86_XMM2 = 116, 134 X86_XMM3 = 117, 135 X86_XMM4 = 118, 136 X86_XMM5 = 119, 137 X86_XMM6 = 120, 138 X86_XMM7 = 121, 139 X86_XMM8 = 122, 140 X86_XMM9 = 123, 141 X86_XMM10 = 124, 142 X86_XMM11 = 125, 143 X86_XMM12 = 126, 144 X86_XMM13 = 127, 145 X86_XMM14 = 128, 146 X86_XMM15 = 129, 147 X86_XMM16 = 130, 148 X86_XMM17 = 131, 149 X86_XMM18 = 132, 150 X86_XMM19 = 133, 151 X86_XMM20 = 134, 152 X86_XMM21 = 135, 153 X86_XMM22 = 136, 154 X86_XMM23 = 137, 155 X86_XMM24 = 138, 156 X86_XMM25 = 139, 157 X86_XMM26 = 140, 158 X86_XMM27 = 141, 159 X86_XMM28 = 142, 160 X86_XMM29 = 143, 161 X86_XMM30 = 144, 162 X86_XMM31 = 145, 163 X86_YMM0 = 146, 164 X86_YMM1 = 147, 165 X86_YMM2 = 148, 166 X86_YMM3 = 149, 167 X86_YMM4 = 150, 168 X86_YMM5 = 151, 169 X86_YMM6 = 152, 170 X86_YMM7 = 153, 171 X86_YMM8 = 154, 172 X86_YMM9 = 155, 173 X86_YMM10 = 156, 174 X86_YMM11 = 157, 175 X86_YMM12 = 158, 176 X86_YMM13 = 159, 177 X86_YMM14 = 160, 178 X86_YMM15 = 161, 179 X86_YMM16 = 162, 180 X86_YMM17 = 163, 181 X86_YMM18 = 164, 182 X86_YMM19 = 165, 183 X86_YMM20 = 166, 184 X86_YMM21 = 167, 185 X86_YMM22 = 168, 186 X86_YMM23 = 169, 187 X86_YMM24 = 170, 188 X86_YMM25 = 171, 189 X86_YMM26 = 172, 190 X86_YMM27 = 173, 191 X86_YMM28 = 174, 192 X86_YMM29 = 175, 193 X86_YMM30 = 176, 194 X86_YMM31 = 177, 195 X86_ZMM0 = 178, 196 X86_ZMM1 = 179, 197 X86_ZMM2 = 180, 198 X86_ZMM3 = 181, 199 X86_ZMM4 = 182, 200 X86_ZMM5 = 183, 201 X86_ZMM6 = 184, 202 X86_ZMM7 = 185, 203 X86_ZMM8 = 186, 204 X86_ZMM9 = 187, 205 X86_ZMM10 = 188, 206 X86_ZMM11 = 189, 207 X86_ZMM12 = 190, 208 X86_ZMM13 = 191, 209 X86_ZMM14 = 192, 210 X86_ZMM15 = 193, 211 X86_ZMM16 = 194, 212 X86_ZMM17 = 195, 213 X86_ZMM18 = 196, 214 X86_ZMM19 = 197, 215 X86_ZMM20 = 198, 216 X86_ZMM21 = 199, 217 X86_ZMM22 = 200, 218 X86_ZMM23 = 201, 219 X86_ZMM24 = 202, 220 X86_ZMM25 = 203, 221 X86_ZMM26 = 204, 222 X86_ZMM27 = 205, 223 X86_ZMM28 = 206, 224 X86_ZMM29 = 207, 225 X86_ZMM30 = 208, 226 X86_ZMM31 = 209, 227 X86_R8B = 210, 228 X86_R9B = 211, 229 X86_R10B = 212, 230 X86_R11B = 213, 231 X86_R12B = 214, 232 X86_R13B = 215, 233 X86_R14B = 216, 234 X86_R15B = 217, 235 X86_R8D = 218, 236 X86_R9D = 219, 237 X86_R10D = 220, 238 X86_R11D = 221, 239 X86_R12D = 222, 240 X86_R13D = 223, 241 X86_R14D = 224, 242 X86_R15D = 225, 243 X86_R8W = 226, 244 X86_R9W = 227, 245 X86_R10W = 228, 246 X86_R11W = 229, 247 X86_R12W = 230, 248 X86_R13W = 231, 249 X86_R14W = 232, 250 X86_R15W = 233, 251 X86_NUM_TARGET_REGS // 234 252}; 253 254// Register classes 255enum { 256 X86_GR8RegClassID = 0, 257 X86_GR8_NOREXRegClassID = 1, 258 X86_GR8_ABCD_HRegClassID = 2, 259 X86_GR8_ABCD_LRegClassID = 3, 260 X86_GR16RegClassID = 4, 261 X86_GR16_NOREXRegClassID = 5, 262 X86_VK1RegClassID = 6, 263 X86_VK16RegClassID = 7, 264 X86_VK2RegClassID = 8, 265 X86_VK4RegClassID = 9, 266 X86_VK8RegClassID = 10, 267 X86_VK16WMRegClassID = 11, 268 X86_VK1WMRegClassID = 12, 269 X86_VK2WMRegClassID = 13, 270 X86_VK4WMRegClassID = 14, 271 X86_VK8WMRegClassID = 15, 272 X86_SEGMENT_REGRegClassID = 16, 273 X86_GR16_ABCDRegClassID = 17, 274 X86_FPCCRRegClassID = 18, 275 X86_FR32XRegClassID = 19, 276 X86_FR32RegClassID = 20, 277 X86_GR32RegClassID = 21, 278 X86_GR32_NOAXRegClassID = 22, 279 X86_GR32_NOSPRegClassID = 23, 280 X86_GR32_NOAX_and_GR32_NOSPRegClassID = 24, 281 X86_DEBUG_REGRegClassID = 25, 282 X86_GR32_NOREXRegClassID = 26, 283 X86_VK32RegClassID = 27, 284 X86_GR32_NOAX_and_GR32_NOREXRegClassID = 28, 285 X86_GR32_NOREX_NOSPRegClassID = 29, 286 X86_RFP32RegClassID = 30, 287 X86_VK32WMRegClassID = 31, 288 X86_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID = 32, 289 X86_GR32_ABCDRegClassID = 33, 290 X86_GR32_ABCD_and_GR32_NOAXRegClassID = 34, 291 X86_GR32_TCRegClassID = 35, 292 X86_GR32_ADRegClassID = 36, 293 X86_GR32_NOAX_and_GR32_TCRegClassID = 37, 294 X86_CCRRegClassID = 38, 295 X86_GR32_AD_and_GR32_NOAXRegClassID = 39, 296 X86_RFP64RegClassID = 40, 297 X86_FR64XRegClassID = 41, 298 X86_GR64RegClassID = 42, 299 X86_CONTROL_REGRegClassID = 43, 300 X86_FR64RegClassID = 44, 301 X86_GR64_with_sub_8bitRegClassID = 45, 302 X86_GR64_NOSPRegClassID = 46, 303 X86_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 47, 304 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPRegClassID = 48, 305 X86_GR64_NOREXRegClassID = 49, 306 X86_GR64_TCRegClassID = 50, 307 X86_GR64_NOSP_and_GR64_TCRegClassID = 51, 308 X86_GR64_with_sub_16bit_in_GR16_NOREXRegClassID = 52, 309 X86_VK64RegClassID = 53, 310 X86_VR64RegClassID = 54, 311 X86_GR64_NOREX_NOSPRegClassID = 55, 312 X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 56, 313 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID = 57, 314 X86_VK64WMRegClassID = 58, 315 X86_GR64_NOREX_and_GR64_TCRegClassID = 59, 316 X86_GR64_TCW64RegClassID = 60, 317 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID = 61, 318 X86_GR64_NOREX_NOSP_and_GR64_TCRegClassID = 62, 319 X86_GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 63, 320 X86_GR64_ABCDRegClassID = 64, 321 X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID = 65, 322 X86_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXRegClassID = 66, 323 X86_GR64_with_sub_32bit_in_GR32_TCRegClassID = 67, 324 X86_GR64_with_sub_32bit_in_GR32_ADRegClassID = 68, 325 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCRegClassID = 69, 326 X86_GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXRegClassID = 70, 327 X86_RSTRegClassID = 71, 328 X86_RFP80RegClassID = 72, 329 X86_VR128XRegClassID = 73, 330 X86_VR128RegClassID = 74, 331 X86_VR256XRegClassID = 75, 332 X86_VR256RegClassID = 76, 333 X86_VR512RegClassID = 77, 334 X86_VR512_with_sub_xmm_in_FR32RegClassID = 78 335}; 336 337#endif // GET_REGINFO_ENUM 338 339#ifdef GET_REGINFO_MC_DESC 340#undef GET_REGINFO_MC_DESC 341 342static MCPhysReg X86RegDiffLists[] = { 343 /* 0 */ 0, 1, 0, 344 /* 3 */ 2, 1, 0, 345 /* 6 */ 5, 1, 0, 346 /* 9 */ 65522, 16, 1, 0, 347 /* 13 */ 65522, 17, 1, 0, 348 /* 17 */ 65427, 1, 0, 349 /* 20 */ 65475, 1, 0, 350 /* 23 */ 65520, 65522, 1, 0, 351 /* 27 */ 65520, 65527, 1, 0, 352 /* 31 */ 8, 2, 0, 353 /* 34 */ 4, 0, 354 /* 36 */ 65521, 8, 0, 355 /* 39 */ 9, 0, 356 /* 41 */ 13, 0, 357 /* 43 */ 65535, 65519, 14, 0, 358 /* 47 */ 65535, 65520, 14, 0, 359 /* 51 */ 65528, 15, 0, 360 /* 54 */ 2, 6, 16, 0, 361 /* 58 */ 5, 6, 16, 0, 362 /* 62 */ 65535, 9, 16, 0, 363 /* 66 */ 2, 10, 16, 0, 364 /* 70 */ 3, 10, 16, 0, 365 /* 74 */ 3, 13, 16, 0, 366 /* 78 */ 4, 13, 16, 0, 367 /* 82 */ 65535, 14, 16, 0, 368 /* 86 */ 1, 16, 16, 0, 369 /* 90 */ 2, 16, 16, 0, 370 /* 94 */ 17, 0, 371 /* 96 */ 32, 32, 0, 372 /* 99 */ 65221, 0, 373 /* 101 */ 65381, 0, 374 /* 103 */ 65389, 0, 375 /* 105 */ 65397, 0, 376 /* 107 */ 16, 65528, 65416, 0, 377 /* 111 */ 65445, 0, 378 /* 113 */ 65477, 0, 379 /* 115 */ 65504, 65504, 0, 380 /* 118 */ 65509, 0, 381 /* 120 */ 120, 8, 65520, 0, 382 /* 124 */ 65523, 0, 383 /* 126 */ 65530, 0, 384 /* 128 */ 65531, 0, 385 /* 130 */ 65532, 0, 386 /* 132 */ 65520, 65530, 65534, 65533, 0, 387 /* 137 */ 65534, 0, 388 /* 139 */ 65520, 65523, 65533, 65535, 0, 389 /* 144 */ 65520, 65526, 65534, 65535, 0, 390 /* 149 */ 65520, 65520, 65535, 65535, 0, 391}; 392 393static uint16_t X86SubRegIdxLists[] = { 394 /* 0 */ 4, 3, 1, 0, 395 /* 4 */ 4, 3, 1, 2, 0, 396 /* 9 */ 4, 3, 0, 397 /* 12 */ 6, 5, 0, 398}; 399 400static MCRegisterDesc X86RegDesc[] = { // Descriptors 401 { 5, 0, 0, 0, 0 }, 402 { 812, 2, 90, 3, 2273 }, 403 { 840, 2, 86, 3, 2273 }, 404 { 958, 151, 87, 6, 0 }, 405 { 815, 2, 78, 3, 2193 }, 406 { 843, 2, 74, 3, 2193 }, 407 { 869, 1, 83, 2, 544 }, 408 { 860, 2, 82, 3, 544 }, 409 { 966, 141, 75, 6, 48 }, 410 { 818, 2, 70, 3, 2081 }, 411 { 846, 2, 66, 3, 2081 }, 412 { 892, 2, 2, 3, 2081 }, 413 { 974, 146, 67, 6, 96 }, 414 { 821, 2, 58, 3, 2049 }, 415 { 825, 1, 63, 2, 624 }, 416 { 852, 2, 62, 3, 624 }, 417 { 849, 2, 54, 3, 2017 }, 418 { 895, 2, 2, 3, 2017 }, 419 { 982, 134, 55, 6, 496 }, 420 { 957, 150, 56, 5, 0 }, 421 { 868, 24, 56, 1, 544 }, 422 { 965, 140, 56, 5, 323 }, 423 { 973, 145, 56, 5, 323 }, 424 { 824, 28, 56, 1, 624 }, 425 { 981, 133, 56, 5, 496 }, 426 { 904, 2, 2, 3, 1985 }, 427 { 876, 37, 52, 10, 1985 }, 428 { 989, 2, 2, 3, 1985 }, 429 { 898, 2, 2, 3, 1985 }, 430 { 832, 10, 45, 1, 1985 }, 431 { 884, 14, 45, 1, 1985 }, 432 { 952, 2, 2, 3, 1985 }, 433 { 901, 2, 2, 3, 1985 }, 434 { 908, 2, 2, 3, 1985 }, 435 { 877, 2, 51, 3, 656 }, 436 { 961, 149, 2, 4, 0 }, 437 { 872, 23, 2, 0, 544 }, 438 { 969, 139, 2, 4, 275 }, 439 { 977, 144, 2, 4, 275 }, 440 { 828, 27, 2, 0, 624 }, 441 { 985, 132, 2, 4, 496 }, 442 { 880, 36, 2, 9, 1592 }, 443 { 993, 2, 2, 3, 1592 }, 444 { 836, 9, 2, 0, 1889 }, 445 { 888, 13, 2, 0, 1889 }, 446 { 833, 1, 48, 2, 896 }, 447 { 856, 2, 47, 3, 896 }, 448 { 885, 1, 44, 2, 1504 }, 449 { 864, 2, 43, 3, 1504 }, 450 { 911, 2, 2, 3, 1889 }, 451 { 81, 2, 2, 3, 1889 }, 452 { 174, 2, 2, 3, 1889 }, 453 { 249, 2, 2, 3, 1889 }, 454 { 324, 2, 2, 3, 1889 }, 455 { 399, 2, 2, 3, 1889 }, 456 { 474, 2, 2, 3, 1889 }, 457 { 544, 2, 2, 3, 1889 }, 458 { 614, 2, 2, 3, 1889 }, 459 { 677, 2, 2, 3, 1889 }, 460 { 732, 2, 2, 3, 1889 }, 461 { 18, 2, 2, 3, 1889 }, 462 { 111, 2, 2, 3, 1889 }, 463 { 204, 2, 2, 3, 1889 }, 464 { 279, 2, 2, 3, 1889 }, 465 { 354, 2, 2, 3, 1889 }, 466 { 429, 2, 2, 3, 1889 }, 467 { 85, 2, 2, 3, 1889 }, 468 { 178, 2, 2, 3, 1889 }, 469 { 253, 2, 2, 3, 1889 }, 470 { 328, 2, 2, 3, 1889 }, 471 { 403, 2, 2, 3, 1889 }, 472 { 478, 2, 2, 3, 1889 }, 473 { 548, 2, 2, 3, 1889 }, 474 { 618, 2, 2, 3, 1889 }, 475 { 77, 2, 2, 3, 1889 }, 476 { 170, 2, 2, 3, 1889 }, 477 { 245, 2, 2, 3, 1889 }, 478 { 320, 2, 2, 3, 1889 }, 479 { 395, 2, 2, 3, 1889 }, 480 { 470, 2, 2, 3, 1889 }, 481 { 540, 2, 2, 3, 1889 }, 482 { 610, 2, 2, 3, 1889 }, 483 { 59, 2, 2, 3, 1889 }, 484 { 152, 2, 2, 3, 1889 }, 485 { 227, 2, 2, 3, 1889 }, 486 { 302, 2, 2, 3, 1889 }, 487 { 377, 2, 2, 3, 1889 }, 488 { 452, 2, 2, 3, 1889 }, 489 { 522, 2, 2, 3, 1889 }, 490 { 592, 2, 2, 3, 1889 }, 491 { 63, 2, 2, 3, 1889 }, 492 { 156, 2, 2, 3, 1889 }, 493 { 231, 2, 2, 3, 1889 }, 494 { 306, 2, 2, 3, 1889 }, 495 { 381, 2, 2, 3, 1889 }, 496 { 456, 2, 2, 3, 1889 }, 497 { 526, 2, 2, 3, 1889 }, 498 { 596, 2, 2, 3, 1889 }, 499 { 678, 120, 2, 0, 1889 }, 500 { 733, 120, 2, 0, 1889 }, 501 { 19, 120, 2, 0, 1889 }, 502 { 112, 120, 2, 0, 1889 }, 503 { 205, 120, 2, 0, 1889 }, 504 { 280, 120, 2, 0, 1889 }, 505 { 355, 120, 2, 0, 1889 }, 506 { 430, 120, 2, 0, 1889 }, 507 { 89, 2, 2, 3, 1889 }, 508 { 182, 2, 2, 3, 1889 }, 509 { 257, 2, 2, 3, 1889 }, 510 { 332, 2, 2, 3, 1889 }, 511 { 407, 2, 2, 3, 1889 }, 512 { 482, 2, 2, 3, 1889 }, 513 { 552, 2, 2, 3, 1889 }, 514 { 622, 2, 2, 3, 1889 }, 515 { 62, 2, 96, 3, 1889 }, 516 { 155, 2, 96, 3, 1889 }, 517 { 230, 2, 96, 3, 1889 }, 518 { 305, 2, 96, 3, 1889 }, 519 { 380, 2, 96, 3, 1889 }, 520 { 455, 2, 96, 3, 1889 }, 521 { 525, 2, 96, 3, 1889 }, 522 { 595, 2, 96, 3, 1889 }, 523 { 662, 2, 96, 3, 1889 }, 524 { 717, 2, 96, 3, 1889 }, 525 { 0, 2, 96, 3, 1889 }, 526 { 93, 2, 96, 3, 1889 }, 527 { 186, 2, 96, 3, 1889 }, 528 { 261, 2, 96, 3, 1889 }, 529 { 336, 2, 96, 3, 1889 }, 530 { 411, 2, 96, 3, 1889 }, 531 { 486, 2, 96, 3, 1889 }, 532 { 556, 2, 96, 3, 1889 }, 533 { 626, 2, 96, 3, 1889 }, 534 { 681, 2, 96, 3, 1889 }, 535 { 23, 2, 96, 3, 1889 }, 536 { 116, 2, 96, 3, 1889 }, 537 { 209, 2, 96, 3, 1889 }, 538 { 284, 2, 96, 3, 1889 }, 539 { 359, 2, 96, 3, 1889 }, 540 { 434, 2, 96, 3, 1889 }, 541 { 504, 2, 96, 3, 1889 }, 542 { 574, 2, 96, 3, 1889 }, 543 { 644, 2, 96, 3, 1889 }, 544 { 699, 2, 96, 3, 1889 }, 545 { 41, 2, 96, 3, 1889 }, 546 { 134, 2, 96, 3, 1889 }, 547 { 67, 116, 97, 13, 1809 }, 548 { 160, 116, 97, 13, 1809 }, 549 { 235, 116, 97, 13, 1809 }, 550 { 310, 116, 97, 13, 1809 }, 551 { 385, 116, 97, 13, 1809 }, 552 { 460, 116, 97, 13, 1809 }, 553 { 530, 116, 97, 13, 1809 }, 554 { 600, 116, 97, 13, 1809 }, 555 { 667, 116, 97, 13, 1809 }, 556 { 722, 116, 97, 13, 1809 }, 557 { 6, 116, 97, 13, 1809 }, 558 { 99, 116, 97, 13, 1809 }, 559 { 192, 116, 97, 13, 1809 }, 560 { 267, 116, 97, 13, 1809 }, 561 { 342, 116, 97, 13, 1809 }, 562 { 417, 116, 97, 13, 1809 }, 563 { 492, 116, 97, 13, 1809 }, 564 { 562, 116, 97, 13, 1809 }, 565 { 632, 116, 97, 13, 1809 }, 566 { 687, 116, 97, 13, 1809 }, 567 { 29, 116, 97, 13, 1809 }, 568 { 122, 116, 97, 13, 1809 }, 569 { 215, 116, 97, 13, 1809 }, 570 { 290, 116, 97, 13, 1809 }, 571 { 365, 116, 97, 13, 1809 }, 572 { 440, 116, 97, 13, 1809 }, 573 { 510, 116, 97, 13, 1809 }, 574 { 580, 116, 97, 13, 1809 }, 575 { 650, 116, 97, 13, 1809 }, 576 { 705, 116, 97, 13, 1809 }, 577 { 47, 116, 97, 13, 1809 }, 578 { 140, 116, 97, 13, 1809 }, 579 { 72, 115, 2, 12, 1777 }, 580 { 165, 115, 2, 12, 1777 }, 581 { 240, 115, 2, 12, 1777 }, 582 { 315, 115, 2, 12, 1777 }, 583 { 390, 115, 2, 12, 1777 }, 584 { 465, 115, 2, 12, 1777 }, 585 { 535, 115, 2, 12, 1777 }, 586 { 605, 115, 2, 12, 1777 }, 587 { 672, 115, 2, 12, 1777 }, 588 { 727, 115, 2, 12, 1777 }, 589 { 12, 115, 2, 12, 1777 }, 590 { 105, 115, 2, 12, 1777 }, 591 { 198, 115, 2, 12, 1777 }, 592 { 273, 115, 2, 12, 1777 }, 593 { 348, 115, 2, 12, 1777 }, 594 { 423, 115, 2, 12, 1777 }, 595 { 498, 115, 2, 12, 1777 }, 596 { 568, 115, 2, 12, 1777 }, 597 { 638, 115, 2, 12, 1777 }, 598 { 693, 115, 2, 12, 1777 }, 599 { 35, 115, 2, 12, 1777 }, 600 { 128, 115, 2, 12, 1777 }, 601 { 221, 115, 2, 12, 1777 }, 602 { 296, 115, 2, 12, 1777 }, 603 { 371, 115, 2, 12, 1777 }, 604 { 446, 115, 2, 12, 1777 }, 605 { 516, 115, 2, 12, 1777 }, 606 { 586, 115, 2, 12, 1777 }, 607 { 656, 115, 2, 12, 1777 }, 608 { 711, 115, 2, 12, 1777 }, 609 { 53, 115, 2, 12, 1777 }, 610 { 146, 115, 2, 12, 1777 }, 611 { 766, 2, 107, 3, 1681 }, 612 { 770, 2, 107, 3, 1681 }, 613 { 736, 2, 107, 3, 1681 }, 614 { 741, 2, 107, 3, 1681 }, 615 { 746, 2, 107, 3, 1681 }, 616 { 751, 2, 107, 3, 1681 }, 617 { 756, 2, 107, 3, 1681 }, 618 { 761, 2, 107, 3, 1681 }, 619 { 804, 121, 109, 1, 1649 }, 620 { 808, 121, 109, 1, 1649 }, 621 { 774, 121, 109, 1, 1649 }, 622 { 779, 121, 109, 1, 1649 }, 623 { 784, 121, 109, 1, 1649 }, 624 { 789, 121, 109, 1, 1649 }, 625 { 794, 121, 109, 1, 1649 }, 626 { 799, 121, 109, 1, 1649 }, 627 { 944, 122, 108, 2, 1617 }, 628 { 948, 122, 108, 2, 1617 }, 629 { 914, 122, 108, 2, 1617 }, 630 { 919, 122, 108, 2, 1617 }, 631 { 924, 122, 108, 2, 1617 }, 632 { 929, 122, 108, 2, 1617 }, 633 { 934, 122, 108, 2, 1617 }, 634 { 939, 122, 108, 2, 1617 }, 635}; 636 637 // GR8 Register Class... 638 static MCPhysReg GR8[] = { 639 X86_AL, X86_CL, X86_DL, X86_AH, X86_CH, X86_DH, X86_BL, X86_BH, X86_SIL, X86_DIL, X86_BPL, X86_SPL, X86_R8B, X86_R9B, X86_R10B, X86_R11B, X86_R14B, X86_R15B, X86_R12B, X86_R13B, 640 }; 641 642 // GR8 Bit set. 643 static uint8_t GR8Bits[] = { 644 0xb6, 0xa6, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 645 }; 646 647 // GR8_NOREX Register Class... 648 static MCPhysReg GR8_NOREX[] = { 649 X86_AL, X86_CL, X86_DL, X86_AH, X86_CH, X86_DH, X86_BL, X86_BH, 650 }; 651 652 // GR8_NOREX Bit set. 653 static uint8_t GR8_NOREXBits[] = { 654 0x36, 0x26, 0x01, 655 }; 656 657 // GR8_ABCD_H Register Class... 658 static MCPhysReg GR8_ABCD_H[] = { 659 X86_AH, X86_CH, X86_DH, X86_BH, 660 }; 661 662 // GR8_ABCD_H Bit set. 663 static uint8_t GR8_ABCD_HBits[] = { 664 0x12, 0x22, 665 }; 666 667 // GR8_ABCD_L Register Class... 668 static MCPhysReg GR8_ABCD_L[] = { 669 X86_AL, X86_CL, X86_DL, X86_BL, 670 }; 671 672 // GR8_ABCD_L Bit set. 673 static uint8_t GR8_ABCD_LBits[] = { 674 0x24, 0x04, 0x01, 675 }; 676 677 // GR16 Register Class... 678 static MCPhysReg GR16[] = { 679 X86_AX, X86_CX, X86_DX, X86_SI, X86_DI, X86_BX, X86_BP, X86_SP, X86_R8W, X86_R9W, X86_R10W, X86_R11W, X86_R14W, X86_R15W, X86_R12W, X86_R13W, 680 }; 681 682 // GR16 Bit set. 683 static uint8_t GR16Bits[] = { 684 0x48, 0x51, 0x04, 0x00, 0x00, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 685 }; 686 687 // GR16_NOREX Register Class... 688 static MCPhysReg GR16_NOREX[] = { 689 X86_AX, X86_CX, X86_DX, X86_SI, X86_DI, X86_BX, X86_BP, X86_SP, 690 }; 691 692 // GR16_NOREX Bit set. 693 static uint8_t GR16_NOREXBits[] = { 694 0x48, 0x51, 0x04, 0x00, 0x00, 0xa0, 695 }; 696 697 // VK1 Register Class... 698 static MCPhysReg VK1[] = { 699 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 700 }; 701 702 // VK1 Bit set. 703 static uint8_t VK1Bits[] = { 704 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 705 }; 706 707 // VK16 Register Class... 708 static MCPhysReg VK16[] = { 709 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 710 }; 711 712 // VK16 Bit set. 713 static uint8_t VK16Bits[] = { 714 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 715 }; 716 717 // VK2 Register Class... 718 static MCPhysReg VK2[] = { 719 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 720 }; 721 722 // VK2 Bit set. 723 static uint8_t VK2Bits[] = { 724 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 725 }; 726 727 // VK4 Register Class... 728 static MCPhysReg VK4[] = { 729 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 730 }; 731 732 // VK4 Bit set. 733 static uint8_t VK4Bits[] = { 734 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 735 }; 736 737 // VK8 Register Class... 738 static MCPhysReg VK8[] = { 739 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 740 }; 741 742 // VK8 Bit set. 743 static uint8_t VK8Bits[] = { 744 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 745 }; 746 747 // VK16WM Register Class... 748 static MCPhysReg VK16WM[] = { 749 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 750 }; 751 752 // VK16WM Bit set. 753 static uint8_t VK16WMBits[] = { 754 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 755 }; 756 757 // VK1WM Register Class... 758 static MCPhysReg VK1WM[] = { 759 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 760 }; 761 762 // VK1WM Bit set. 763 static uint8_t VK1WMBits[] = { 764 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 765 }; 766 767 // VK2WM Register Class... 768 static MCPhysReg VK2WM[] = { 769 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 770 }; 771 772 // VK2WM Bit set. 773 static uint8_t VK2WMBits[] = { 774 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 775 }; 776 777 // VK4WM Register Class... 778 static MCPhysReg VK4WM[] = { 779 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 780 }; 781 782 // VK4WM Bit set. 783 static uint8_t VK4WMBits[] = { 784 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 785 }; 786 787 // VK8WM Register Class... 788 static MCPhysReg VK8WM[] = { 789 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 790 }; 791 792 // VK8WM Bit set. 793 static uint8_t VK8WMBits[] = { 794 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 795 }; 796 797 // SEGMENT_REG Register Class... 798 static MCPhysReg SEGMENT_REG[] = { 799 X86_CS, X86_DS, X86_SS, X86_ES, X86_FS, X86_GS, 800 }; 801 802 // SEGMENT_REG Bit set. 803 static uint8_t SEGMENT_REGBits[] = { 804 0x00, 0x08, 0x02, 0x10, 0x03, 0x00, 0x02, 805 }; 806 807 // GR16_ABCD Register Class... 808 static MCPhysReg GR16_ABCD[] = { 809 X86_AX, X86_CX, X86_DX, X86_BX, 810 }; 811 812 // GR16_ABCD Bit set. 813 static uint8_t GR16_ABCDBits[] = { 814 0x08, 0x11, 0x04, 815 }; 816 817 // FPCCR Register Class... 818 static MCPhysReg FPCCR[] = { 819 X86_FPSW, 820 }; 821 822 // FPCCR Bit set. 823 static uint8_t FPCCRBits[] = { 824 0x00, 0x00, 0x00, 0x80, 825 }; 826 827 // FR32X Register Class... 828 static MCPhysReg FR32X[] = { 829 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, 830 }; 831 832 // FR32X Bit set. 833 static uint8_t FR32XBits[] = { 834 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 835 }; 836 837 // FR32 Register Class... 838 static MCPhysReg FR32[] = { 839 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, 840 }; 841 842 // FR32 Bit set. 843 static uint8_t FR32Bits[] = { 844 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 845 }; 846 847 // GR32 Register Class... 848 static MCPhysReg GR32[] = { 849 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 850 }; 851 852 // GR32 Bit set. 853 static uint8_t GR32Bits[] = { 854 0x00, 0x00, 0xf8, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 855 }; 856 857 // GR32_NOAX Register Class... 858 static MCPhysReg GR32_NOAX[] = { 859 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 860 }; 861 862 // GR32_NOAX Bit set. 863 static uint8_t GR32_NOAXBits[] = { 864 0x00, 0x00, 0xf0, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 865 }; 866 867 // GR32_NOSP Register Class... 868 static MCPhysReg GR32_NOSP[] = { 869 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 870 }; 871 872 // GR32_NOSP Bit set. 873 static uint8_t GR32_NOSPBits[] = { 874 0x00, 0x00, 0xf8, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 875 }; 876 877 // GR32_NOAX_and_GR32_NOSP Register Class... 878 static MCPhysReg GR32_NOAX_and_GR32_NOSP[] = { 879 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 880 }; 881 882 // GR32_NOAX_and_GR32_NOSP Bit set. 883 static uint8_t GR32_NOAX_and_GR32_NOSPBits[] = { 884 0x00, 0x00, 0xf0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 885 }; 886 887 // DEBUG_REG Register Class... 888 static MCPhysReg DEBUG_REG[] = { 889 X86_DR0, X86_DR1, X86_DR2, X86_DR3, X86_DR4, X86_DR5, X86_DR6, X86_DR7, 890 }; 891 892 // DEBUG_REG Bit set. 893 static uint8_t DEBUG_REGBits[] = { 894 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 895 }; 896 897 // GR32_NOREX Register Class... 898 static MCPhysReg GR32_NOREX[] = { 899 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, 900 }; 901 902 // GR32_NOREX Bit set. 903 static uint8_t GR32_NOREXBits[] = { 904 0x00, 0x00, 0xf8, 0x61, 905 }; 906 907 // VK32 Register Class... 908 static MCPhysReg VK32[] = { 909 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 910 }; 911 912 // VK32 Bit set. 913 static uint8_t VK32Bits[] = { 914 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 915 }; 916 917 // GR32_NOAX_and_GR32_NOREX Register Class... 918 static MCPhysReg GR32_NOAX_and_GR32_NOREX[] = { 919 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, 920 }; 921 922 // GR32_NOAX_and_GR32_NOREX Bit set. 923 static uint8_t GR32_NOAX_and_GR32_NOREXBits[] = { 924 0x00, 0x00, 0xf0, 0x61, 925 }; 926 927 // GR32_NOREX_NOSP Register Class... 928 static MCPhysReg GR32_NOREX_NOSP[] = { 929 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, 930 }; 931 932 // GR32_NOREX_NOSP Bit set. 933 static uint8_t GR32_NOREX_NOSPBits[] = { 934 0x00, 0x00, 0xf8, 0x21, 935 }; 936 937 // RFP32 Register Class... 938 static MCPhysReg RFP32[] = { 939 X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, 940 }; 941 942 // RFP32 Bit set. 943 static uint8_t RFP32Bits[] = { 944 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 945 }; 946 947 // VK32WM Register Class... 948 static MCPhysReg VK32WM[] = { 949 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 950 }; 951 952 // VK32WM Bit set. 953 static uint8_t VK32WMBits[] = { 954 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 955 }; 956 957 // GR32_NOAX_and_GR32_NOREX_NOSP Register Class... 958 static MCPhysReg GR32_NOAX_and_GR32_NOREX_NOSP[] = { 959 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, 960 }; 961 962 // GR32_NOAX_and_GR32_NOREX_NOSP Bit set. 963 static uint8_t GR32_NOAX_and_GR32_NOREX_NOSPBits[] = { 964 0x00, 0x00, 0xf0, 0x21, 965 }; 966 967 // GR32_ABCD Register Class... 968 static MCPhysReg GR32_ABCD[] = { 969 X86_EAX, X86_ECX, X86_EDX, X86_EBX, 970 }; 971 972 // GR32_ABCD Bit set. 973 static uint8_t GR32_ABCDBits[] = { 974 0x00, 0x00, 0x68, 0x01, 975 }; 976 977 // GR32_ABCD_and_GR32_NOAX Register Class... 978 static MCPhysReg GR32_ABCD_and_GR32_NOAX[] = { 979 X86_ECX, X86_EDX, X86_EBX, 980 }; 981 982 // GR32_ABCD_and_GR32_NOAX Bit set. 983 static uint8_t GR32_ABCD_and_GR32_NOAXBits[] = { 984 0x00, 0x00, 0x60, 0x01, 985 }; 986 987 // GR32_TC Register Class... 988 static MCPhysReg GR32_TC[] = { 989 X86_EAX, X86_ECX, X86_EDX, 990 }; 991 992 // GR32_TC Bit set. 993 static uint8_t GR32_TCBits[] = { 994 0x00, 0x00, 0x48, 0x01, 995 }; 996 997 // GR32_AD Register Class... 998 static MCPhysReg GR32_AD[] = { 999 X86_EAX, X86_EDX, 1000 }; 1001 1002 // GR32_AD Bit set. 1003 static uint8_t GR32_ADBits[] = { 1004 0x00, 0x00, 0x08, 0x01, 1005 }; 1006 1007 // GR32_NOAX_and_GR32_TC Register Class... 1008 static MCPhysReg GR32_NOAX_and_GR32_TC[] = { 1009 X86_ECX, X86_EDX, 1010 }; 1011 1012 // GR32_NOAX_and_GR32_TC Bit set. 1013 static uint8_t GR32_NOAX_and_GR32_TCBits[] = { 1014 0x00, 0x00, 0x40, 0x01, 1015 }; 1016 1017 // CCR Register Class... 1018 static MCPhysReg CCR[] = { 1019 X86_EFLAGS, 1020 }; 1021 1022 // CCR Bit set. 1023 static uint8_t CCRBits[] = { 1024 0x00, 0x00, 0x00, 0x02, 1025 }; 1026 1027 // GR32_AD_and_GR32_NOAX Register Class... 1028 static MCPhysReg GR32_AD_and_GR32_NOAX[] = { 1029 X86_EDX, 1030 }; 1031 1032 // GR32_AD_and_GR32_NOAX Bit set. 1033 static uint8_t GR32_AD_and_GR32_NOAXBits[] = { 1034 0x00, 0x00, 0x00, 0x01, 1035 }; 1036 1037 // RFP64 Register Class... 1038 static MCPhysReg RFP64[] = { 1039 X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, 1040 }; 1041 1042 // RFP64 Bit set. 1043 static uint8_t RFP64Bits[] = { 1044 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 1045 }; 1046 1047 // FR64X Register Class... 1048 static MCPhysReg FR64X[] = { 1049 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, 1050 }; 1051 1052 // FR64X Bit set. 1053 static uint8_t FR64XBits[] = { 1054 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1055 }; 1056 1057 // GR64 Register Class... 1058 static MCPhysReg GR64[] = { 1059 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, X86_RIP, 1060 }; 1061 1062 // GR64 Bit set. 1063 static uint8_t GR64Bits[] = { 1064 0x00, 0x00, 0x00, 0x00, 0xf8, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1065 }; 1066 1067 // CONTROL_REG Register Class... 1068 static MCPhysReg CONTROL_REG[] = { 1069 X86_CR0, X86_CR1, X86_CR2, X86_CR3, X86_CR4, X86_CR5, X86_CR6, X86_CR7, X86_CR8, X86_CR9, X86_CR10, X86_CR11, X86_CR12, X86_CR13, X86_CR14, X86_CR15, 1070 }; 1071 1072 // CONTROL_REG Bit set. 1073 static uint8_t CONTROL_REGBits[] = { 1074 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1075 }; 1076 1077 // FR64 Register Class... 1078 static MCPhysReg FR64[] = { 1079 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, 1080 }; 1081 1082 // FR64 Bit set. 1083 static uint8_t FR64Bits[] = { 1084 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1085 }; 1086 1087 // GR64_with_sub_8bit Register Class... 1088 static MCPhysReg GR64_with_sub_8bit[] = { 1089 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, 1090 }; 1091 1092 // GR64_with_sub_8bit Bit set. 1093 static uint8_t GR64_with_sub_8bitBits[] = { 1094 0x00, 0x00, 0x00, 0x00, 0xf8, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1095 }; 1096 1097 // GR64_NOSP Register Class... 1098 static MCPhysReg GR64_NOSP[] = { 1099 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, 1100 }; 1101 1102 // GR64_NOSP Bit set. 1103 static uint8_t GR64_NOSPBits[] = { 1104 0x00, 0x00, 0x00, 0x00, 0xf8, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1105 }; 1106 1107 // GR64_with_sub_32bit_in_GR32_NOAX Register Class... 1108 static MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX[] = { 1109 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, 1110 }; 1111 1112 // GR64_with_sub_32bit_in_GR32_NOAX Bit set. 1113 static uint8_t GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 1114 0x00, 0x00, 0x00, 0x00, 0xf0, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1115 }; 1116 1117 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP Register Class... 1118 static MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP[] = { 1119 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, 1120 }; 1121 1122 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP Bit set. 1123 static uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits[] = { 1124 0x00, 0x00, 0x00, 0x00, 0xf0, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1125 }; 1126 1127 // GR64_NOREX Register Class... 1128 static MCPhysReg GR64_NOREX[] = { 1129 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, X86_RIP, 1130 }; 1131 1132 // GR64_NOREX Bit set. 1133 static uint8_t GR64_NOREXBits[] = { 1134 0x00, 0x00, 0x00, 0x00, 0xf8, 0x1b, 1135 }; 1136 1137 // GR64_TC Register Class... 1138 static MCPhysReg GR64_TC[] = { 1139 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, X86_RIP, 1140 }; 1141 1142 // GR64_TC Bit set. 1143 static uint8_t GR64_TCBits[] = { 1144 0x00, 0x00, 0x00, 0x00, 0xc8, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1145 }; 1146 1147 // GR64_NOSP_and_GR64_TC Register Class... 1148 static MCPhysReg GR64_NOSP_and_GR64_TC[] = { 1149 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, 1150 }; 1151 1152 // GR64_NOSP_and_GR64_TC Bit set. 1153 static uint8_t GR64_NOSP_and_GR64_TCBits[] = { 1154 0x00, 0x00, 0x00, 0x00, 0xc8, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1155 }; 1156 1157 // GR64_with_sub_16bit_in_GR16_NOREX Register Class... 1158 static MCPhysReg GR64_with_sub_16bit_in_GR16_NOREX[] = { 1159 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, 1160 }; 1161 1162 // GR64_with_sub_16bit_in_GR16_NOREX Bit set. 1163 static uint8_t GR64_with_sub_16bit_in_GR16_NOREXBits[] = { 1164 0x00, 0x00, 0x00, 0x00, 0xf8, 0x19, 1165 }; 1166 1167 // VK64 Register Class... 1168 static MCPhysReg VK64[] = { 1169 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 1170 }; 1171 1172 // VK64 Bit set. 1173 static uint8_t VK64Bits[] = { 1174 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1175 }; 1176 1177 // VR64 Register Class... 1178 static MCPhysReg VR64[] = { 1179 X86_MM0, X86_MM1, X86_MM2, X86_MM3, X86_MM4, X86_MM5, X86_MM6, X86_MM7, 1180 }; 1181 1182 // VR64 Bit set. 1183 static uint8_t VR64Bits[] = { 1184 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1185 }; 1186 1187 // GR64_NOREX_NOSP Register Class... 1188 static MCPhysReg GR64_NOREX_NOSP[] = { 1189 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, 1190 }; 1191 1192 // GR64_NOREX_NOSP Bit set. 1193 static uint8_t GR64_NOREX_NOSPBits[] = { 1194 0x00, 0x00, 0x00, 0x00, 0xf8, 0x09, 1195 }; 1196 1197 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX Register Class... 1198 static MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX[] = { 1199 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, 1200 }; 1201 1202 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX Bit set. 1203 static uint8_t GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 1204 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1205 }; 1206 1207 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Register Class... 1208 static MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = { 1209 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, 1210 }; 1211 1212 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Bit set. 1213 static uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits[] = { 1214 0x00, 0x00, 0x00, 0x00, 0xf0, 0x19, 1215 }; 1216 1217 // VK64WM Register Class... 1218 static MCPhysReg VK64WM[] = { 1219 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 1220 }; 1221 1222 // VK64WM Bit set. 1223 static uint8_t VK64WMBits[] = { 1224 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 1225 }; 1226 1227 // GR64_NOREX_and_GR64_TC Register Class... 1228 static MCPhysReg GR64_NOREX_and_GR64_TC[] = { 1229 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RIP, 1230 }; 1231 1232 // GR64_NOREX_and_GR64_TC Bit set. 1233 static uint8_t GR64_NOREX_and_GR64_TCBits[] = { 1234 0x00, 0x00, 0x00, 0x00, 0xc8, 0x0b, 1235 }; 1236 1237 // GR64_TCW64 Register Class... 1238 static MCPhysReg GR64_TCW64[] = { 1239 X86_RAX, X86_RCX, X86_RDX, X86_R8, X86_R9, X86_R11, 1240 }; 1241 1242 // GR64_TCW64 Bit set. 1243 static uint8_t GR64_TCW64Bits[] = { 1244 0x00, 0x00, 0x00, 0x00, 0x48, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1245 }; 1246 1247 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP Register Class... 1248 static MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP[] = { 1249 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, 1250 }; 1251 1252 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP Bit set. 1253 static uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits[] = { 1254 0x00, 0x00, 0x00, 0x00, 0xf0, 0x09, 1255 }; 1256 1257 // GR64_NOREX_NOSP_and_GR64_TC Register Class... 1258 static MCPhysReg GR64_NOREX_NOSP_and_GR64_TC[] = { 1259 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, 1260 }; 1261 1262 // GR64_NOREX_NOSP_and_GR64_TC Bit set. 1263 static uint8_t GR64_NOREX_NOSP_and_GR64_TCBits[] = { 1264 0x00, 0x00, 0x00, 0x00, 0xc8, 0x09, 1265 }; 1266 1267 // GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX Register Class... 1268 static MCPhysReg GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX[] = { 1269 X86_RCX, X86_RDX, X86_R8, X86_R9, X86_R11, 1270 }; 1271 1272 // GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX Bit set. 1273 static uint8_t GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 1274 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1275 }; 1276 1277 // GR64_ABCD Register Class... 1278 static MCPhysReg GR64_ABCD[] = { 1279 X86_RAX, X86_RCX, X86_RDX, X86_RBX, 1280 }; 1281 1282 // GR64_ABCD Bit set. 1283 static uint8_t GR64_ABCDBits[] = { 1284 0x00, 0x00, 0x00, 0x00, 0x68, 0x01, 1285 }; 1286 1287 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Register Class... 1288 static MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = { 1289 X86_RCX, X86_RDX, X86_RSI, X86_RDI, 1290 }; 1291 1292 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Bit set. 1293 static uint8_t GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits[] = { 1294 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 1295 }; 1296 1297 // GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX Register Class... 1298 static MCPhysReg GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX[] = { 1299 X86_RCX, X86_RDX, X86_RBX, 1300 }; 1301 1302 // GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX Bit set. 1303 static uint8_t GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits[] = { 1304 0x00, 0x00, 0x00, 0x00, 0x60, 0x01, 1305 }; 1306 1307 // GR64_with_sub_32bit_in_GR32_TC Register Class... 1308 static MCPhysReg GR64_with_sub_32bit_in_GR32_TC[] = { 1309 X86_RAX, X86_RCX, X86_RDX, 1310 }; 1311 1312 // GR64_with_sub_32bit_in_GR32_TC Bit set. 1313 static uint8_t GR64_with_sub_32bit_in_GR32_TCBits[] = { 1314 0x00, 0x00, 0x00, 0x00, 0x48, 0x01, 1315 }; 1316 1317 // GR64_with_sub_32bit_in_GR32_AD Register Class... 1318 static MCPhysReg GR64_with_sub_32bit_in_GR32_AD[] = { 1319 X86_RAX, X86_RDX, 1320 }; 1321 1322 // GR64_with_sub_32bit_in_GR32_AD Bit set. 1323 static uint8_t GR64_with_sub_32bit_in_GR32_ADBits[] = { 1324 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, 1325 }; 1326 1327 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC Register Class... 1328 static MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC[] = { 1329 X86_RCX, X86_RDX, 1330 }; 1331 1332 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC Bit set. 1333 static uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits[] = { 1334 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 1335 }; 1336 1337 // GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX Register Class... 1338 static MCPhysReg GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX[] = { 1339 X86_RDX, 1340 }; 1341 1342 // GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX Bit set. 1343 static uint8_t GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits[] = { 1344 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 1345 }; 1346 1347 // RST Register Class... 1348 static MCPhysReg RST[] = { 1349 X86_ST0, X86_ST1, X86_ST2, X86_ST3, X86_ST4, X86_ST5, X86_ST6, X86_ST7, 1350 }; 1351 1352 // RST Bit set. 1353 static uint8_t RSTBits[] = { 1354 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1355 }; 1356 1357 // RFP80 Register Class... 1358 static MCPhysReg RFP80[] = { 1359 X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, 1360 }; 1361 1362 // RFP80 Bit set. 1363 static uint8_t RFP80Bits[] = { 1364 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 1365 }; 1366 1367 // VR128X Register Class... 1368 static MCPhysReg VR128X[] = { 1369 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, 1370 }; 1371 1372 // VR128X Bit set. 1373 static uint8_t VR128XBits[] = { 1374 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1375 }; 1376 1377 // VR128 Register Class... 1378 static MCPhysReg VR128[] = { 1379 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, 1380 }; 1381 1382 // VR128 Bit set. 1383 static uint8_t VR128Bits[] = { 1384 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1385 }; 1386 1387 // VR256X Register Class... 1388 static MCPhysReg VR256X[] = { 1389 X86_YMM0, X86_YMM1, X86_YMM2, X86_YMM3, X86_YMM4, X86_YMM5, X86_YMM6, X86_YMM7, X86_YMM8, X86_YMM9, X86_YMM10, X86_YMM11, X86_YMM12, X86_YMM13, X86_YMM14, X86_YMM15, X86_YMM16, X86_YMM17, X86_YMM18, X86_YMM19, X86_YMM20, X86_YMM21, X86_YMM22, X86_YMM23, X86_YMM24, X86_YMM25, X86_YMM26, X86_YMM27, X86_YMM28, X86_YMM29, X86_YMM30, X86_YMM31, 1390 }; 1391 1392 // VR256X Bit set. 1393 static uint8_t VR256XBits[] = { 1394 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1395 }; 1396 1397 // VR256 Register Class... 1398 static MCPhysReg VR256[] = { 1399 X86_YMM0, X86_YMM1, X86_YMM2, X86_YMM3, X86_YMM4, X86_YMM5, X86_YMM6, X86_YMM7, X86_YMM8, X86_YMM9, X86_YMM10, X86_YMM11, X86_YMM12, X86_YMM13, X86_YMM14, X86_YMM15, 1400 }; 1401 1402 // VR256 Bit set. 1403 static uint8_t VR256Bits[] = { 1404 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1405 }; 1406 1407 // VR512 Register Class... 1408 static MCPhysReg VR512[] = { 1409 X86_ZMM0, X86_ZMM1, X86_ZMM2, X86_ZMM3, X86_ZMM4, X86_ZMM5, X86_ZMM6, X86_ZMM7, X86_ZMM8, X86_ZMM9, X86_ZMM10, X86_ZMM11, X86_ZMM12, X86_ZMM13, X86_ZMM14, X86_ZMM15, X86_ZMM16, X86_ZMM17, X86_ZMM18, X86_ZMM19, X86_ZMM20, X86_ZMM21, X86_ZMM22, X86_ZMM23, X86_ZMM24, X86_ZMM25, X86_ZMM26, X86_ZMM27, X86_ZMM28, X86_ZMM29, X86_ZMM30, X86_ZMM31, 1410 }; 1411 1412 // VR512 Bit set. 1413 static uint8_t VR512Bits[] = { 1414 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1415 }; 1416 1417 // VR512_with_sub_xmm_in_FR32 Register Class... 1418 static MCPhysReg VR512_with_sub_xmm_in_FR32[] = { 1419 X86_ZMM0, X86_ZMM1, X86_ZMM2, X86_ZMM3, X86_ZMM4, X86_ZMM5, X86_ZMM6, X86_ZMM7, X86_ZMM8, X86_ZMM9, X86_ZMM10, X86_ZMM11, X86_ZMM12, X86_ZMM13, X86_ZMM14, X86_ZMM15, 1420 }; 1421 1422 // VR512_with_sub_xmm_in_FR32 Bit set. 1423 static uint8_t VR512_with_sub_xmm_in_FR32Bits[] = { 1424 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1425 }; 1426 1427#ifdef CAPSTONE_DIET 1428#define CAPSTONE_REGISTER_CLASS(x) NULL 1429#else 1430#define CAPSTONE_REGISTER_CLASS(x) x 1431#endif 1432 1433static MCRegisterClass X86MCRegisterClasses[] = { 1434 { CAPSTONE_REGISTER_CLASS("GR8"), GR8, GR8Bits, 20, sizeof(GR8Bits), X86_GR8RegClassID, 1, 1, 1, 1 }, 1435 { CAPSTONE_REGISTER_CLASS("GR8_NOREX"), GR8_NOREX, GR8_NOREXBits, 8, sizeof(GR8_NOREXBits), X86_GR8_NOREXRegClassID, 1, 1, 1, 1 }, 1436 { CAPSTONE_REGISTER_CLASS("GR8_ABCD_H"), GR8_ABCD_H, GR8_ABCD_HBits, 4, sizeof(GR8_ABCD_HBits), X86_GR8_ABCD_HRegClassID, 1, 1, 1, 1 }, 1437 { CAPSTONE_REGISTER_CLASS("GR8_ABCD_L"), GR8_ABCD_L, GR8_ABCD_LBits, 4, sizeof(GR8_ABCD_LBits), X86_GR8_ABCD_LRegClassID, 1, 1, 1, 1 }, 1438 { CAPSTONE_REGISTER_CLASS("GR16"), GR16, GR16Bits, 16, sizeof(GR16Bits), X86_GR16RegClassID, 2, 2, 1, 1 }, 1439 { CAPSTONE_REGISTER_CLASS("GR16_NOREX"), GR16_NOREX, GR16_NOREXBits, 8, sizeof(GR16_NOREXBits), X86_GR16_NOREXRegClassID, 2, 2, 1, 1 }, 1440 { CAPSTONE_REGISTER_CLASS("VK1"), VK1, VK1Bits, 8, sizeof(VK1Bits), X86_VK1RegClassID, 2, 2, 1, 1 }, 1441 { CAPSTONE_REGISTER_CLASS("VK16"), VK16, VK16Bits, 8, sizeof(VK16Bits), X86_VK16RegClassID, 2, 2, 1, 1 }, 1442 { CAPSTONE_REGISTER_CLASS("VK2"), VK2, VK2Bits, 8, sizeof(VK2Bits), X86_VK2RegClassID, 2, 2, 1, 1 }, 1443 { CAPSTONE_REGISTER_CLASS("VK4"), VK4, VK4Bits, 8, sizeof(VK4Bits), X86_VK4RegClassID, 2, 2, 1, 1 }, 1444 { CAPSTONE_REGISTER_CLASS("VK8"), VK8, VK8Bits, 8, sizeof(VK8Bits), X86_VK8RegClassID, 2, 2, 1, 1 }, 1445 { CAPSTONE_REGISTER_CLASS("VK16WM"), VK16WM, VK16WMBits, 7, sizeof(VK16WMBits), X86_VK16WMRegClassID, 2, 2, 1, 1 }, 1446 { CAPSTONE_REGISTER_CLASS("VK1WM"), VK1WM, VK1WMBits, 7, sizeof(VK1WMBits), X86_VK1WMRegClassID, 2, 2, 1, 1 }, 1447 { CAPSTONE_REGISTER_CLASS("VK2WM"), VK2WM, VK2WMBits, 7, sizeof(VK2WMBits), X86_VK2WMRegClassID, 2, 2, 1, 1 }, 1448 { CAPSTONE_REGISTER_CLASS("VK4WM"), VK4WM, VK4WMBits, 7, sizeof(VK4WMBits), X86_VK4WMRegClassID, 2, 2, 1, 1 }, 1449 { CAPSTONE_REGISTER_CLASS("VK8WM"), VK8WM, VK8WMBits, 7, sizeof(VK8WMBits), X86_VK8WMRegClassID, 2, 2, 1, 1 }, 1450 { CAPSTONE_REGISTER_CLASS("SEGMENT_REG"), SEGMENT_REG, SEGMENT_REGBits, 6, sizeof(SEGMENT_REGBits), X86_SEGMENT_REGRegClassID, 2, 2, 1, 1 }, 1451 { CAPSTONE_REGISTER_CLASS("GR16_ABCD"), GR16_ABCD, GR16_ABCDBits, 4, sizeof(GR16_ABCDBits), X86_GR16_ABCDRegClassID, 2, 2, 1, 1 }, 1452 { CAPSTONE_REGISTER_CLASS("FPCCR"), FPCCR, FPCCRBits, 1, sizeof(FPCCRBits), X86_FPCCRRegClassID, 2, 2, -1, 0 }, 1453 { CAPSTONE_REGISTER_CLASS("FR32X"), FR32X, FR32XBits, 32, sizeof(FR32XBits), X86_FR32XRegClassID, 4, 4, 1, 1 }, 1454 { CAPSTONE_REGISTER_CLASS("FR32"), FR32, FR32Bits, 16, sizeof(FR32Bits), X86_FR32RegClassID, 4, 4, 1, 1 }, 1455 { CAPSTONE_REGISTER_CLASS("GR32"), GR32, GR32Bits, 16, sizeof(GR32Bits), X86_GR32RegClassID, 4, 4, 1, 1 }, 1456 { CAPSTONE_REGISTER_CLASS("GR32_NOAX"), GR32_NOAX, GR32_NOAXBits, 15, sizeof(GR32_NOAXBits), X86_GR32_NOAXRegClassID, 4, 4, 1, 1 }, 1457 { CAPSTONE_REGISTER_CLASS("GR32_NOSP"), GR32_NOSP, GR32_NOSPBits, 15, sizeof(GR32_NOSPBits), X86_GR32_NOSPRegClassID, 4, 4, 1, 1 }, 1458 { CAPSTONE_REGISTER_CLASS("GR32_NOAX_and_GR32_NOSP"), GR32_NOAX_and_GR32_NOSP, GR32_NOAX_and_GR32_NOSPBits, 14, sizeof(GR32_NOAX_and_GR32_NOSPBits), X86_GR32_NOAX_and_GR32_NOSPRegClassID, 4, 4, 1, 1 }, 1459 { CAPSTONE_REGISTER_CLASS("DEBUG_REG"), DEBUG_REG, DEBUG_REGBits, 8, sizeof(DEBUG_REGBits), X86_DEBUG_REGRegClassID, 4, 4, 1, 1 }, 1460 { CAPSTONE_REGISTER_CLASS("GR32_NOREX"), GR32_NOREX, GR32_NOREXBits, 8, sizeof(GR32_NOREXBits), X86_GR32_NOREXRegClassID, 4, 4, 1, 1 }, 1461 { CAPSTONE_REGISTER_CLASS("VK32"), VK32, VK32Bits, 8, sizeof(VK32Bits), X86_VK32RegClassID, 4, 4, 1, 1 }, 1462 { CAPSTONE_REGISTER_CLASS("GR32_NOAX_and_GR32_NOREX"), GR32_NOAX_and_GR32_NOREX, GR32_NOAX_and_GR32_NOREXBits, 7, sizeof(GR32_NOAX_and_GR32_NOREXBits), X86_GR32_NOAX_and_GR32_NOREXRegClassID, 4, 4, 1, 1 }, 1463 { CAPSTONE_REGISTER_CLASS("GR32_NOREX_NOSP"), GR32_NOREX_NOSP, GR32_NOREX_NOSPBits, 7, sizeof(GR32_NOREX_NOSPBits), X86_GR32_NOREX_NOSPRegClassID, 4, 4, 1, 1 }, 1464 { CAPSTONE_REGISTER_CLASS("RFP32"), RFP32, RFP32Bits, 7, sizeof(RFP32Bits), X86_RFP32RegClassID, 4, 4, 1, 1 }, 1465 { CAPSTONE_REGISTER_CLASS("VK32WM"), VK32WM, VK32WMBits, 7, sizeof(VK32WMBits), X86_VK32WMRegClassID, 4, 4, 1, 1 }, 1466 { CAPSTONE_REGISTER_CLASS("GR32_NOAX_and_GR32_NOREX_NOSP"), GR32_NOAX_and_GR32_NOREX_NOSP, GR32_NOAX_and_GR32_NOREX_NOSPBits, 6, sizeof(GR32_NOAX_and_GR32_NOREX_NOSPBits), X86_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID, 4, 4, 1, 1 }, 1467 { CAPSTONE_REGISTER_CLASS("GR32_ABCD"), GR32_ABCD, GR32_ABCDBits, 4, sizeof(GR32_ABCDBits), X86_GR32_ABCDRegClassID, 4, 4, 1, 1 }, 1468 { CAPSTONE_REGISTER_CLASS("GR32_ABCD_and_GR32_NOAX"), GR32_ABCD_and_GR32_NOAX, GR32_ABCD_and_GR32_NOAXBits, 3, sizeof(GR32_ABCD_and_GR32_NOAXBits), X86_GR32_ABCD_and_GR32_NOAXRegClassID, 4, 4, 1, 1 }, 1469 { CAPSTONE_REGISTER_CLASS("GR32_TC"), GR32_TC, GR32_TCBits, 3, sizeof(GR32_TCBits), X86_GR32_TCRegClassID, 4, 4, 1, 1 }, 1470 { CAPSTONE_REGISTER_CLASS("GR32_AD"), GR32_AD, GR32_ADBits, 2, sizeof(GR32_ADBits), X86_GR32_ADRegClassID, 4, 4, 1, 1 }, 1471 { CAPSTONE_REGISTER_CLASS("GR32_NOAX_and_GR32_TC"), GR32_NOAX_and_GR32_TC, GR32_NOAX_and_GR32_TCBits, 2, sizeof(GR32_NOAX_and_GR32_TCBits), X86_GR32_NOAX_and_GR32_TCRegClassID, 4, 4, 1, 1 }, 1472 { CAPSTONE_REGISTER_CLASS("CCR"), CCR, CCRBits, 1, sizeof(CCRBits), X86_CCRRegClassID, 4, 4, -1, 0 }, 1473 { CAPSTONE_REGISTER_CLASS("GR32_AD_and_GR32_NOAX"), GR32_AD_and_GR32_NOAX, GR32_AD_and_GR32_NOAXBits, 1, sizeof(GR32_AD_and_GR32_NOAXBits), X86_GR32_AD_and_GR32_NOAXRegClassID, 4, 4, 1, 1 }, 1474 { CAPSTONE_REGISTER_CLASS("RFP64"), RFP64, RFP64Bits, 7, sizeof(RFP64Bits), X86_RFP64RegClassID, 8, 4, 1, 1 }, 1475 { CAPSTONE_REGISTER_CLASS("FR64X"), FR64X, FR64XBits, 32, sizeof(FR64XBits), X86_FR64XRegClassID, 8, 8, 1, 1 }, 1476 { CAPSTONE_REGISTER_CLASS("GR64"), GR64, GR64Bits, 17, sizeof(GR64Bits), X86_GR64RegClassID, 8, 8, 1, 1 }, 1477 { CAPSTONE_REGISTER_CLASS("CONTROL_REG"), CONTROL_REG, CONTROL_REGBits, 16, sizeof(CONTROL_REGBits), X86_CONTROL_REGRegClassID, 8, 8, 1, 1 }, 1478 { CAPSTONE_REGISTER_CLASS("FR64"), FR64, FR64Bits, 16, sizeof(FR64Bits), X86_FR64RegClassID, 8, 8, 1, 1 }, 1479 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_8bit"), GR64_with_sub_8bit, GR64_with_sub_8bitBits, 16, sizeof(GR64_with_sub_8bitBits), X86_GR64_with_sub_8bitRegClassID, 8, 8, 1, 1 }, 1480 { CAPSTONE_REGISTER_CLASS("GR64_NOSP"), GR64_NOSP, GR64_NOSPBits, 15, sizeof(GR64_NOSPBits), X86_GR64_NOSPRegClassID, 8, 8, 1, 1 }, 1481 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_NOAX"), GR64_with_sub_32bit_in_GR32_NOAX, GR64_with_sub_32bit_in_GR32_NOAXBits, 15, sizeof(GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1482 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP"), GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits, 14, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPRegClassID, 8, 8, 1, 1 }, 1483 { CAPSTONE_REGISTER_CLASS("GR64_NOREX"), GR64_NOREX, GR64_NOREXBits, 9, sizeof(GR64_NOREXBits), X86_GR64_NOREXRegClassID, 8, 8, 1, 1 }, 1484 { CAPSTONE_REGISTER_CLASS("GR64_TC"), GR64_TC, GR64_TCBits, 9, sizeof(GR64_TCBits), X86_GR64_TCRegClassID, 8, 8, 1, 1 }, 1485 { CAPSTONE_REGISTER_CLASS("GR64_NOSP_and_GR64_TC"), GR64_NOSP_and_GR64_TC, GR64_NOSP_and_GR64_TCBits, 8, sizeof(GR64_NOSP_and_GR64_TCBits), X86_GR64_NOSP_and_GR64_TCRegClassID, 8, 8, 1, 1 }, 1486 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_16bit_in_GR16_NOREX"), GR64_with_sub_16bit_in_GR16_NOREX, GR64_with_sub_16bit_in_GR16_NOREXBits, 8, sizeof(GR64_with_sub_16bit_in_GR16_NOREXBits), X86_GR64_with_sub_16bit_in_GR16_NOREXRegClassID, 8, 8, 1, 1 }, 1487 { CAPSTONE_REGISTER_CLASS("VK64"), VK64, VK64Bits, 8, sizeof(VK64Bits), X86_VK64RegClassID, 8, 8, 1, 1 }, 1488 { CAPSTONE_REGISTER_CLASS("VR64"), VR64, VR64Bits, 8, sizeof(VR64Bits), X86_VR64RegClassID, 8, 8, 1, 1 }, 1489 { CAPSTONE_REGISTER_CLASS("GR64_NOREX_NOSP"), GR64_NOREX_NOSP, GR64_NOREX_NOSPBits, 7, sizeof(GR64_NOREX_NOSPBits), X86_GR64_NOREX_NOSPRegClassID, 8, 8, 1, 1 }, 1490 { CAPSTONE_REGISTER_CLASS("GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX"), GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX, GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits, 7, sizeof(GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1491 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX"), GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits, 7, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID, 8, 8, 1, 1 }, 1492 { CAPSTONE_REGISTER_CLASS("VK64WM"), VK64WM, VK64WMBits, 7, sizeof(VK64WMBits), X86_VK64WMRegClassID, 8, 8, 1, 1 }, 1493 { CAPSTONE_REGISTER_CLASS("GR64_NOREX_and_GR64_TC"), GR64_NOREX_and_GR64_TC, GR64_NOREX_and_GR64_TCBits, 6, sizeof(GR64_NOREX_and_GR64_TCBits), X86_GR64_NOREX_and_GR64_TCRegClassID, 8, 8, 1, 1 }, 1494 { CAPSTONE_REGISTER_CLASS("GR64_TCW64"), GR64_TCW64, GR64_TCW64Bits, 6, sizeof(GR64_TCW64Bits), X86_GR64_TCW64RegClassID, 8, 8, 1, 1 }, 1495 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP"), GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits, 6, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID, 8, 8, 1, 1 }, 1496 { CAPSTONE_REGISTER_CLASS("GR64_NOREX_NOSP_and_GR64_TC"), GR64_NOREX_NOSP_and_GR64_TC, GR64_NOREX_NOSP_and_GR64_TCBits, 5, sizeof(GR64_NOREX_NOSP_and_GR64_TCBits), X86_GR64_NOREX_NOSP_and_GR64_TCRegClassID, 8, 8, 1, 1 }, 1497 { CAPSTONE_REGISTER_CLASS("GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX"), GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX, GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits, 5, sizeof(GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1498 { CAPSTONE_REGISTER_CLASS("GR64_ABCD"), GR64_ABCD, GR64_ABCDBits, 4, sizeof(GR64_ABCDBits), X86_GR64_ABCDRegClassID, 8, 8, 1, 1 }, 1499 { CAPSTONE_REGISTER_CLASS("GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX"), GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX, GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits, 4, sizeof(GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits), X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID, 8, 8, 1, 1 }, 1500 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX"), GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX, GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits, 3, sizeof(GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1501 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_TC"), GR64_with_sub_32bit_in_GR32_TC, GR64_with_sub_32bit_in_GR32_TCBits, 3, sizeof(GR64_with_sub_32bit_in_GR32_TCBits), X86_GR64_with_sub_32bit_in_GR32_TCRegClassID, 8, 8, 1, 1 }, 1502 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_AD"), GR64_with_sub_32bit_in_GR32_AD, GR64_with_sub_32bit_in_GR32_ADBits, 2, sizeof(GR64_with_sub_32bit_in_GR32_ADBits), X86_GR64_with_sub_32bit_in_GR32_ADRegClassID, 8, 8, 1, 1 }, 1503 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC"), GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits, 2, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCRegClassID, 8, 8, 1, 1 }, 1504 { CAPSTONE_REGISTER_CLASS("GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX"), GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX, GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits, 1, sizeof(GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1505 { CAPSTONE_REGISTER_CLASS("RST"), RST, RSTBits, 8, sizeof(RSTBits), X86_RSTRegClassID, 10, 4, 1, 0 }, 1506 { CAPSTONE_REGISTER_CLASS("RFP80"), RFP80, RFP80Bits, 7, sizeof(RFP80Bits), X86_RFP80RegClassID, 10, 4, 1, 1 }, 1507 { CAPSTONE_REGISTER_CLASS("VR128X"), VR128X, VR128XBits, 32, sizeof(VR128XBits), X86_VR128XRegClassID, 16, 16, 1, 1 }, 1508 { CAPSTONE_REGISTER_CLASS("VR128"), VR128, VR128Bits, 16, sizeof(VR128Bits), X86_VR128RegClassID, 16, 16, 1, 1 }, 1509 { CAPSTONE_REGISTER_CLASS("VR256X"), VR256X, VR256XBits, 32, sizeof(VR256XBits), X86_VR256XRegClassID, 32, 32, 1, 1 }, 1510 { CAPSTONE_REGISTER_CLASS("VR256"), VR256, VR256Bits, 16, sizeof(VR256Bits), X86_VR256RegClassID, 32, 32, 1, 1 }, 1511 { CAPSTONE_REGISTER_CLASS("VR512"), VR512, VR512Bits, 32, sizeof(VR512Bits), X86_VR512RegClassID, 64, 64, 1, 1 }, 1512 { CAPSTONE_REGISTER_CLASS("VR512_with_sub_xmm_in_FR32"), VR512_with_sub_xmm_in_FR32, VR512_with_sub_xmm_in_FR32Bits, 16, sizeof(VR512_with_sub_xmm_in_FR32Bits), X86_VR512_with_sub_xmm_in_FR32RegClassID, 64, 64, 1, 1 }, 1513}; 1514 1515#endif // GET_REGINFO_MC_DESC 1516