1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevcd_api.c
22 *
23 * @brief
24 *  Contains api functions definitions for HEVC decoder
25 *
26 * @author
27 *  Harish
28 *
29 * @par List of Functions:
30 * - api_check_struct_sanity()
31 * - ihevcd_get_version()
32 * - ihevcd_set_default_params()
33 * - ihevcd_init()
34 * - ihevcd_get_num_rec()
35 * - ihevcd_allocate_static_bufs()
36 * - ihevcd_create()
37 * - ihevcd_retrieve_memrec()
38 * - ihevcd_set_display_frame()
39 * - ihevcd_set_flush_mode()
40 * - ihevcd_get_status()
41 * - ihevcd_get_buf_info()
42 * - ihevcd_set_params()
43 * - ihevcd_reset()
44 * - ihevcd_rel_display_frame()
45 * - ihevcd_disable_deblk()
46 * - ihevcd_get_frame_dimensions()
47 * - ihevcd_set_num_cores()
48 * - ihevcd_ctl()
49 * - ihevcd_cxa_api_function()
50 *
51 * @remarks
52 *  None
53 *
54 *******************************************************************************
55 */
56 /*****************************************************************************/
57 /* File Includes                                                             */
58 /*****************************************************************************/
59 #include <stdio.h>
60 #include <stddef.h>
61 #include <stdlib.h>
62 #include <string.h>
63 
64 #include "ihevc_typedefs.h"
65 #include "iv.h"
66 #include "ivd.h"
67 #include "ihevcd_cxa.h"
68 #include "ithread.h"
69 
70 #include "ihevc_defs.h"
71 #include "ihevc_debug.h"
72 
73 #include "ihevc_structs.h"
74 #include "ihevc_macros.h"
75 #include "ihevc_platform_macros.h"
76 
77 #include "ihevc_buf_mgr.h"
78 #include "ihevc_dpb_mgr.h"
79 #include "ihevc_disp_mgr.h"
80 #include "ihevc_common_tables.h"
81 #include "ihevc_cabac_tables.h"
82 #include "ihevc_error.h"
83 
84 #include "ihevcd_defs.h"
85 #include "ihevcd_trace.h"
86 
87 #include "ihevcd_function_selector.h"
88 #include "ihevcd_structs.h"
89 #include "ihevcd_error.h"
90 #include "ihevcd_utils.h"
91 #include "ihevcd_decode.h"
92 #include "ihevcd_job_queue.h"
93 #include "ihevcd_statistics.h"
94 
95 
96 #define ALIGNED_FREE(ps_codec, y) \
97 if(y) {ps_codec->pf_aligned_free(ps_codec->pv_mem_ctxt, ((void *)y)); (y) = NULL;}
98 
99 /*****************************************************************************/
100 /* Function Prototypes                                                       */
101 /*****************************************************************************/
102 IV_API_CALL_STATUS_T ihevcd_get_version(CHAR *pc_version_string,
103                                         UWORD32 u4_version_buffer_size);
104 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec);
105 
106 
107 /**
108 *******************************************************************************
109 *
110 * @brief
111 *  Used to test arguments for corresponding API call
112 *
113 * @par Description:
114 *  For each command the arguments are validated
115 *
116 * @param[in] ps_handle
117 *  Codec handle at API level
118 *
119 * @param[in] pv_api_ip
120 *  Pointer to input structure
121 *
122 * @param[out] pv_api_op
123 *  Pointer to output structure
124 *
125 * @returns  Status of error checking
126 *
127 * @remarks
128 *
129 *
130 *******************************************************************************
131 */
132 
api_check_struct_sanity(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)133 static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
134                                                     void *pv_api_ip,
135                                                     void *pv_api_op)
136 {
137     IVD_API_COMMAND_TYPE_T e_cmd;
138     UWORD32 *pu4_api_ip;
139     UWORD32 *pu4_api_op;
140     WORD32 i;
141 
142     if(NULL == pv_api_op)
143         return (IV_FAIL);
144 
145     if(NULL == pv_api_ip)
146         return (IV_FAIL);
147 
148     pu4_api_ip = (UWORD32 *)pv_api_ip;
149     pu4_api_op = (UWORD32 *)pv_api_op;
150     e_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
151 
152     *(pu4_api_op + 1) = 0;
153     /* error checks on handle */
154     switch((WORD32)e_cmd)
155     {
156         case IVD_CMD_CREATE:
157             break;
158 
159         case IVD_CMD_REL_DISPLAY_FRAME:
160         case IVD_CMD_SET_DISPLAY_FRAME:
161         case IVD_CMD_GET_DISPLAY_FRAME:
162         case IVD_CMD_VIDEO_DECODE:
163         case IVD_CMD_DELETE:
164         case IVD_CMD_VIDEO_CTL:
165             if(ps_handle == NULL)
166             {
167                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
168                 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
169                 return IV_FAIL;
170             }
171 
172             if(ps_handle->u4_size != sizeof(iv_obj_t))
173             {
174                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
175                 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
176                 return IV_FAIL;
177             }
178 
179 
180             if(ps_handle->pv_codec_handle == NULL)
181             {
182                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
183                 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
184                 return IV_FAIL;
185             }
186             break;
187         default:
188             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
189             *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
190             return IV_FAIL;
191     }
192 
193     switch((WORD32)e_cmd)
194     {
195         case IVD_CMD_CREATE:
196         {
197             ihevcd_cxa_create_ip_t *ps_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
198             ihevcd_cxa_create_op_t *ps_op = (ihevcd_cxa_create_op_t *)pv_api_op;
199 
200 
201             ps_op->s_ivd_create_op_t.u4_error_code = 0;
202 
203             if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ihevcd_cxa_create_ip_t))
204                             || (ps_ip->s_ivd_create_ip_t.u4_size
205                                             < sizeof(ivd_create_ip_t)))
206             {
207                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
208                                 << IVD_UNSUPPORTEDPARAM;
209                 ps_op->s_ivd_create_op_t.u4_error_code |=
210                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
211 
212                 return (IV_FAIL);
213             }
214 
215             if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ihevcd_cxa_create_op_t))
216                             && (ps_op->s_ivd_create_op_t.u4_size
217                                             != sizeof(ivd_create_op_t)))
218             {
219                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
220                                 << IVD_UNSUPPORTEDPARAM;
221                 ps_op->s_ivd_create_op_t.u4_error_code |=
222                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
223 
224                 return (IV_FAIL);
225             }
226 
227 
228             if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
229                             && (ps_ip->s_ivd_create_ip_t.e_output_format
230                                             != IV_YUV_422ILE)
231                             && (ps_ip->s_ivd_create_ip_t.e_output_format
232                                             != IV_RGB_565)
233                             && (ps_ip->s_ivd_create_ip_t.e_output_format
234                                             != IV_YUV_420SP_UV)
235                             && (ps_ip->s_ivd_create_ip_t.e_output_format
236                                             != IV_YUV_420SP_VU))
237             {
238                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
239                                 << IVD_UNSUPPORTEDPARAM;
240                 ps_op->s_ivd_create_op_t.u4_error_code |=
241                                 IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
242 
243                 return (IV_FAIL);
244             }
245 
246         }
247             break;
248 
249         case IVD_CMD_GET_DISPLAY_FRAME:
250         {
251             ihevcd_cxa_get_display_frame_ip_t *ps_ip =
252                             (ihevcd_cxa_get_display_frame_ip_t *)pv_api_ip;
253             ihevcd_cxa_get_display_frame_op_t *ps_op =
254                             (ihevcd_cxa_get_display_frame_op_t *)pv_api_op;
255 
256             ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
257 
258             if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
259                             != sizeof(ihevcd_cxa_get_display_frame_ip_t))
260                             && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
261                                             != sizeof(ivd_get_display_frame_ip_t)))
262             {
263                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
264                                 << IVD_UNSUPPORTEDPARAM;
265                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
266                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
267                 return (IV_FAIL);
268             }
269 
270             if((ps_op->s_ivd_get_display_frame_op_t.u4_size
271                             != sizeof(ihevcd_cxa_get_display_frame_op_t))
272                             && (ps_op->s_ivd_get_display_frame_op_t.u4_size
273                                             != sizeof(ivd_get_display_frame_op_t)))
274             {
275                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
276                                 << IVD_UNSUPPORTEDPARAM;
277                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
278                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
279                 return (IV_FAIL);
280             }
281 
282         }
283             break;
284 
285         case IVD_CMD_REL_DISPLAY_FRAME:
286         {
287             ihevcd_cxa_rel_display_frame_ip_t *ps_ip =
288                             (ihevcd_cxa_rel_display_frame_ip_t *)pv_api_ip;
289             ihevcd_cxa_rel_display_frame_op_t *ps_op =
290                             (ihevcd_cxa_rel_display_frame_op_t *)pv_api_op;
291 
292             ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
293 
294             if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
295                             != sizeof(ihevcd_cxa_rel_display_frame_ip_t))
296                             && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
297                                             != sizeof(ivd_rel_display_frame_ip_t)))
298             {
299                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
300                                 << IVD_UNSUPPORTEDPARAM;
301                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
302                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
303                 return (IV_FAIL);
304             }
305 
306             if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
307                             != sizeof(ihevcd_cxa_rel_display_frame_op_t))
308                             && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
309                                             != sizeof(ivd_rel_display_frame_op_t)))
310             {
311                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
312                                 << IVD_UNSUPPORTEDPARAM;
313                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
314                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
315                 return (IV_FAIL);
316             }
317 
318         }
319             break;
320 
321         case IVD_CMD_SET_DISPLAY_FRAME:
322         {
323             ihevcd_cxa_set_display_frame_ip_t *ps_ip =
324                             (ihevcd_cxa_set_display_frame_ip_t *)pv_api_ip;
325             ihevcd_cxa_set_display_frame_op_t *ps_op =
326                             (ihevcd_cxa_set_display_frame_op_t *)pv_api_op;
327             UWORD32 j;
328 
329             ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
330 
331             if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
332                             != sizeof(ihevcd_cxa_set_display_frame_ip_t))
333                             && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
334                                             != sizeof(ivd_set_display_frame_ip_t)))
335             {
336                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
337                                 << IVD_UNSUPPORTEDPARAM;
338                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
339                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
340                 return (IV_FAIL);
341             }
342 
343             if((ps_op->s_ivd_set_display_frame_op_t.u4_size
344                             != sizeof(ihevcd_cxa_set_display_frame_op_t))
345                             && (ps_op->s_ivd_set_display_frame_op_t.u4_size
346                                             != sizeof(ivd_set_display_frame_op_t)))
347             {
348                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
349                                 << IVD_UNSUPPORTEDPARAM;
350                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
351                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
352                 return (IV_FAIL);
353             }
354 
355             if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
356             {
357                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
358                                 << IVD_UNSUPPORTEDPARAM;
359                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
360                                 IVD_DISP_FRM_ZERO_OP_BUFS;
361                 return IV_FAIL;
362             }
363 
364             for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
365                             j++)
366             {
367                 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
368                                 == 0)
369                 {
370                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
371                                     << IVD_UNSUPPORTEDPARAM;
372                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
373                                     IVD_DISP_FRM_ZERO_OP_BUFS;
374                     return IV_FAIL;
375                 }
376 
377                 for(i = 0;
378                                 i
379                                                 < (WORD32)ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
380                                 i++)
381                 {
382                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
383                                     == NULL)
384                     {
385                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
386                                         << IVD_UNSUPPORTEDPARAM;
387                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
388                                         IVD_DISP_FRM_OP_BUF_NULL;
389                         return IV_FAIL;
390                     }
391 
392                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
393                                     == 0)
394                     {
395                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
396                                         << IVD_UNSUPPORTEDPARAM;
397                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
398                                         IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
399                         return IV_FAIL;
400                     }
401                 }
402             }
403         }
404             break;
405 
406         case IVD_CMD_VIDEO_DECODE:
407         {
408             ihevcd_cxa_video_decode_ip_t *ps_ip =
409                             (ihevcd_cxa_video_decode_ip_t *)pv_api_ip;
410             ihevcd_cxa_video_decode_op_t *ps_op =
411                             (ihevcd_cxa_video_decode_op_t *)pv_api_op;
412 
413             DEBUG("The input bytes is: %d",
414                             ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
415             ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
416 
417             if(ps_ip->s_ivd_video_decode_ip_t.u4_size
418                             != sizeof(ihevcd_cxa_video_decode_ip_t)
419                             && ps_ip->s_ivd_video_decode_ip_t.u4_size
420                                             != offsetof(ivd_video_decode_ip_t,
421                                                         s_out_buffer))
422             {
423                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
424                                 << IVD_UNSUPPORTEDPARAM;
425                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
426                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
427                 return (IV_FAIL);
428             }
429 
430             if(ps_op->s_ivd_video_decode_op_t.u4_size
431                             != sizeof(ihevcd_cxa_video_decode_op_t)
432                             && ps_op->s_ivd_video_decode_op_t.u4_size
433                                             != offsetof(ivd_video_decode_op_t,
434                                                         u4_output_present))
435             {
436                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
437                                 << IVD_UNSUPPORTEDPARAM;
438                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
439                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
440                 return (IV_FAIL);
441             }
442 
443         }
444             break;
445 
446         case IVD_CMD_DELETE:
447         {
448             ihevcd_cxa_delete_ip_t *ps_ip =
449                             (ihevcd_cxa_delete_ip_t *)pv_api_ip;
450             ihevcd_cxa_delete_op_t *ps_op =
451                             (ihevcd_cxa_delete_op_t *)pv_api_op;
452 
453             ps_op->s_ivd_delete_op_t.u4_error_code = 0;
454 
455             if(ps_ip->s_ivd_delete_ip_t.u4_size
456                             != sizeof(ihevcd_cxa_delete_ip_t))
457             {
458                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
459                                 << IVD_UNSUPPORTEDPARAM;
460                 ps_op->s_ivd_delete_op_t.u4_error_code |=
461                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
462                 return (IV_FAIL);
463             }
464 
465             if(ps_op->s_ivd_delete_op_t.u4_size
466                             != sizeof(ihevcd_cxa_delete_op_t))
467             {
468                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
469                                 << IVD_UNSUPPORTEDPARAM;
470                 ps_op->s_ivd_delete_op_t.u4_error_code |=
471                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
472                 return (IV_FAIL);
473             }
474 
475         }
476             break;
477 
478         case IVD_CMD_VIDEO_CTL:
479         {
480             UWORD32 *pu4_ptr_cmd;
481             UWORD32 sub_command;
482 
483             pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
484             pu4_ptr_cmd += 2;
485             sub_command = *pu4_ptr_cmd;
486 
487             switch(sub_command)
488             {
489                 case IVD_CMD_CTL_SETPARAMS:
490                 {
491                     ihevcd_cxa_ctl_set_config_ip_t *ps_ip;
492                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
493                     ps_ip = (ihevcd_cxa_ctl_set_config_ip_t *)pv_api_ip;
494                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
495 
496                     if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
497                                     != sizeof(ihevcd_cxa_ctl_set_config_ip_t))
498                     {
499                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
500                                         << IVD_UNSUPPORTEDPARAM;
501                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
502                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
503                         return IV_FAIL;
504                     }
505                 }
506                     //no break; is needed here
507                 case IVD_CMD_CTL_SETDEFAULT:
508                 {
509                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
510                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
511                     if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
512                                     != sizeof(ihevcd_cxa_ctl_set_config_op_t))
513                     {
514                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
515                                         << IVD_UNSUPPORTEDPARAM;
516                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
517                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
518                         return IV_FAIL;
519                     }
520                 }
521                     break;
522 
523                 case IVD_CMD_CTL_GETPARAMS:
524                 {
525                     ihevcd_cxa_ctl_getstatus_ip_t *ps_ip;
526                     ihevcd_cxa_ctl_getstatus_op_t *ps_op;
527 
528                     ps_ip = (ihevcd_cxa_ctl_getstatus_ip_t *)pv_api_ip;
529                     ps_op = (ihevcd_cxa_ctl_getstatus_op_t *)pv_api_op;
530                     if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
531                                     != sizeof(ihevcd_cxa_ctl_getstatus_ip_t))
532                     {
533                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
534                                         << IVD_UNSUPPORTEDPARAM;
535                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
536                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
537                         return IV_FAIL;
538                     }
539                     if((ps_op->s_ivd_ctl_getstatus_op_t.u4_size
540                                     != sizeof(ihevcd_cxa_ctl_getstatus_op_t)) &&
541                        (ps_op->s_ivd_ctl_getstatus_op_t.u4_size
542                                     != sizeof(ivd_ctl_getstatus_op_t)))
543                     {
544                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
545                                         << IVD_UNSUPPORTEDPARAM;
546                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
547                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
548                         return IV_FAIL;
549                     }
550                 }
551                     break;
552 
553                 case IVD_CMD_CTL_GETBUFINFO:
554                 {
555                     ihevcd_cxa_ctl_getbufinfo_ip_t *ps_ip;
556                     ihevcd_cxa_ctl_getbufinfo_op_t *ps_op;
557                     ps_ip = (ihevcd_cxa_ctl_getbufinfo_ip_t *)pv_api_ip;
558                     ps_op = (ihevcd_cxa_ctl_getbufinfo_op_t *)pv_api_op;
559 
560                     if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
561                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_ip_t))
562                     {
563                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
564                                         << IVD_UNSUPPORTEDPARAM;
565                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
566                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
567                         return IV_FAIL;
568                     }
569                     if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
570                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_op_t))
571                     {
572                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
573                                         << IVD_UNSUPPORTEDPARAM;
574                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
575                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
576                         return IV_FAIL;
577                     }
578                 }
579                     break;
580 
581                 case IVD_CMD_CTL_GETVERSION:
582                 {
583                     ihevcd_cxa_ctl_getversioninfo_ip_t *ps_ip;
584                     ihevcd_cxa_ctl_getversioninfo_op_t *ps_op;
585                     ps_ip = (ihevcd_cxa_ctl_getversioninfo_ip_t *)pv_api_ip;
586                     ps_op = (ihevcd_cxa_ctl_getversioninfo_op_t *)pv_api_op;
587                     if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
588                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_ip_t))
589                     {
590                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
591                                         << IVD_UNSUPPORTEDPARAM;
592                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
593                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
594                         return IV_FAIL;
595                     }
596                     if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
597                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_op_t))
598                     {
599                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
600                                         << IVD_UNSUPPORTEDPARAM;
601                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
602                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
603                         return IV_FAIL;
604                     }
605                 }
606                     break;
607 
608                 case IVD_CMD_CTL_FLUSH:
609                 {
610                     ihevcd_cxa_ctl_flush_ip_t *ps_ip;
611                     ihevcd_cxa_ctl_flush_op_t *ps_op;
612                     ps_ip = (ihevcd_cxa_ctl_flush_ip_t *)pv_api_ip;
613                     ps_op = (ihevcd_cxa_ctl_flush_op_t *)pv_api_op;
614                     if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
615                                     != sizeof(ihevcd_cxa_ctl_flush_ip_t))
616                     {
617                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
618                                         << IVD_UNSUPPORTEDPARAM;
619                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
620                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
621                         return IV_FAIL;
622                     }
623                     if(ps_op->s_ivd_ctl_flush_op_t.u4_size
624                                     != sizeof(ihevcd_cxa_ctl_flush_op_t))
625                     {
626                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
627                                         << IVD_UNSUPPORTEDPARAM;
628                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
629                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
630                         return IV_FAIL;
631                     }
632                 }
633                     break;
634 
635                 case IVD_CMD_CTL_RESET:
636                 {
637                     ihevcd_cxa_ctl_reset_ip_t *ps_ip;
638                     ihevcd_cxa_ctl_reset_op_t *ps_op;
639                     ps_ip = (ihevcd_cxa_ctl_reset_ip_t *)pv_api_ip;
640                     ps_op = (ihevcd_cxa_ctl_reset_op_t *)pv_api_op;
641                     if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
642                                     != sizeof(ihevcd_cxa_ctl_reset_ip_t))
643                     {
644                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
645                                         << IVD_UNSUPPORTEDPARAM;
646                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
647                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
648                         return IV_FAIL;
649                     }
650                     if(ps_op->s_ivd_ctl_reset_op_t.u4_size
651                                     != sizeof(ihevcd_cxa_ctl_reset_op_t))
652                     {
653                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
654                                         << IVD_UNSUPPORTEDPARAM;
655                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
656                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
657                         return IV_FAIL;
658                     }
659                 }
660                     break;
661                 case IHEVCD_CXA_CMD_CTL_DEGRADE:
662                 {
663                     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
664                     ihevcd_cxa_ctl_degrade_op_t *ps_op;
665 
666                     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
667                     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
668 
669                     if(ps_ip->u4_size
670                                     != sizeof(ihevcd_cxa_ctl_degrade_ip_t))
671                     {
672                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
673                         ps_op->u4_error_code |=
674                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
675                         return IV_FAIL;
676                     }
677 
678                     if(ps_op->u4_size
679                                     != sizeof(ihevcd_cxa_ctl_degrade_op_t))
680                     {
681                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
682                         ps_op->u4_error_code |=
683                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
684                         return IV_FAIL;
685                     }
686 
687                     if((ps_ip->i4_degrade_pics < 0) ||
688                        (ps_ip->i4_degrade_pics > 4) ||
689                        (ps_ip->i4_nondegrade_interval < 0) ||
690                        (ps_ip->i4_degrade_type < 0) ||
691                        (ps_ip->i4_degrade_type > 15))
692                     {
693                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
694                         return IV_FAIL;
695                     }
696 
697                     break;
698                 }
699 
700                 case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
701                 {
702                     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
703                     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
704 
705                     ps_ip =
706                                     (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
707                     ps_op =
708                                     (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
709 
710                     if(ps_ip->u4_size
711                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_ip_t))
712                     {
713                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
714                         ps_op->u4_error_code |=
715                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
716                         return IV_FAIL;
717                     }
718 
719                     if(ps_op->u4_size
720                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_op_t))
721                     {
722                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
723                         ps_op->u4_error_code |=
724                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
725                         return IV_FAIL;
726                     }
727 
728                     break;
729                 }
730 
731                 case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
732                 {
733                     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
734                     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
735 
736                     ps_ip =
737                                     (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
738                     ps_op =
739                                     (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
740 
741                     if(ps_ip->u4_size
742                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_ip_t))
743                     {
744                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
745                         ps_op->u4_error_code |=
746                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
747                         return IV_FAIL;
748                     }
749 
750                     if(ps_op->u4_size
751                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_op_t))
752                     {
753                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
754                         ps_op->u4_error_code |=
755                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
756                         return IV_FAIL;
757                     }
758 
759                     break;
760                 }
761                 case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
762                 {
763                     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
764                     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
765 
766                     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
767                     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
768 
769                     if(ps_ip->u4_size
770                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_ip_t))
771                     {
772                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
773                         ps_op->u4_error_code |=
774                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
775                         return IV_FAIL;
776                     }
777 
778                     if(ps_op->u4_size
779                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_op_t))
780                     {
781                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
782                         ps_op->u4_error_code |=
783                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
784                         return IV_FAIL;
785                     }
786 
787                     break;
788                 }
789                 case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
790                 {
791                     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
792                     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
793 
794                     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
795                     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
796 
797                     if(ps_ip->u4_size
798                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_ip_t))
799                     {
800                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
801                         ps_op->u4_error_code |=
802                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
803                         return IV_FAIL;
804                     }
805 
806                     if(ps_op->u4_size
807                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_op_t))
808                     {
809                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
810                         ps_op->u4_error_code |=
811                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
812                         return IV_FAIL;
813                     }
814 
815 #ifdef MULTICORE
816                     if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_NUM_CORES))
817 #else
818                     if(ps_ip->u4_num_cores != 1)
819 #endif
820                         {
821                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
822                             return IV_FAIL;
823                         }
824                     break;
825                 }
826                 case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
827                 {
828                     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
829                     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
830 
831                     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
832                     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
833 
834                     if(ps_ip->u4_size
835                                     != sizeof(ihevcd_cxa_ctl_set_processor_ip_t))
836                     {
837                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
838                         ps_op->u4_error_code |=
839                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
840                         return IV_FAIL;
841                     }
842 
843                     if(ps_op->u4_size
844                                     != sizeof(ihevcd_cxa_ctl_set_processor_op_t))
845                     {
846                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
847                         ps_op->u4_error_code |=
848                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
849                         return IV_FAIL;
850                     }
851 
852                     break;
853                 }
854                 default:
855                     *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
856                     *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
857                     return IV_FAIL;
858             }
859         }
860             break;
861         default:
862             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
863             *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
864             return IV_FAIL;
865     }
866 
867     return IV_SUCCESS;
868 }
869 
870 
871 /**
872 *******************************************************************************
873 *
874 * @brief
875 *  Sets default dynamic parameters
876 *
877 * @par Description:
878 *  Sets default dynamic parameters. Will be called in ihevcd_init() to ensure
879 * that even if set_params is not called, codec  continues to work
880 *
881 * @param[in] ps_codec_obj
882 *  Pointer to codec object at API level
883 *
884 * @param[in] pv_api_ip
885 *  Pointer to input argument structure
886 *
887 * @param[out] pv_api_op
888 *  Pointer to output argument structure
889 *
890 * @returns  Status
891 *
892 * @remarks
893 *
894 *
895 *******************************************************************************
896 */
ihevcd_set_default_params(codec_t * ps_codec)897 WORD32 ihevcd_set_default_params(codec_t *ps_codec)
898 {
899 
900     WORD32 ret = IV_SUCCESS;
901 
902     ps_codec->e_pic_skip_mode = IVD_SKIP_NONE;
903     ps_codec->i4_strd = 0;
904     ps_codec->i4_disp_strd = 0;
905     ps_codec->i4_header_mode = 0;
906     ps_codec->e_pic_out_order = IVD_DISPLAY_FRAME_OUT;
907     return ret;
908 }
909 
ihevcd_update_function_ptr(codec_t * ps_codec)910 void ihevcd_update_function_ptr(codec_t *ps_codec)
911 {
912 
913     /* Init inter pred function array */
914     ps_codec->apf_inter_pred[0] = NULL;
915     ps_codec->apf_inter_pred[1] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_fptr;
916     ps_codec->apf_inter_pred[2] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_fptr;
917     ps_codec->apf_inter_pred[3] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_fptr;
918     ps_codec->apf_inter_pred[4] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
919     ps_codec->apf_inter_pred[5] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_w16out_fptr;
920     ps_codec->apf_inter_pred[6] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16out_fptr;
921     ps_codec->apf_inter_pred[7] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
922     ps_codec->apf_inter_pred[8] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
923     ps_codec->apf_inter_pred[9] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_fptr;
924     ps_codec->apf_inter_pred[10] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_w16out_fptr;
925     ps_codec->apf_inter_pred[11] = NULL;
926     ps_codec->apf_inter_pred[12] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_fptr;
927     ps_codec->apf_inter_pred[13] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_fptr;
928     ps_codec->apf_inter_pred[14] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_fptr;
929     ps_codec->apf_inter_pred[15] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
930     ps_codec->apf_inter_pred[16] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_w16out_fptr;
931     ps_codec->apf_inter_pred[17] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16out_fptr;
932     ps_codec->apf_inter_pred[18] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
933     ps_codec->apf_inter_pred[19] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
934     ps_codec->apf_inter_pred[20] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_fptr;
935     ps_codec->apf_inter_pred[21] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_w16out_fptr;
936 
937     /* Init intra pred function array */
938     ps_codec->apf_intra_pred_luma[0] = (pf_intra_pred)NULL;
939     ps_codec->apf_intra_pred_luma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_planar_fptr;
940     ps_codec->apf_intra_pred_luma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_dc_fptr;
941     ps_codec->apf_intra_pred_luma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode2_fptr;
942     ps_codec->apf_intra_pred_luma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_3_to_9_fptr;
943     ps_codec->apf_intra_pred_luma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_horz_fptr;
944     ps_codec->apf_intra_pred_luma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_11_to_17_fptr;
945     ps_codec->apf_intra_pred_luma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_18_34_fptr;
946     ps_codec->apf_intra_pred_luma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_19_to_25_fptr;
947     ps_codec->apf_intra_pred_luma[9] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_ver_fptr;
948     ps_codec->apf_intra_pred_luma[10] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_27_to_33_fptr;
949 
950     ps_codec->apf_intra_pred_chroma[0] = (pf_intra_pred)NULL;
951     ps_codec->apf_intra_pred_chroma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_planar_fptr;
952     ps_codec->apf_intra_pred_chroma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_dc_fptr;
953     ps_codec->apf_intra_pred_chroma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode2_fptr;
954     ps_codec->apf_intra_pred_chroma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_3_to_9_fptr;
955     ps_codec->apf_intra_pred_chroma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_horz_fptr;
956     ps_codec->apf_intra_pred_chroma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_11_to_17_fptr;
957     ps_codec->apf_intra_pred_chroma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_18_34_fptr;
958     ps_codec->apf_intra_pred_chroma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_19_to_25_fptr;
959     ps_codec->apf_intra_pred_chroma[9] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_ver_fptr;
960     ps_codec->apf_intra_pred_chroma[10] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_27_to_33_fptr;
961 
962     /* Init itrans_recon function array */
963     ps_codec->apf_itrans_recon[0] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_ttype1_fptr;
964     ps_codec->apf_itrans_recon[1] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_fptr;
965     ps_codec->apf_itrans_recon[2] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_8x8_fptr;
966     ps_codec->apf_itrans_recon[3] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_16x16_fptr;
967     ps_codec->apf_itrans_recon[4] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_32x32_fptr;
968     ps_codec->apf_itrans_recon[5] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_4x4_fptr;
969     ps_codec->apf_itrans_recon[6] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_8x8_fptr;
970     ps_codec->apf_itrans_recon[7] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_16x16_fptr;
971 
972     /* Init recon function array */
973     ps_codec->apf_recon[0] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_ttype1_fptr;
974     ps_codec->apf_recon[1] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_fptr;
975     ps_codec->apf_recon[2] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_8x8_fptr;
976     ps_codec->apf_recon[3] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_16x16_fptr;
977     ps_codec->apf_recon[4] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_32x32_fptr;
978     ps_codec->apf_recon[5] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_4x4_fptr;
979     ps_codec->apf_recon[6] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_8x8_fptr;
980     ps_codec->apf_recon[7] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_16x16_fptr;
981 
982     /* Init itrans_recon_dc function array */
983     ps_codec->apf_itrans_recon_dc[0] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_luma_fptr;
984     ps_codec->apf_itrans_recon_dc[1] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_chroma_fptr;
985 
986     /* Init sao function array */
987     ps_codec->apf_sao_luma[0] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_fptr;
988     ps_codec->apf_sao_luma[1] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_fptr;
989     ps_codec->apf_sao_luma[2] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_fptr;
990     ps_codec->apf_sao_luma[3] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_fptr;
991 
992     ps_codec->apf_sao_chroma[0] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_chroma_fptr;
993     ps_codec->apf_sao_chroma[1] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_chroma_fptr;
994     ps_codec->apf_sao_chroma[2] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_chroma_fptr;
995     ps_codec->apf_sao_chroma[3] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_chroma_fptr;
996 }
997 /**
998 *******************************************************************************
999 *
1000 * @brief
1001 *  Initialize the context. This will be called by  create and during
1002 * reset
1003 *
1004 * @par Description:
1005 *  Initializes the context
1006 *
1007 * @param[in] ps_codec
1008 *  Codec context pointer
1009 *
1010 * @returns  Status
1011 *
1012 * @remarks
1013 *
1014 *
1015 *******************************************************************************
1016 */
ihevcd_init(codec_t * ps_codec)1017 WORD32 ihevcd_init(codec_t *ps_codec)
1018 {
1019     WORD32 status = IV_SUCCESS;
1020     WORD32 i;
1021 
1022     /* Free any dynamic buffers that are allocated */
1023     ihevcd_free_dynamic_bufs(ps_codec);
1024 
1025     ps_codec->u4_allocate_dynamic_done = 0;
1026     ps_codec->i4_num_disp_bufs = 1;
1027     ps_codec->i4_flush_mode = 0;
1028 
1029     ps_codec->i4_ht = ps_codec->i4_disp_ht = 0;
1030     ps_codec->i4_wd = ps_codec->i4_disp_wd = 0;
1031     ps_codec->i4_strd = 0;
1032     ps_codec->i4_disp_strd = 0;
1033     ps_codec->i4_num_cores = 1;
1034 
1035     ps_codec->u4_pic_cnt = 0;
1036     ps_codec->u4_disp_cnt = 0;
1037 
1038     ps_codec->i4_header_mode = 0;
1039     ps_codec->i4_header_in_slice_mode = 0;
1040     ps_codec->i4_sps_done = 0;
1041     ps_codec->i4_pps_done = 0;
1042     ps_codec->i4_init_done   = 1;
1043     ps_codec->i4_first_pic_done = 0;
1044     ps_codec->s_parse.i4_first_pic_init = 0;
1045     ps_codec->i4_error_code = 0;
1046     ps_codec->i4_reset_flag = 0;
1047     ps_codec->i4_cra_as_first_pic = 1;
1048     ps_codec->i4_rasl_output_flag = 0;
1049 
1050     ps_codec->i4_prev_poc_msb = 0;
1051     ps_codec->i4_prev_poc_lsb = -1;
1052     ps_codec->i4_max_prev_poc_lsb = -1;
1053     ps_codec->s_parse.i4_abs_pic_order_cnt = -1;
1054 
1055     /* Set ref chroma format by default to 420SP UV interleaved */
1056     ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_UV;
1057 
1058     /* If the codec is in shared mode and required format is 420 SP VU interleaved then change
1059      * reference buffers chroma format
1060      */
1061     if(IV_YUV_420SP_VU == ps_codec->e_chroma_fmt)
1062     {
1063         ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_VU;
1064     }
1065 
1066 
1067 
1068     ps_codec->i4_disable_deblk_pic = 0;
1069 
1070     ps_codec->i4_degrade_pic_cnt    = 0;
1071     ps_codec->i4_degrade_pics       = 0;
1072     ps_codec->i4_degrade_type       = 0;
1073     ps_codec->i4_disable_sao_pic    = 0;
1074     ps_codec->i4_fullpel_inter_pred = 0;
1075     ps_codec->u4_enable_fmt_conv_ahead = 0;
1076     ps_codec->i4_share_disp_buf_cnt = 0;
1077 
1078     {
1079         sps_t *ps_sps = ps_codec->ps_sps_base;
1080         pps_t *ps_pps = ps_codec->ps_pps_base;
1081 
1082         for(i = 0; i < MAX_SPS_CNT; i++)
1083         {
1084             ps_sps->i1_sps_valid = 0;
1085             ps_sps++;
1086         }
1087 
1088         for(i = 0; i < MAX_PPS_CNT; i++)
1089         {
1090             ps_pps->i1_pps_valid = 0;
1091             ps_pps++;
1092         }
1093     }
1094 
1095     ihevcd_set_default_params(ps_codec);
1096     /* Initialize MV Bank buffer manager */
1097     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_mv_buf_mgr);
1098 
1099     /* Initialize Picture buffer manager */
1100     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_pic_buf_mgr);
1101 
1102     ps_codec->ps_pic_buf = (pic_buf_t *)ps_codec->pv_pic_buf_base;
1103 
1104     memset(ps_codec->ps_pic_buf, 0, BUF_MGR_MAX_CNT  * sizeof(pic_buf_t));
1105 
1106 
1107 
1108     /* Initialize display buffer manager */
1109     ihevc_disp_mgr_init((disp_mgr_t *)ps_codec->pv_disp_buf_mgr);
1110 
1111     /* Initialize dpb manager */
1112     ihevc_dpb_mgr_init((dpb_mgr_t *)ps_codec->pv_dpb_mgr);
1113 
1114     ps_codec->e_processor_soc = SOC_GENERIC;
1115     /* The following can be over-ridden using soc parameter as a hack */
1116     ps_codec->u4_nctb = 0x7FFFFFFF;
1117     ihevcd_init_arch(ps_codec);
1118 
1119     ihevcd_init_function_ptr(ps_codec);
1120 
1121     ihevcd_update_function_ptr(ps_codec);
1122 
1123     return status;
1124 }
1125 
1126 /**
1127 *******************************************************************************
1128 *
1129 * @brief
1130 *  Allocate static memory for the codec
1131 *
1132 * @par Description:
1133 *  Allocates static memory for the codec
1134 *
1135 * @param[in] pv_api_ip
1136 *  Pointer to input argument structure
1137 *
1138 * @param[out] pv_api_op
1139 *  Pointer to output argument structure
1140 *
1141 * @returns  Status
1142 *
1143 * @remarks
1144 *
1145 *
1146 *******************************************************************************
1147 */
ihevcd_allocate_static_bufs(iv_obj_t ** pps_codec_obj,ihevcd_cxa_create_ip_t * ps_create_ip,ihevcd_cxa_create_op_t * ps_create_op)1148 WORD32 ihevcd_allocate_static_bufs(iv_obj_t **pps_codec_obj,
1149                                    ihevcd_cxa_create_ip_t *ps_create_ip,
1150                                    ihevcd_cxa_create_op_t *ps_create_op)
1151 {
1152     WORD32 size;
1153     void *pv_buf;
1154     UWORD8 *pu1_buf;
1155     WORD32 i;
1156     codec_t *ps_codec;
1157     IV_API_CALL_STATUS_T status = IV_SUCCESS;
1158     void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1159     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1160     void *pv_mem_ctxt;
1161 
1162     /* Request memory for HEVCD object */
1163     ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1164 
1165     pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1166     pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1167     pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1168 
1169 
1170     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1171     RETURN_IF((NULL == pv_buf), IV_FAIL);
1172     memset(pv_buf, 0, sizeof(iv_obj_t));
1173     *pps_codec_obj = (iv_obj_t *)pv_buf;
1174     ps_create_op->s_ivd_create_op_t.pv_handle = *pps_codec_obj;
1175 
1176 
1177     (*pps_codec_obj)->pv_codec_handle = NULL;
1178     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(codec_t));
1179     RETURN_IF((NULL == pv_buf), IV_FAIL);
1180     (*pps_codec_obj)->pv_codec_handle = (codec_t *)pv_buf;
1181     ps_codec = (codec_t *)pv_buf;
1182 
1183     memset(ps_codec, 0, sizeof(codec_t));
1184 
1185 #ifndef LOGO_EN
1186     ps_codec->i4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
1187 #else
1188     ps_codec->i4_share_disp_buf = 0;
1189 #endif
1190 
1191     /* Shared display mode is supported only for 420SP and 420P formats */
1192     if((ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P) &&
1193        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV) &&
1194        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU))
1195     {
1196         ps_codec->i4_share_disp_buf = 0;
1197     }
1198 
1199     ps_codec->e_chroma_fmt = ps_create_ip->s_ivd_create_ip_t.e_output_format;
1200 
1201     ps_codec->pf_aligned_alloc = pf_aligned_alloc;
1202     ps_codec->pf_aligned_free = pf_aligned_free;
1203     ps_codec->pv_mem_ctxt = pv_mem_ctxt;
1204 
1205     /* Request memory to hold thread handles for each processing thread */
1206     size = MAX_PROCESS_THREADS * ithread_get_handle_size();
1207     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1208     RETURN_IF((NULL == pv_buf), IV_FAIL);
1209     memset(pv_buf, 0, size);
1210 
1211     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1212     {
1213         WORD32 handle_size = ithread_get_handle_size();
1214         ps_codec->apv_process_thread_handle[i] =
1215                         (UWORD8 *)pv_buf + (i * handle_size);
1216     }
1217 
1218     /* Request memory for static bitstream buffer which holds bitstream after emulation prevention */
1219     size = MIN_BITSBUF_SIZE;
1220     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
1221     RETURN_IF((NULL == pv_buf), IV_FAIL);
1222     memset(pv_buf, 0, size + 16);
1223     ps_codec->pu1_bitsbuf_static = pv_buf;
1224     ps_codec->u4_bitsbuf_size_static = size;
1225 
1226     /* size for holding display manager context */
1227     size = sizeof(buf_mgr_t);
1228     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1229     RETURN_IF((NULL == pv_buf), IV_FAIL);
1230     memset(pv_buf, 0, size);
1231     ps_codec->pv_disp_buf_mgr = pv_buf;
1232 
1233     /* size for holding dpb manager context */
1234     size = sizeof(dpb_mgr_t);
1235     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1236     RETURN_IF((NULL == pv_buf), IV_FAIL);
1237     memset(pv_buf, 0, size);
1238     ps_codec->pv_dpb_mgr = pv_buf;
1239 
1240     /* size for holding buffer manager context */
1241     size = sizeof(buf_mgr_t);
1242     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1243     RETURN_IF((NULL == pv_buf), IV_FAIL);
1244     memset(pv_buf, 0, size);
1245     ps_codec->pv_pic_buf_mgr = pv_buf;
1246 
1247     /* size for holding mv buffer manager context */
1248     size = sizeof(buf_mgr_t);
1249     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1250     RETURN_IF((NULL == pv_buf), IV_FAIL);
1251     memset(pv_buf, 0, size);
1252     ps_codec->pv_mv_buf_mgr = pv_buf;
1253 
1254     size = MAX_VPS_CNT * sizeof(vps_t);
1255     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1256     RETURN_IF((NULL == pv_buf), IV_FAIL);
1257     memset(pv_buf, 0, size);
1258     ps_codec->ps_vps_base = pv_buf;
1259     ps_codec->s_parse.ps_vps_base = ps_codec->ps_vps_base;
1260 
1261     size = MAX_SPS_CNT * sizeof(sps_t);
1262     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1263     RETURN_IF((NULL == pv_buf), IV_FAIL);
1264     memset(pv_buf, 0, size);
1265     ps_codec->ps_sps_base = pv_buf;
1266     ps_codec->s_parse.ps_sps_base = ps_codec->ps_sps_base;
1267 
1268     size = MAX_PPS_CNT * sizeof(pps_t);
1269     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1270     RETURN_IF((NULL == pv_buf), IV_FAIL);
1271     memset(pv_buf, 0, size);
1272     ps_codec->ps_pps_base = pv_buf;
1273     ps_codec->s_parse.ps_pps_base = ps_codec->ps_pps_base;
1274 
1275     size = MAX_SLICE_HDR_CNT * sizeof(slice_header_t);
1276     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1277     RETURN_IF((NULL == pv_buf), IV_FAIL);
1278     memset(pv_buf, 0, size);
1279     ps_codec->ps_slice_hdr_base = (slice_header_t *)pv_buf;
1280     ps_codec->s_parse.ps_slice_hdr_base = ps_codec->ps_slice_hdr_base;
1281 
1282 
1283     SCALING_MAT_SIZE(size)
1284     size = (MAX_SPS_CNT + MAX_PPS_CNT) * size * sizeof(WORD16);
1285     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1286     RETURN_IF((NULL == pv_buf), IV_FAIL);
1287     memset(pv_buf, 0, size);
1288     ps_codec->pi2_scaling_mat = (WORD16 *)pv_buf;
1289 
1290 
1291     /* Size for holding pic_buf_t for each reference picture
1292      * Since this is only a structure allocation and not actual buffer allocation,
1293      * it is allocated for BUF_MGR_MAX_CNT entries
1294      */
1295     size = BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
1296     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1297     RETURN_IF((NULL == pv_buf), IV_FAIL);
1298     memset(pv_buf, 0, size);
1299     ps_codec->pv_pic_buf_base = (UWORD8 *)pv_buf;
1300 
1301     /* TO hold scratch buffers needed for each SAO context */
1302     size = 4 * MAX_CTB_SIZE * MAX_CTB_SIZE;
1303 
1304     /* 2 temporary buffers*/
1305     size *= 2;
1306     size *= MAX_PROCESS_THREADS;
1307 
1308     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1309     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1310     memset(pu1_buf, 0, size);
1311 
1312     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1313     {
1314         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_luma = (UWORD8 *)pu1_buf;
1315         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1316 
1317         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_chroma = (UWORD8 *)pu1_buf;
1318         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1319     }
1320 
1321     /* Allocate intra pred modes buffer */
1322     /* 8 bits per 4x4 */
1323     /* 16 bytes each for top and left 64 pixels and 16 bytes for default mode */
1324     size =  3 * 16 * sizeof(UWORD8);
1325     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1326     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1327     memset(pu1_buf, 0, size);
1328     ps_codec->s_parse.pu1_luma_intra_pred_mode_left = pu1_buf;
1329     ps_codec->s_parse.pu1_luma_intra_pred_mode_top  = pu1_buf + 16;
1330 
1331     {
1332         WORD32 inter_pred_tmp_buf_size, ntaps_luma;
1333         WORD32 pic_pu_idx_map_size;
1334 
1335         /* Max inter pred size */
1336         ntaps_luma = 8;
1337         inter_pred_tmp_buf_size = sizeof(WORD16) * (MAX_CTB_SIZE + ntaps_luma) * MAX_CTB_SIZE;
1338 
1339         inter_pred_tmp_buf_size = ALIGN64(inter_pred_tmp_buf_size);
1340 
1341         /* To hold pu_index w.r.t. frame level pu_t array for a CTB */
1342         pic_pu_idx_map_size = sizeof(WORD32) * (18 * 18);
1343         pic_pu_idx_map_size = ALIGN64(pic_pu_idx_map_size);
1344 
1345         size =  inter_pred_tmp_buf_size * 2;
1346         size += pic_pu_idx_map_size;
1347         size *= MAX_PROCESS_THREADS;
1348 
1349         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1350         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1351         memset(pu1_buf, 0, size);
1352 
1353         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1354         {
1355             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1 = (WORD16 *)pu1_buf;
1356             pu1_buf += inter_pred_tmp_buf_size;
1357 
1358             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2 = (WORD16 *)pu1_buf;
1359             pu1_buf += inter_pred_tmp_buf_size;
1360 
1361             /* Inverse transform intermediate and inverse scan output buffers reuse inter pred scratch buffers */
1362             ps_codec->as_process[i].pi2_itrans_intrmd_buf =
1363                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2;
1364             ps_codec->as_process[i].pi2_invscan_out =
1365                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1;
1366 
1367             ps_codec->as_process[i].pu4_pic_pu_idx_map = (UWORD32 *)pu1_buf;
1368             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_pu_idx_map =
1369                             (UWORD32 *)pu1_buf;
1370             pu1_buf += pic_pu_idx_map_size;
1371 
1372             //   ps_codec->as_process[i].pi2_inter_pred_tmp_buf3 = (WORD16 *)pu1_buf;
1373             //   pu1_buf += inter_pred_tmp_buf_size;
1374 
1375             ps_codec->as_process[i].i4_inter_pred_tmp_buf_strd = MAX_CTB_SIZE;
1376 
1377         }
1378     }
1379     /* Initialize pointers in PPS structures */
1380     {
1381         sps_t *ps_sps = ps_codec->ps_sps_base;
1382         pps_t *ps_pps = ps_codec->ps_pps_base;
1383         WORD16 *pi2_scaling_mat =  ps_codec->pi2_scaling_mat;
1384         WORD32 scaling_mat_size;
1385 
1386         SCALING_MAT_SIZE(scaling_mat_size);
1387 
1388         for(i = 0; i < MAX_SPS_CNT; i++)
1389         {
1390             ps_sps->pi2_scaling_mat  = pi2_scaling_mat;
1391             pi2_scaling_mat += scaling_mat_size;
1392             ps_sps++;
1393         }
1394 
1395         for(i = 0; i < MAX_PPS_CNT; i++)
1396         {
1397             ps_pps->pi2_scaling_mat  = pi2_scaling_mat;
1398             pi2_scaling_mat += scaling_mat_size;
1399             ps_pps++;
1400         }
1401     }
1402 
1403     return (status);
1404 }
1405 
1406 /**
1407 *******************************************************************************
1408 *
1409 * @brief
1410 *  Free static memory for the codec
1411 *
1412 * @par Description:
1413 *  Free static memory for the codec
1414 *
1415 * @param[in] ps_codec
1416 *  Pointer to codec context
1417 *
1418 * @returns  Status
1419 *
1420 * @remarks
1421 *
1422 *
1423 *******************************************************************************
1424 */
ihevcd_free_static_bufs(iv_obj_t * ps_codec_obj)1425 WORD32 ihevcd_free_static_bufs(iv_obj_t *ps_codec_obj)
1426 {
1427     codec_t *ps_codec;
1428 
1429     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1430     void *pv_mem_ctxt;
1431 
1432     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
1433     pf_aligned_free = ps_codec->pf_aligned_free;
1434     pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1435 
1436 
1437     ALIGNED_FREE(ps_codec, ps_codec->apv_process_thread_handle[0]);
1438     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_static);
1439 
1440     ALIGNED_FREE(ps_codec, ps_codec->pv_disp_buf_mgr);
1441     ALIGNED_FREE(ps_codec, ps_codec->pv_dpb_mgr);
1442     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_mgr);
1443     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_buf_mgr);
1444     ALIGNED_FREE(ps_codec, ps_codec->ps_vps_base);
1445     ALIGNED_FREE(ps_codec, ps_codec->ps_sps_base);
1446     ALIGNED_FREE(ps_codec, ps_codec->ps_pps_base);
1447     ALIGNED_FREE(ps_codec, ps_codec->ps_slice_hdr_base);
1448     ALIGNED_FREE(ps_codec, ps_codec->pi2_scaling_mat);
1449     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_base);
1450     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu1_luma_intra_pred_mode_left);
1451     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_tmp_buf_luma);
1452     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pi2_inter_pred_tmp_buf1);
1453     ALIGNED_FREE(ps_codec, ps_codec_obj->pv_codec_handle);
1454 
1455     if(ps_codec_obj)
1456     {
1457         pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
1458     }
1459 
1460     return IV_SUCCESS;
1461 
1462 }
1463 
1464 
1465 /**
1466 *******************************************************************************
1467 *
1468 * @brief
1469 *  Allocate dynamic memory for the codec
1470 *
1471 * @par Description:
1472 *  Allocates dynamic memory for the codec
1473 *
1474 * @param[in] ps_codec
1475 *  Pointer to codec context
1476 *
1477 * @returns  Status
1478 *
1479 * @remarks
1480 *
1481 *
1482 *******************************************************************************
1483 */
ihevcd_allocate_dynamic_bufs(codec_t * ps_codec)1484 WORD32 ihevcd_allocate_dynamic_bufs(codec_t *ps_codec)
1485 {
1486     WORD32 max_tile_cols, max_tile_rows;
1487     WORD32 max_ctb_rows, max_ctb_cols;
1488     WORD32 max_num_cu_cols;
1489     WORD32 max_num_cu_rows;
1490     WORD32 max_num_4x4_cols;
1491     WORD32 max_ctb_cnt;
1492     WORD32 wd;
1493     WORD32 ht;
1494     WORD32 i;
1495     WORD32 max_dpb_size;
1496     void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1497     void *pv_buf;
1498     UWORD8 *pu1_buf;
1499     WORD32 size;
1500 
1501     wd = ALIGN64(ps_codec->i4_wd);
1502     ht = ALIGN64(ps_codec->i4_ht);
1503 
1504     max_tile_cols = (wd + MIN_TILE_WD - 1) / MIN_TILE_WD;
1505     max_tile_rows = (ht + MIN_TILE_HT - 1) / MIN_TILE_HT;
1506     max_ctb_rows  = ht / MIN_CTB_SIZE;
1507     max_ctb_cols  = wd / MIN_CTB_SIZE;
1508     max_ctb_cnt   = max_ctb_rows * max_ctb_cols;
1509     max_num_cu_cols = wd / MIN_CU_SIZE;
1510     max_num_cu_rows = ht / MIN_CU_SIZE;
1511     max_num_4x4_cols = wd / 4;
1512 
1513     /* Allocate tile structures */
1514     size = max_tile_cols * max_tile_rows;
1515     size *= sizeof(tile_t);
1516     size *= MAX_PPS_CNT;
1517 
1518     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1519     RETURN_IF((NULL == pv_buf), IV_FAIL);
1520     memset(pv_buf, 0, size);
1521     ps_codec->ps_tile = (tile_t *)pv_buf;
1522 
1523 
1524     /* Allocate memory to hold entry point offsets */
1525     /* One entry point per tile */
1526     size = max_tile_cols * max_tile_rows;
1527 
1528     /* One entry point per row of CTBs */
1529     /*********************************************************************/
1530     /* Only tiles or entropy sync is enabled at a time in main           */
1531     /* profile, but since memory required does not increase too much,    */
1532     /* this allocation is done to handle both cases                      */
1533     /*********************************************************************/
1534     size  += max_ctb_rows;
1535     size *= sizeof(WORD32);
1536 
1537     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1538     RETURN_IF((NULL == pv_buf), IV_FAIL);
1539     memset(pv_buf, 0, size);
1540     ps_codec->pi4_entry_ofst = (WORD32 *)pv_buf;
1541 
1542     /* Allocate parse skip flag buffer */
1543     /* 1 bit per 8x8 */
1544     size = max_num_cu_cols / 8;
1545     size = ALIGN4(size);
1546     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1547     RETURN_IF((NULL == pv_buf), IV_FAIL);
1548     memset(pv_buf, 0, size);
1549     ps_codec->s_parse.pu4_skip_cu_top = (UWORD32 *)pv_buf;
1550 
1551     /* Allocate parse coding tree depth buffer */
1552     /* 2 bits per 8x8 */
1553     size =  max_num_cu_cols / 4;
1554     size = ALIGN4(size);
1555     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1556     RETURN_IF((NULL == pv_buf), IV_FAIL);
1557     memset(pv_buf, 0, size);
1558     ps_codec->s_parse.pu4_ct_depth_top = (UWORD32 *)pv_buf;
1559 
1560     /* Allocate intra flag buffer */
1561     /* 1 bit per 8x8 */
1562     size =  max_num_cu_cols * max_num_cu_rows / 8;
1563     size = ALIGN4(size);
1564     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1565     RETURN_IF((NULL == pv_buf), IV_FAIL);
1566     memset(pv_buf, 0, size);
1567     ps_codec->pu1_pic_intra_flag = (UWORD8 *)pv_buf;
1568     ps_codec->s_parse.pu1_pic_intra_flag = ps_codec->pu1_pic_intra_flag;
1569 
1570     /* Allocate transquant bypass flag buffer */
1571     /* 1 bit per 8x8 */
1572     /* Extra row and column are allocated for easy processing of top and left blocks while loop filtering */
1573     size =  ((max_num_cu_cols + 8) * (max_num_cu_rows + 8)) / 8;
1574     size = ALIGN4(size);
1575     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1576     RETURN_IF((NULL == pv_buf), IV_FAIL);
1577     memset(pv_buf, 1, size);
1578     {
1579         WORD32 loop_filter_strd = (wd + 63) >> 6;
1580         ps_codec->pu1_pic_no_loop_filter_flag_base = pv_buf;
1581         /* The offset is added for easy processing of top and left blocks while loop filtering */
1582         ps_codec->pu1_pic_no_loop_filter_flag = (UWORD8 *)pv_buf + loop_filter_strd + 1;
1583         ps_codec->s_parse.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1584         ps_codec->s_parse.s_deblk_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1585         ps_codec->s_parse.s_sao_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1586     }
1587 
1588     /* Initialize pointers in PPS structures */
1589     {
1590         pps_t *ps_pps = ps_codec->ps_pps_base;
1591         tile_t *ps_tile =  ps_codec->ps_tile;
1592 
1593         for(i = 0; i < MAX_PPS_CNT; i++)
1594         {
1595             ps_pps->ps_tile = ps_tile;
1596             ps_tile += (max_tile_cols * max_tile_rows);
1597             ps_pps++;
1598         }
1599 
1600     }
1601 
1602     /* Allocate memory for job queue */
1603 
1604     /* One job per row of CTBs */
1605     size  = max_ctb_rows;
1606 
1607     /* One each tile a row of CTBs, num_jobs has to incremented */
1608     size  *= max_tile_cols;
1609 
1610     /* One format convert/frame copy job per row of CTBs for non-shared mode*/
1611     size  += max_ctb_rows;
1612 
1613     size *= sizeof(proc_job_t);
1614 
1615     size += ihevcd_jobq_ctxt_size();
1616     size = ALIGN4(size);
1617 
1618     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1619     RETURN_IF((NULL == pv_buf), IV_FAIL);
1620     memset(pv_buf, 0, size);
1621     ps_codec->pv_proc_jobq_buf = pv_buf;
1622     ps_codec->i4_proc_jobq_buf_size = size;
1623 
1624     size =  max_ctb_cnt;
1625     size = ALIGN4(size);
1626     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1627     RETURN_IF((NULL == pv_buf), IV_FAIL);
1628     memset(pv_buf, 0, size);
1629     ps_codec->pu1_parse_map = (UWORD8 *)pv_buf;
1630 
1631     size =  max_ctb_cnt;
1632     size = ALIGN4(size);
1633     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1634     RETURN_IF((NULL == pv_buf), IV_FAIL);
1635     memset(pv_buf, 0, size);
1636     ps_codec->pu1_proc_map = (UWORD8 *)pv_buf;
1637 
1638     /** Holds top and left neighbor's pu idx into picture level pu array */
1639     /* Only one top row is enough but left has to be replicated for each process context */
1640     size =  (max_num_4x4_cols  /* left */ + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4)/* top */ + 1/* top right */) * sizeof(WORD32);
1641     size = ALIGN4(size);
1642     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1643     RETURN_IF((NULL == pv_buf), IV_FAIL);
1644     memset(pv_buf, 0, size);
1645 
1646     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1647     {
1648         UWORD32 *pu4_buf = (UWORD32 *)pv_buf;
1649         ps_codec->as_process[i].pu4_pic_pu_idx_left = pu4_buf + i * (MAX_CTB_SIZE / 4);
1650         memset(ps_codec->as_process[i].pu4_pic_pu_idx_left, 0, sizeof(UWORD32) * MAX_CTB_SIZE / 4);
1651         ps_codec->as_process[i].pu4_pic_pu_idx_top = pu4_buf + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4);
1652     }
1653     memset(ps_codec->as_process[0].pu4_pic_pu_idx_top, 0, sizeof(UWORD32) * (wd / 4 + 1));
1654 
1655     {
1656         /* To hold SAO left buffer for luma */
1657         size  = sizeof(UWORD8) * (MAX(ht, wd));
1658 
1659         /* To hold SAO left buffer for chroma */
1660         size += sizeof(UWORD8) * (MAX(ht, wd));
1661 
1662         /* To hold SAO top buffer for luma */
1663         size += sizeof(UWORD8) * wd;
1664 
1665         /* To hold SAO top buffer for chroma */
1666         size += sizeof(UWORD8) * wd;
1667 
1668         /* To hold SAO top left luma pixel value for last output ctb in a row*/
1669         size += sizeof(UWORD8) * max_ctb_rows;
1670 
1671         /* To hold SAO top left chroma pixel value last output ctb in a row*/
1672         size += sizeof(UWORD8) * max_ctb_rows * 2;
1673 
1674         /* To hold SAO top left pixel luma for current ctb - column array*/
1675         size += sizeof(UWORD8) * max_ctb_rows;
1676 
1677         /* To hold SAO top left pixel chroma for current ctb-column array*/
1678         size += sizeof(UWORD8) * max_ctb_rows * 2;
1679 
1680         /* To hold SAO top right pixel luma pixel value last output ctb in a row*/
1681         size += sizeof(UWORD8) * max_ctb_cols;
1682 
1683         /* To hold SAO top right pixel chroma pixel value last output ctb in a row*/
1684         size += sizeof(UWORD8) * max_ctb_cols * 2;
1685 
1686         /*To hold SAO botton bottom left pixels for luma*/
1687         size += sizeof(UWORD8) * max_ctb_rows;
1688 
1689         /*To hold SAO botton bottom left pixels for luma*/
1690         size += sizeof(UWORD8) * max_ctb_rows * 2;
1691         size = ALIGN64(size);
1692 
1693         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1694         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1695         memset(pu1_buf, 0, size);
1696 
1697         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1698         {
1699             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1700         }
1701         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1702         pu1_buf += MAX(ht, wd);
1703 
1704         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1705         {
1706             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1707         }
1708         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1709         pu1_buf += MAX(ht, wd);
1710         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1711         {
1712             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1713         }
1714         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1715         pu1_buf += wd;
1716 
1717         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1718         {
1719             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1720         }
1721         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1722         pu1_buf += wd;
1723         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1724         {
1725             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1726         }
1727         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1728         pu1_buf += ht / MIN_CTB_SIZE;
1729 
1730         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1731         {
1732             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1733         }
1734         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1735         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1736 
1737         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1738         {
1739             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1740         }
1741         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1742         pu1_buf += ht / MIN_CTB_SIZE;
1743 
1744         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1745         {
1746             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1747         }
1748         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1749 
1750         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1751         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1752         {
1753             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1754         }
1755         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1756 
1757         pu1_buf += wd / MIN_CTB_SIZE;
1758         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1759         {
1760             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1761         }
1762         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1763 
1764         pu1_buf += (wd / MIN_CTB_SIZE) * 2;
1765 
1766         /*Per CTB, Store 1 value for luma , 2 values for chroma*/
1767         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1768         {
1769             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1770         }
1771         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1772 
1773         pu1_buf += (ht / MIN_CTB_SIZE);
1774 
1775         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1776         {
1777             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1778         }
1779         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1780 
1781         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1782     }
1783 
1784 
1785     {
1786         UWORD8 *pu1_buf = (UWORD8 *)pv_buf;
1787         WORD32 vert_bs_size, horz_bs_size;
1788         WORD32 qp_const_flag_size;
1789         WORD32 qp_size;
1790         WORD32 num_8x8;
1791 
1792         /* Max Number of vertical edges */
1793         vert_bs_size = wd / 8 + 2 * MAX_CTB_SIZE / 8;
1794 
1795         /* Max Number of horizontal edges - extra MAX_CTB_SIZE / 8 to handle the last 4 rows separately(shifted CTB processing) */
1796         vert_bs_size *= (ht + MAX_CTB_SIZE) / MIN_TU_SIZE;
1797 
1798         /* Number of bytes */
1799         vert_bs_size /= 8;
1800 
1801         /* Two bits per edge */
1802         vert_bs_size *= 2;
1803 
1804         /* Max Number of horizontal edges */
1805         horz_bs_size = ht / 8 + MAX_CTB_SIZE / 8;
1806 
1807         /* Max Number of vertical edges - extra MAX_CTB_SIZE / 8 to handle the last 4 columns separately(shifted CTB processing) */
1808         horz_bs_size *= (wd + MAX_CTB_SIZE) / MIN_TU_SIZE;
1809 
1810         /* Number of bytes */
1811         horz_bs_size /= 8;
1812 
1813         /* Two bits per edge */
1814         horz_bs_size *= 2;
1815 
1816         /* Max CTBs in a row */
1817         qp_const_flag_size = wd / MIN_CTB_SIZE + 1 /* The last ctb row deblk is done in last ctb + 1 row.*/;
1818 
1819         /* Max CTBs in a column */
1820         qp_const_flag_size *= ht / MIN_CTB_SIZE;
1821 
1822         /* Number of bytes */
1823         qp_const_flag_size /= 8;
1824 
1825         /* QP changes at CU level - So store at 8x8 level */
1826         num_8x8 = (ht * wd) / (MIN_CU_SIZE * MIN_CU_SIZE);
1827         qp_size = num_8x8;
1828 
1829         /* To hold vertical boundary strength */
1830         size += vert_bs_size;
1831 
1832         /* To hold horizontal boundary strength */
1833         size += horz_bs_size;
1834 
1835         /* To hold QP */
1836         size += qp_size;
1837 
1838         /* To hold QP const in CTB flags */
1839         size += qp_const_flag_size;
1840 
1841         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1842         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1843 
1844         memset(pu1_buf, 0, size);
1845 
1846         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1847         {
1848             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1849             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1850             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1851             pu1_buf += vert_bs_size;
1852 
1853             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1854             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1855             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1856             pu1_buf += horz_bs_size;
1857 
1858             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1859             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1860             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1861             pu1_buf += qp_size;
1862 
1863             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1864             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1865             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1866             pu1_buf += qp_const_flag_size;
1867 
1868             pu1_buf -= (vert_bs_size + horz_bs_size + qp_size + qp_const_flag_size);
1869         }
1870         ps_codec->s_parse.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1871         pu1_buf += vert_bs_size;
1872 
1873         ps_codec->s_parse.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1874         pu1_buf += horz_bs_size;
1875 
1876         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1877         pu1_buf += qp_size;
1878 
1879         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1880         pu1_buf += qp_const_flag_size;
1881 
1882     }
1883 
1884     /* Max CTBs in a row */
1885     size  = wd / MIN_CTB_SIZE;
1886     /* Max CTBs in a column */
1887     size *= (ht / MIN_CTB_SIZE + 2) /* Top row and bottom row extra. This ensures accessing left,top in first row
1888                                               and right in last row will not result in invalid access*/;
1889 
1890     size *= sizeof(UWORD16);
1891     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1892     RETURN_IF((NULL == pv_buf), IV_FAIL);
1893     memset(pv_buf, 0, size);
1894 
1895     ps_codec->pu1_tile_idx_base = pv_buf;
1896     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1897     {
1898         ps_codec->as_process[i].pu1_tile_idx = (UWORD16 *)pv_buf + wd / MIN_CTB_SIZE /* Offset 1 row */;
1899     }
1900 
1901     /* 4 bytes per color component per CTB */
1902     size = 3 * 4;
1903 
1904     /* MAX number of CTBs in a row */
1905     size *= wd / MIN_CTB_SIZE;
1906 
1907     /* MAX number of CTBs in a column */
1908     size *= ht / MIN_CTB_SIZE;
1909     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1910     RETURN_IF((NULL == pv_buf), IV_FAIL);
1911     memset(pv_buf, 0, size);
1912 
1913     ps_codec->s_parse.ps_pic_sao = (sao_t *)pv_buf;
1914     ps_codec->s_parse.s_sao_ctxt.ps_pic_sao = (sao_t *)pv_buf;
1915     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1916     {
1917         ps_codec->as_process[i].s_sao_ctxt.ps_pic_sao = ps_codec->s_parse.ps_pic_sao;
1918     }
1919 
1920     /* Only if width * height * 3 / 2 is greater than MIN_BITSBUF_SIZE,
1921     then allocate dynamic bistream buffer */
1922     ps_codec->pu1_bitsbuf_dynamic = NULL;
1923     size = wd * ht;
1924     if(size > MIN_BITSBUF_SIZE)
1925     {
1926         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
1927         RETURN_IF((NULL == pv_buf), IV_FAIL);
1928         memset(pv_buf, 0, size + 16);
1929         ps_codec->pu1_bitsbuf_dynamic = pv_buf;
1930         ps_codec->u4_bitsbuf_size_dynamic = size;
1931     }
1932 
1933     size = ihevcd_get_tu_data_size(wd * ht);
1934     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1935     RETURN_IF((NULL == pv_buf), IV_FAIL);
1936     memset(pv_buf, 0, size);
1937     ps_codec->pv_tu_data = pv_buf;
1938 
1939     {
1940         sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
1941 
1942 
1943         /* Allocate for pu_map, pu_t and pic_pu_idx for each MV bank */
1944         /* Note: Number of luma samples is not max_wd * max_ht here, instead it is
1945          * set to maximum number of luma samples allowed at the given level.
1946          * This is done to ensure that any stream with width and height lesser
1947          * than max_wd and max_ht is supported. Number of buffers required can be greater
1948          * for lower width and heights at a given level and this increased number of buffers
1949          * might require more memory than what max_wd and max_ht buffer would have required
1950          * Also note one extra buffer is allocted to store current pictures MV bank
1951          * In case of asynchronous parsing and processing, number of buffers should increase here
1952          * based on when parsing and processing threads are synchronized
1953          */
1954         max_dpb_size = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
1955         /* Size for holding mv_buf_t for each MV Bank
1956          * One extra MV Bank is needed to hold current pics MV bank.
1957          */
1958         size = (max_dpb_size + 1) * sizeof(mv_buf_t);
1959 
1960         size += (max_dpb_size + 1) *
1961                         ihevcd_get_pic_mv_bank_size(wd * ht);
1962 
1963         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1964         RETURN_IF((NULL == pv_buf), IV_FAIL);
1965         memset(pv_buf, 0, size);
1966 
1967         ps_codec->pv_mv_bank_buf_base = pv_buf;
1968         ps_codec->i4_total_mv_bank_size = size;
1969 
1970     }
1971 
1972     /* In case of non-shared mode allocate for reference picture buffers */
1973     /* In case of shared and 420p output, allocate for chroma samples */
1974     if(0 == ps_codec->i4_share_disp_buf)
1975     {
1976         /* Number of buffers is doubled in order to return one frame at a time instead of sending
1977          * multiple outputs during dpb full case.
1978          * Also note one extra buffer is allocted to store current picture
1979          * In case of asynchronous parsing and processing, number of buffers should increase here
1980          * based on when parsing and processing threads are synchronized
1981          */
1982         size = ihevcd_get_total_pic_buf_size(ps_codec, wd, ht);
1983         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1984         RETURN_IF((NULL == pv_buf), IV_FAIL);
1985         memset(pv_buf, 0, size);
1986 
1987         ps_codec->i4_total_pic_buf_size = size;
1988         ps_codec->pu1_ref_pic_buf_base = (UWORD8 *)pv_buf;
1989     }
1990 
1991     ps_codec->pv_proc_jobq = ihevcd_jobq_init(ps_codec->pv_proc_jobq_buf, ps_codec->i4_proc_jobq_buf_size);
1992     RETURN_IF((ps_codec->pv_proc_jobq == NULL), IV_FAIL);
1993 
1994     /* Update the jobq context to all the threads */
1995     ps_codec->s_parse.pv_proc_jobq = ps_codec->pv_proc_jobq;
1996     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1997     {
1998         ps_codec->as_process[i].pv_proc_jobq = ps_codec->pv_proc_jobq;
1999         ps_codec->as_process[i].i4_id = i;
2000         ps_codec->as_process[i].ps_codec = ps_codec;
2001 
2002         /* Set the following to zero assuming it is a single core solution
2003          * When threads are launched these will be set appropriately
2004          */
2005         ps_codec->as_process[i].i4_check_parse_status = 0;
2006         ps_codec->as_process[i].i4_check_proc_status = 0;
2007     }
2008 
2009     ps_codec->u4_allocate_dynamic_done = 1;
2010 
2011     return IV_SUCCESS;
2012 }
2013 
2014 /**
2015 *******************************************************************************
2016 *
2017 * @brief
2018 *  Free dynamic memory for the codec
2019 *
2020 * @par Description:
2021 *  Free dynamic memory for the codec
2022 *
2023 * @param[in] ps_codec
2024 *  Pointer to codec context
2025 *
2026 * @returns  Status
2027 *
2028 * @remarks
2029 *
2030 *
2031 *******************************************************************************
2032 */
ihevcd_free_dynamic_bufs(codec_t * ps_codec)2033 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec)
2034 {
2035 
2036     if(ps_codec->pv_proc_jobq)
2037     {
2038         ihevcd_jobq_deinit(ps_codec->pv_proc_jobq);
2039         ps_codec->pv_proc_jobq = NULL;
2040     }
2041 
2042     ALIGNED_FREE(ps_codec, ps_codec->ps_tile);
2043     ALIGNED_FREE(ps_codec, ps_codec->pi4_entry_ofst);
2044     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_skip_cu_top);
2045     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_ct_depth_top);
2046     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_intra_flag);
2047     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_no_loop_filter_flag_base);
2048     ALIGNED_FREE(ps_codec, ps_codec->pv_proc_jobq_buf);
2049     ALIGNED_FREE(ps_codec, ps_codec->pu1_parse_map);
2050     ALIGNED_FREE(ps_codec, ps_codec->pu1_proc_map);
2051     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pu4_pic_pu_idx_left);
2052     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_sao_src_left_luma);
2053     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_bs_ctxt.pu4_pic_vert_bs);
2054     ALIGNED_FREE(ps_codec, ps_codec->pu1_tile_idx_base);
2055     ALIGNED_FREE(ps_codec, ps_codec->s_parse.ps_pic_sao);
2056     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_dynamic);
2057     ALIGNED_FREE(ps_codec, ps_codec->pv_tu_data);
2058     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_bank_buf_base);
2059     ALIGNED_FREE(ps_codec, ps_codec->pu1_ref_pic_buf_base);
2060     ALIGNED_FREE(ps_codec, ps_codec->pu1_cur_chroma_ref_buf);
2061 
2062     ps_codec->u4_allocate_dynamic_done = 0;
2063     return IV_SUCCESS;
2064 }
2065 
2066 
2067 /**
2068 *******************************************************************************
2069 *
2070 * @brief
2071 *  Initializes from mem records passed to the codec
2072 *
2073 * @par Description:
2074 *  Initializes pointers based on mem records passed
2075 *
2076 * @param[in] ps_codec_obj
2077 *  Pointer to codec object at API level
2078 *
2079 * @param[in] pv_api_ip
2080 *  Pointer to input argument structure
2081 *
2082 * @param[out] pv_api_op
2083 *  Pointer to output argument structure
2084 *
2085 * @returns  Status
2086 *
2087 * @remarks
2088 *
2089 *
2090 *******************************************************************************
2091 */
ihevcd_create(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2092 WORD32 ihevcd_create(iv_obj_t *ps_codec_obj,
2093                            void *pv_api_ip,
2094                            void *pv_api_op)
2095 {
2096     ihevcd_cxa_create_ip_t *ps_create_ip;
2097     ihevcd_cxa_create_op_t *ps_create_op;
2098 
2099     WORD32 ret;
2100     codec_t *ps_codec;
2101     ps_create_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
2102     ps_create_op = (ihevcd_cxa_create_op_t *)pv_api_op;
2103 
2104     ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
2105     ps_codec_obj = NULL;
2106     ret = ihevcd_allocate_static_bufs(&ps_codec_obj, pv_api_ip, pv_api_op);
2107 
2108     /* If allocation of some buffer fails, then free buffers allocated till then */
2109     if(IV_FAIL == ret)
2110     {
2111         if(NULL != ps_codec_obj)
2112         {
2113             if(ps_codec_obj->pv_codec_handle)
2114             {
2115                 ihevcd_free_static_bufs(ps_codec_obj);
2116             }
2117             else
2118             {
2119                 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
2120                 void *pv_mem_ctxt;
2121 
2122                 pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
2123                 pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
2124                 pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
2125             }
2126         }
2127         ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
2128         ps_create_op->s_ivd_create_op_t.u4_error_code |= 1 << IVD_FATALERROR;
2129 
2130         return IV_FAIL;
2131     }
2132     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2133     ret = ihevcd_init(ps_codec);
2134 
2135     TRACE_INIT(NULL);
2136     STATS_INIT();
2137 
2138     return ret;
2139 }
2140 /**
2141 *******************************************************************************
2142 *
2143 * @brief
2144 *  Delete codec
2145 *
2146 * @par Description:
2147 *  Delete codec
2148 *
2149 * @param[in] ps_codec_obj
2150 *  Pointer to codec object at API level
2151 *
2152 * @param[in] pv_api_ip
2153 *  Pointer to input argument structure
2154 *
2155 * @param[out] pv_api_op
2156 *  Pointer to output argument structure
2157 *
2158 * @returns  Status
2159 *
2160 * @remarks
2161 *
2162 *
2163 *******************************************************************************
2164 */
ihevcd_delete(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2165 WORD32 ihevcd_delete(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2166 {
2167     codec_t *ps_dec;
2168     ihevcd_cxa_delete_ip_t *ps_ip = (ihevcd_cxa_delete_ip_t *)pv_api_ip;
2169     ihevcd_cxa_delete_op_t *ps_op = (ihevcd_cxa_delete_op_t *)pv_api_op;
2170 
2171     ps_dec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2172     UNUSED(ps_ip);
2173     ps_op->s_ivd_delete_op_t.u4_error_code = 0;
2174     ihevcd_free_dynamic_bufs(ps_dec);
2175     ihevcd_free_static_bufs(ps_codec_obj);
2176     return IV_SUCCESS;
2177 }
2178 
2179 
2180 /**
2181 *******************************************************************************
2182 *
2183 * @brief
2184 *  Passes display buffer from application to codec
2185 *
2186 * @par Description:
2187 *  Adds display buffer to the codec
2188 *
2189 * @param[in] ps_codec_obj
2190 *  Pointer to codec object at API level
2191 *
2192 * @param[in] pv_api_ip
2193 *  Pointer to input argument structure
2194 *
2195 * @param[out] pv_api_op
2196 *  Pointer to output argument structure
2197 *
2198 * @returns  Status
2199 *
2200 * @remarks
2201 *
2202 *
2203 *******************************************************************************
2204 */
ihevcd_set_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2205 WORD32 ihevcd_set_display_frame(iv_obj_t *ps_codec_obj,
2206                                 void *pv_api_ip,
2207                                 void *pv_api_op)
2208 {
2209     WORD32 ret = IV_SUCCESS;
2210 
2211     ivd_set_display_frame_ip_t *ps_dec_disp_ip;
2212     ivd_set_display_frame_op_t *ps_dec_disp_op;
2213 
2214     WORD32 i;
2215 
2216     codec_t *ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2217 
2218     ps_dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2219     ps_dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2220 
2221     ps_codec->i4_num_disp_bufs = 0;
2222     if(ps_codec->i4_share_disp_buf)
2223     {
2224         UWORD32 num_bufs = ps_dec_disp_ip->num_disp_bufs;
2225         pic_buf_t *ps_pic_buf;
2226         UWORD8 *pu1_buf;
2227         WORD32 buf_ret;
2228 
2229         UWORD8 *pu1_chroma_buf = NULL;
2230         num_bufs = MIN(num_bufs, BUF_MGR_MAX_CNT);
2231         ps_codec->i4_num_disp_bufs = num_bufs;
2232 
2233         ps_pic_buf = (pic_buf_t *)ps_codec->ps_pic_buf;
2234 
2235         /* If color format is 420P, then allocate chroma buffers to hold semiplanar
2236          * chroma data */
2237         if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2238         {
2239             WORD32 num_samples = ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2240             WORD32 size = num_samples * num_bufs;
2241             void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
2242 
2243             pu1_chroma_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2244             RETURN_IF((NULL == pu1_chroma_buf), IV_FAIL);
2245             memset(pu1_chroma_buf, 0, size);
2246 
2247             ps_codec->pu1_cur_chroma_ref_buf = pu1_chroma_buf;
2248         }
2249         for(i = 0; i < (WORD32)num_bufs; i++)
2250         {
2251             /* Stride is not available in some cases here.
2252                So store base pointers to buffer manager now,
2253                and update these pointers once header is decoded */
2254             pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2255             ps_pic_buf->pu1_luma = pu1_buf;
2256 
2257             if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2258             {
2259                 pu1_buf = pu1_chroma_buf;
2260                 pu1_chroma_buf += ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2261             }
2262             else
2263             {
2264                 /* For YUV 420SP case use display buffer itself as chroma ref buffer */
2265                 pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2266             }
2267 
2268             ps_pic_buf->pu1_chroma = pu1_buf;
2269 
2270             buf_ret = ihevc_buf_mgr_add((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_pic_buf, i);
2271 
2272             if(0 != buf_ret)
2273             {
2274                 ps_codec->i4_error_code = IHEVCD_BUF_MGR_ERROR;
2275                 return IHEVCD_BUF_MGR_ERROR;
2276             }
2277 
2278             /* Mark pic buf as needed for display */
2279             /* This ensures that till the buffer is explicitly passed to the codec,
2280              * application owns the buffer. Decoder is allowed to use a buffer only
2281              * when application sends it through fill this buffer call in OMX
2282              */
2283             ihevc_buf_mgr_set_status((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, i, BUF_MGR_DISP);
2284 
2285             ps_pic_buf++;
2286 
2287             /* Store display buffers in codec context. Needed for 420p output */
2288             memcpy(&ps_codec->s_disp_buffer[ps_codec->i4_share_disp_buf_cnt],
2289                    &ps_dec_disp_ip->s_disp_buffer[i],
2290                    sizeof(ps_dec_disp_ip->s_disp_buffer[i]));
2291 
2292             ps_codec->i4_share_disp_buf_cnt++;
2293 
2294         }
2295     }
2296 
2297     ps_dec_disp_op->u4_error_code = 0;
2298     return ret;
2299 
2300 }
2301 
2302 /**
2303 *******************************************************************************
2304 *
2305 * @brief
2306 *  Sets the decoder in flush mode. Decoder will come out of  flush only
2307 * after returning all the buffers or at reset
2308 *
2309 * @par Description:
2310 *  Sets the decoder in flush mode
2311 *
2312 * @param[in] ps_codec_obj
2313 *  Pointer to codec object at API level
2314 *
2315 * @param[in] pv_api_ip
2316 *  Pointer to input argument structure
2317 *
2318 * @param[out] pv_api_op
2319 *  Pointer to output argument structure
2320 *
2321 * @returns  Status
2322 *
2323 * @remarks
2324 *
2325 *
2326 *******************************************************************************
2327 */
ihevcd_set_flush_mode(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2328 WORD32 ihevcd_set_flush_mode(iv_obj_t *ps_codec_obj,
2329                              void *pv_api_ip,
2330                              void *pv_api_op)
2331 {
2332 
2333     codec_t *ps_codec;
2334     ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t *)pv_api_op;
2335     UNUSED(pv_api_ip);
2336     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2337 
2338     /* Signal flush frame control call */
2339     ps_codec->i4_flush_mode = 1;
2340 
2341     ps_ctl_op->u4_error_code = 0;
2342 
2343     /* Set pic count to zero, so that decoder starts buffering again */
2344     /* once it comes out of flush mode */
2345     ps_codec->u4_pic_cnt = 0;
2346     ps_codec->u4_disp_cnt = 0;
2347     return IV_SUCCESS;
2348 
2349 
2350 }
2351 
2352 /**
2353 *******************************************************************************
2354 *
2355 * @brief
2356 *  Gets decoder status and buffer requirements
2357 *
2358 * @par Description:
2359 *  Gets the decoder status
2360 *
2361 * @param[in] ps_codec_obj
2362 *  Pointer to codec object at API level
2363 *
2364 * @param[in] pv_api_ip
2365 *  Pointer to input argument structure
2366 *
2367 * @param[out] pv_api_op
2368 *  Pointer to output argument structure
2369 *
2370 * @returns  Status
2371 *
2372 * @remarks
2373 *
2374 *
2375 *******************************************************************************
2376 */
2377 
ihevcd_get_status(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2378 WORD32 ihevcd_get_status(iv_obj_t *ps_codec_obj,
2379                          void *pv_api_ip,
2380                          void *pv_api_op)
2381 {
2382 
2383     WORD32 i;
2384     codec_t *ps_codec;
2385     WORD32 wd, ht;
2386     ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t *)pv_api_op;
2387 
2388     UNUSED(pv_api_ip);
2389 
2390     ps_ctl_op->u4_error_code = 0;
2391 
2392     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2393 
2394     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2395     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2396         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2397     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2398         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2399     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2400         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2401     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2402         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2403     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2404                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2405         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2406 
2407     ps_ctl_op->u4_num_disp_bufs = 1;
2408 
2409     for(i = 0; i < (WORD32)ps_ctl_op->u4_min_num_in_bufs; i++)
2410     {
2411         wd = ALIGN64(ps_codec->i4_wd);
2412         ht = ALIGN64(ps_codec->i4_ht);
2413         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2414     }
2415 
2416     wd = ps_codec->i4_wd;
2417     ht = ps_codec->i4_ht;
2418 
2419     if(ps_codec->i4_sps_done)
2420     {
2421         if(0 == ps_codec->i4_share_disp_buf)
2422         {
2423             wd = ps_codec->i4_disp_wd;
2424             ht = ps_codec->i4_disp_ht;
2425 
2426         }
2427         else
2428         {
2429             wd = ps_codec->i4_disp_strd;
2430             ht = ps_codec->i4_ht + PAD_HT;
2431         }
2432     }
2433 
2434     if(ps_codec->i4_disp_strd > wd)
2435         wd = ps_codec->i4_disp_strd;
2436 
2437     if(0 == ps_codec->i4_share_disp_buf)
2438         ps_ctl_op->u4_num_disp_bufs = 1;
2439     else
2440     {
2441         if(ps_codec->i4_sps_done)
2442         {
2443             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2444             WORD32 reorder_pic_cnt, ref_pic_cnt;
2445             reorder_pic_cnt = 0;
2446             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2447                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2448             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2449 
2450             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2451 
2452             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2453         }
2454         else
2455         {
2456             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2457         }
2458 
2459         ps_ctl_op->u4_num_disp_bufs = MIN(
2460                         ps_ctl_op->u4_num_disp_bufs, 32);
2461     }
2462 
2463     /*!*/
2464     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2465     {
2466         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2467         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2468         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2469     }
2470     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2471     {
2472         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2473         ps_ctl_op->u4_min_out_buf_size[1] =
2474                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2475     }
2476     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2477     {
2478         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2479         ps_ctl_op->u4_min_out_buf_size[1] =
2480                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2481     }
2482     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2483     {
2484         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2485         ps_ctl_op->u4_min_out_buf_size[1] =
2486                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2487     }
2488     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2489                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2490     {
2491         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2492         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2493         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2494     }
2495     ps_ctl_op->u4_pic_ht = ht;
2496     ps_ctl_op->u4_pic_wd = wd;
2497     ps_ctl_op->u4_frame_rate = 30000;
2498     ps_ctl_op->u4_bit_rate = 1000000;
2499     ps_ctl_op->e_content_type = IV_PROGRESSIVE;
2500     ps_ctl_op->e_output_chroma_format = ps_codec->e_chroma_fmt;
2501     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2502 
2503     if(ps_ctl_op->u4_size == sizeof(ihevcd_cxa_ctl_getstatus_op_t))
2504     {
2505         ihevcd_cxa_ctl_getstatus_op_t *ps_ext_ctl_op = (ihevcd_cxa_ctl_getstatus_op_t *)ps_ctl_op;
2506         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_wd;
2507         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_ht;
2508     }
2509     return IV_SUCCESS;
2510 }
2511 /**
2512 *******************************************************************************
2513 *
2514 * @brief
2515 *  Gets decoder buffer requirements
2516 *
2517 * @par Description:
2518 *  Gets the decoder buffer requirements. If called before  header decoder,
2519 * buffer requirements are based on max_wd  and max_ht else actual width and
2520 * height will be used
2521 *
2522 * @param[in] ps_codec_obj
2523 *  Pointer to codec object at API level
2524 *
2525 * @param[in] pv_api_ip
2526 *  Pointer to input argument structure
2527 *
2528 * @param[out] pv_api_op
2529 *  Pointer to output argument structure
2530 *
2531 * @returns  Status
2532 *
2533 * @remarks
2534 *
2535 *
2536 *******************************************************************************
2537 */
ihevcd_get_buf_info(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2538 WORD32 ihevcd_get_buf_info(iv_obj_t *ps_codec_obj,
2539                            void *pv_api_ip,
2540                            void *pv_api_op)
2541 {
2542 
2543     codec_t *ps_codec;
2544     UWORD32 i = 0;
2545     WORD32 wd, ht;
2546     ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2547                     (ivd_ctl_getbufinfo_op_t *)pv_api_op;
2548 
2549     UNUSED(pv_api_ip);
2550     ps_ctl_op->u4_error_code = 0;
2551 
2552     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2553 
2554     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2555     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2556         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2557     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2558         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2559     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2560         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2561     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2562         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2563     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2564                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2565         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2566 
2567     ps_ctl_op->u4_num_disp_bufs = 1;
2568 
2569     for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2570     {
2571         wd = ALIGN64(ps_codec->i4_wd);
2572         ht = ALIGN64(ps_codec->i4_ht);
2573 
2574         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2575     }
2576 
2577     wd = 0;
2578     ht = 0;
2579 
2580     if(ps_codec->i4_sps_done)
2581     {
2582         if(0 == ps_codec->i4_share_disp_buf)
2583         {
2584             wd = ps_codec->i4_disp_wd;
2585             ht = ps_codec->i4_disp_ht;
2586 
2587         }
2588         else
2589         {
2590             wd = ps_codec->i4_disp_strd;
2591             ht = ps_codec->i4_ht + PAD_HT;
2592         }
2593     }
2594     else
2595     {
2596         if(1 == ps_codec->i4_share_disp_buf)
2597         {
2598             wd = ALIGN32(wd + PAD_WD);
2599             ht += PAD_HT;
2600         }
2601     }
2602 
2603     if(ps_codec->i4_disp_strd > wd)
2604         wd = ps_codec->i4_disp_strd;
2605 
2606     if(0 == ps_codec->i4_share_disp_buf)
2607         ps_ctl_op->u4_num_disp_bufs = 1;
2608     else
2609     {
2610         if(ps_codec->i4_sps_done)
2611         {
2612             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2613             WORD32 reorder_pic_cnt, ref_pic_cnt;
2614             reorder_pic_cnt = 0;
2615             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2616                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2617             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2618 
2619             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2620 
2621             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2622         }
2623         else
2624         {
2625             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2626         }
2627 
2628         ps_ctl_op->u4_num_disp_bufs = MIN(
2629                         ps_ctl_op->u4_num_disp_bufs, 32);
2630 
2631     }
2632 
2633     /*!*/
2634     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2635     {
2636         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2637         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2638         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2639     }
2640     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2641     {
2642         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2643         ps_ctl_op->u4_min_out_buf_size[1] =
2644                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2645     }
2646     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2647     {
2648         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2649         ps_ctl_op->u4_min_out_buf_size[1] =
2650                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2651     }
2652     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2653     {
2654         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2655         ps_ctl_op->u4_min_out_buf_size[1] =
2656                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2657     }
2658     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2659                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2660     {
2661         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2662         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2663         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2664     }
2665     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2666 
2667     return IV_SUCCESS;
2668 }
2669 
2670 
2671 /**
2672 *******************************************************************************
2673 *
2674 * @brief
2675 *  Sets dynamic parameters
2676 *
2677 * @par Description:
2678 *  Sets dynamic parameters. Note Frame skip, decode header  mode are dynamic
2679 *  Dynamic change in stride is not  supported
2680 *
2681 * @param[in] ps_codec_obj
2682 *  Pointer to codec object at API level
2683 *
2684 * @param[in] pv_api_ip
2685 *  Pointer to input argument structure
2686 *
2687 * @param[out] pv_api_op
2688 *  Pointer to output argument structure
2689 *
2690 * @returns  Status
2691 *
2692 * @remarks
2693 *
2694 *
2695 *******************************************************************************
2696 */
ihevcd_set_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2697 WORD32 ihevcd_set_params(iv_obj_t *ps_codec_obj,
2698                          void *pv_api_ip,
2699                          void *pv_api_op)
2700 {
2701 
2702     codec_t *ps_codec;
2703     WORD32 ret = IV_SUCCESS;
2704     WORD32 strd;
2705     ivd_ctl_set_config_ip_t *s_ctl_dynparams_ip =
2706                     (ivd_ctl_set_config_ip_t *)pv_api_ip;
2707     ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
2708                     (ivd_ctl_set_config_op_t *)pv_api_op;
2709 
2710     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2711 
2712     s_ctl_dynparams_op->u4_error_code = 0;
2713 
2714     ps_codec->e_pic_skip_mode = s_ctl_dynparams_ip->e_frm_skip_mode;
2715 
2716     if(s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2717     {
2718 
2719         if((s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_P) &&
2720            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_B) &&
2721            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_PB))
2722         {
2723             s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2724             ret = IV_FAIL;
2725         }
2726     }
2727 
2728     strd = ps_codec->i4_disp_strd;
2729     if(1 == ps_codec->i4_share_disp_buf)
2730     {
2731         strd = ps_codec->i4_strd;
2732     }
2733 
2734 
2735     {
2736         if((WORD32)s_ctl_dynparams_ip->u4_disp_wd >= ps_codec->i4_disp_wd)
2737         {
2738             strd = s_ctl_dynparams_ip->u4_disp_wd;
2739         }
2740         else if(0 == ps_codec->i4_sps_done)
2741         {
2742             strd = s_ctl_dynparams_ip->u4_disp_wd;
2743         }
2744         else if(s_ctl_dynparams_ip->u4_disp_wd == 0)
2745         {
2746             strd = ps_codec->i4_disp_strd;
2747         }
2748         else
2749         {
2750             strd = 0;
2751             s_ctl_dynparams_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2752             s_ctl_dynparams_op->u4_error_code |= IHEVCD_INVALID_DISP_STRD;
2753             ret = IV_FAIL;
2754         }
2755     }
2756 
2757     ps_codec->i4_disp_strd = strd;
2758     if(1 == ps_codec->i4_share_disp_buf)
2759     {
2760         ps_codec->i4_strd = strd;
2761     }
2762 
2763     if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
2764         ps_codec->i4_header_mode = 0;
2765     else if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
2766         ps_codec->i4_header_mode = 1;
2767     else
2768     {
2769 
2770         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2771         ps_codec->i4_header_mode = 1;
2772         ret = IV_FAIL;
2773     }
2774 
2775     ps_codec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
2776 
2777     if((s_ctl_dynparams_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
2778        (s_ctl_dynparams_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
2779     {
2780         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2781         ret = IV_FAIL;
2782     }
2783     ps_codec->e_frm_out_mode = s_ctl_dynparams_ip->e_frm_out_mode;
2784 
2785     return ret;
2786 
2787 }
2788 /**
2789 *******************************************************************************
2790 *
2791 * @brief
2792 *  Resets the decoder state
2793 *
2794 * @par Description:
2795 *  Resets the decoder state by calling ihevcd_init()
2796 *
2797 * @param[in] ps_codec_obj
2798 *  Pointer to codec object at API level
2799 *
2800 * @param[in] pv_api_ip
2801 *  Pointer to input argument structure
2802 *
2803 * @param[out] pv_api_op
2804 *  Pointer to output argument structure
2805 *
2806 * @returns  Status
2807 *
2808 * @remarks
2809 *
2810 *
2811 *******************************************************************************
2812 */
ihevcd_reset(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2813 WORD32 ihevcd_reset(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2814 {
2815     codec_t *ps_codec;
2816     ivd_ctl_reset_op_t *s_ctl_reset_op = (ivd_ctl_reset_op_t *)pv_api_op;
2817     UNUSED(pv_api_ip);
2818     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2819 
2820     if(ps_codec != NULL)
2821     {
2822         DEBUG("\nReset called \n");
2823         ihevcd_init(ps_codec);
2824     }
2825     else
2826     {
2827         DEBUG("\nReset called without Initializing the decoder\n");
2828         s_ctl_reset_op->u4_error_code = IHEVCD_INIT_NOT_DONE;
2829     }
2830 
2831     return IV_SUCCESS;
2832 }
2833 
2834 /**
2835 *******************************************************************************
2836 *
2837 * @brief
2838 *  Releases display buffer from application to codec  to signal to the codec
2839 * that it can write to this buffer  if required. Till release is called,
2840 * codec can not write  to this buffer
2841 *
2842 * @par Description:
2843 *  Marks the buffer as display done
2844 *
2845 * @param[in] ps_codec_obj
2846 *  Pointer to codec object at API level
2847 *
2848 * @param[in] pv_api_ip
2849 *  Pointer to input argument structure
2850 *
2851 * @param[out] pv_api_op
2852 *  Pointer to output argument structure
2853 *
2854 * @returns  Status
2855 *
2856 * @remarks
2857 *
2858 *
2859 *******************************************************************************
2860 */
2861 
ihevcd_rel_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2862 WORD32 ihevcd_rel_display_frame(iv_obj_t *ps_codec_obj,
2863                                 void *pv_api_ip,
2864                                 void *pv_api_op)
2865 {
2866 
2867     ivd_rel_display_frame_ip_t *ps_dec_rel_disp_ip;
2868     ivd_rel_display_frame_op_t *ps_dec_rel_disp_op;
2869 
2870     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2871 
2872     ps_dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
2873     ps_dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op;
2874 
2875     UNUSED(ps_dec_rel_disp_op);
2876 
2877     if(0 == ps_codec->i4_share_disp_buf)
2878     {
2879         return IV_SUCCESS;
2880     }
2881 
2882     ihevc_buf_mgr_release((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
2883 
2884     return IV_SUCCESS;
2885 }
2886 /**
2887 *******************************************************************************
2888 *
2889 * @brief
2890 *  Sets degrade params
2891 *
2892 * @par Description:
2893 *  Sets degrade params.
2894 *  Refer to ihevcd_cxa_ctl_degrade_ip_t definition for details
2895 *
2896 * @param[in] ps_codec_obj
2897 *  Pointer to codec object at API level
2898 *
2899 * @param[in] pv_api_ip
2900 *  Pointer to input argument structure
2901 *
2902 * @param[out] pv_api_op
2903 *  Pointer to output argument structure
2904 *
2905 * @returns  Status
2906 *
2907 * @remarks
2908 *
2909 *
2910 *******************************************************************************
2911 */
2912 
ihevcd_set_degrade(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2913 WORD32 ihevcd_set_degrade(iv_obj_t *ps_codec_obj,
2914                           void *pv_api_ip,
2915                           void *pv_api_op)
2916 {
2917     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
2918     ihevcd_cxa_ctl_degrade_op_t *ps_op;
2919     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2920 
2921     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
2922     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
2923 
2924     ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
2925     ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
2926     ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
2927 
2928     ps_op->u4_error_code = 0;
2929     ps_codec->i4_degrade_pic_cnt = 0;
2930 
2931     return IV_SUCCESS;
2932 }
2933 
2934 
2935 /**
2936 *******************************************************************************
2937 *
2938 * @brief
2939 *  Gets frame dimensions/offsets
2940 *
2941 * @par Description:
2942 *  Gets frame buffer chararacteristics such a x & y offsets  display and
2943 * buffer dimensions
2944 *
2945 * @param[in] ps_codec_obj
2946 *  Pointer to codec object at API level
2947 *
2948 * @param[in] pv_api_ip
2949 *  Pointer to input argument structure
2950 *
2951 * @param[out] pv_api_op
2952 *  Pointer to output argument structure
2953 *
2954 * @returns  Status
2955 *
2956 * @remarks
2957 *
2958 *
2959 *******************************************************************************
2960 */
2961 
ihevcd_get_frame_dimensions(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2962 WORD32 ihevcd_get_frame_dimensions(iv_obj_t *ps_codec_obj,
2963                                    void *pv_api_ip,
2964                                    void *pv_api_op)
2965 {
2966     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
2967     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
2968     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2969     WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
2970     ps_ip = (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
2971     ps_op = (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
2972     UNUSED(ps_ip);
2973     if(ps_codec->i4_sps_done)
2974     {
2975         disp_wd = ps_codec->i4_disp_wd;
2976         disp_ht = ps_codec->i4_disp_ht;
2977 
2978         if(0 == ps_codec->i4_share_disp_buf)
2979         {
2980             buffer_wd = disp_wd;
2981             buffer_ht = disp_ht;
2982         }
2983         else
2984         {
2985             buffer_wd = ps_codec->i4_strd;
2986             buffer_ht = ps_codec->i4_ht + PAD_HT;
2987         }
2988     }
2989     else
2990     {
2991 
2992         disp_wd = 0;
2993         disp_ht = 0;
2994 
2995         if(0 == ps_codec->i4_share_disp_buf)
2996         {
2997             buffer_wd = disp_wd;
2998             buffer_ht = disp_ht;
2999         }
3000         else
3001         {
3002             buffer_wd = ALIGN16(disp_wd) + PAD_WD;
3003             buffer_ht = ALIGN16(disp_ht) + PAD_HT;
3004 
3005         }
3006     }
3007     if(ps_codec->i4_strd > buffer_wd)
3008         buffer_wd = ps_codec->i4_strd;
3009 
3010     if(0 == ps_codec->i4_share_disp_buf)
3011     {
3012         x_offset = 0;
3013         y_offset = 0;
3014     }
3015     else
3016     {
3017         y_offset = PAD_TOP;
3018         x_offset = PAD_LEFT;
3019     }
3020 
3021     ps_op->u4_disp_wd[0] = disp_wd;
3022     ps_op->u4_disp_ht[0] = disp_ht;
3023     ps_op->u4_buffer_wd[0] = buffer_wd;
3024     ps_op->u4_buffer_ht[0] = buffer_ht;
3025     ps_op->u4_x_offset[0] = x_offset;
3026     ps_op->u4_y_offset[0] = y_offset;
3027 
3028     ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3029                     >> 1);
3030     ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3031                     >> 1);
3032     ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3033                     >> 1);
3034     ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3035                     >> 1);
3036     ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
3037                     >> 1);
3038     ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
3039                     >> 1);
3040 
3041     if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
3042                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
3043     {
3044         ps_op->u4_disp_wd[2] = 0;
3045         ps_op->u4_disp_ht[2] = 0;
3046         ps_op->u4_buffer_wd[2] = 0;
3047         ps_op->u4_buffer_ht[2] = 0;
3048         ps_op->u4_x_offset[2] = 0;
3049         ps_op->u4_y_offset[2] = 0;
3050 
3051         ps_op->u4_disp_wd[1] <<= 1;
3052         ps_op->u4_buffer_wd[1] <<= 1;
3053         ps_op->u4_x_offset[1] <<= 1;
3054     }
3055 
3056     return IV_SUCCESS;
3057 
3058 }
3059 
3060 
3061 /**
3062 *******************************************************************************
3063 *
3064 * @brief
3065 *  Gets vui parameters
3066 *
3067 * @par Description:
3068 *  Gets VUI parameters
3069 *
3070 * @param[in] ps_codec_obj
3071 *  Pointer to codec object at API level
3072 *
3073 * @param[in] pv_api_ip
3074 *  Pointer to input argument structure
3075 *
3076 * @param[out] pv_api_op
3077 *  Pointer to output argument structure
3078 *
3079 * @returns  Status
3080 *
3081 * @remarks
3082 *
3083 *
3084 *******************************************************************************
3085 */
ihevcd_get_vui_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3086 WORD32 ihevcd_get_vui_params(iv_obj_t *ps_codec_obj,
3087                              void *pv_api_ip,
3088                              void *pv_api_op)
3089 {
3090     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
3091     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
3092     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3093     sps_t *ps_sps;
3094     vui_t *ps_vui;
3095     WORD32 i;
3096 
3097     ps_ip = (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
3098     ps_op = (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
3099 
3100     if(0 == ps_codec->i4_sps_done)
3101     {
3102         ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3103         return IV_FAIL;
3104     }
3105 
3106     ps_sps = ps_codec->s_parse.ps_sps;
3107     if(0 == ps_sps->i1_sps_valid || 0 == ps_sps->i1_vui_parameters_present_flag)
3108     {
3109         WORD32 sps_idx = 0;
3110         ps_sps = ps_codec->ps_sps_base;
3111 
3112         while((0 == ps_sps->i1_sps_valid) || (0 == ps_sps->i1_vui_parameters_present_flag))
3113         {
3114             sps_idx++;
3115             ps_sps++;
3116 
3117             if(sps_idx == MAX_SPS_CNT - 1)
3118             {
3119                 ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3120                 return IV_FAIL;
3121             }
3122         }
3123     }
3124 
3125     ps_vui = &ps_sps->s_vui_parameters;
3126     UNUSED(ps_ip);
3127 
3128     ps_op->u1_aspect_ratio_info_present_flag         =  ps_vui->u1_aspect_ratio_info_present_flag;
3129     ps_op->u1_aspect_ratio_idc                       =  ps_vui->u1_aspect_ratio_idc;
3130     ps_op->u2_sar_width                              =  ps_vui->u2_sar_width;
3131     ps_op->u2_sar_height                             =  ps_vui->u2_sar_height;
3132     ps_op->u1_overscan_info_present_flag             =  ps_vui->u1_overscan_info_present_flag;
3133     ps_op->u1_overscan_appropriate_flag              =  ps_vui->u1_overscan_appropriate_flag;
3134     ps_op->u1_video_signal_type_present_flag         =  ps_vui->u1_video_signal_type_present_flag;
3135     ps_op->u1_video_format                           =  ps_vui->u1_video_format;
3136     ps_op->u1_video_full_range_flag                  =  ps_vui->u1_video_full_range_flag;
3137     ps_op->u1_colour_description_present_flag        =  ps_vui->u1_colour_description_present_flag;
3138     ps_op->u1_colour_primaries                       =  ps_vui->u1_colour_primaries;
3139     ps_op->u1_transfer_characteristics               =  ps_vui->u1_transfer_characteristics;
3140     ps_op->u1_matrix_coefficients                    =  ps_vui->u1_matrix_coefficients;
3141     ps_op->u1_chroma_loc_info_present_flag           =  ps_vui->u1_chroma_loc_info_present_flag;
3142     ps_op->u1_chroma_sample_loc_type_top_field       =  ps_vui->u1_chroma_sample_loc_type_top_field;
3143     ps_op->u1_chroma_sample_loc_type_bottom_field    =  ps_vui->u1_chroma_sample_loc_type_bottom_field;
3144     ps_op->u1_neutral_chroma_indication_flag         =  ps_vui->u1_neutral_chroma_indication_flag;
3145     ps_op->u1_field_seq_flag                         =  ps_vui->u1_field_seq_flag;
3146     ps_op->u1_frame_field_info_present_flag          =  ps_vui->u1_frame_field_info_present_flag;
3147     ps_op->u1_default_display_window_flag            =  ps_vui->u1_default_display_window_flag;
3148     ps_op->u4_def_disp_win_left_offset               =  ps_vui->u4_def_disp_win_left_offset;
3149     ps_op->u4_def_disp_win_right_offset              =  ps_vui->u4_def_disp_win_right_offset;
3150     ps_op->u4_def_disp_win_top_offset                =  ps_vui->u4_def_disp_win_top_offset;
3151     ps_op->u4_def_disp_win_bottom_offset             =  ps_vui->u4_def_disp_win_bottom_offset;
3152     ps_op->u1_vui_hrd_parameters_present_flag        =  ps_vui->u1_vui_hrd_parameters_present_flag;
3153     ps_op->u1_vui_timing_info_present_flag           =  ps_vui->u1_vui_timing_info_present_flag;
3154     ps_op->u4_vui_num_units_in_tick                  =  ps_vui->u4_vui_num_units_in_tick;
3155     ps_op->u4_vui_time_scale                         =  ps_vui->u4_vui_time_scale;
3156     ps_op->u1_poc_proportional_to_timing_flag        =  ps_vui->u1_poc_proportional_to_timing_flag;
3157     ps_op->u4_num_ticks_poc_diff_one_minus1          =  ps_vui->u4_num_ticks_poc_diff_one_minus1;
3158     ps_op->u1_bitstream_restriction_flag             =  ps_vui->u1_bitstream_restriction_flag;
3159     ps_op->u1_tiles_fixed_structure_flag             =  ps_vui->u1_tiles_fixed_structure_flag;
3160     ps_op->u1_motion_vectors_over_pic_boundaries_flag =  ps_vui->u1_motion_vectors_over_pic_boundaries_flag;
3161     ps_op->u1_restricted_ref_pic_lists_flag          =  ps_vui->u1_restricted_ref_pic_lists_flag;
3162     ps_op->u4_min_spatial_segmentation_idc           =  ps_vui->u4_min_spatial_segmentation_idc;
3163     ps_op->u1_max_bytes_per_pic_denom                =  ps_vui->u1_max_bytes_per_pic_denom;
3164     ps_op->u1_max_bits_per_mincu_denom               =  ps_vui->u1_max_bits_per_mincu_denom;
3165     ps_op->u1_log2_max_mv_length_horizontal          =  ps_vui->u1_log2_max_mv_length_horizontal;
3166     ps_op->u1_log2_max_mv_length_vertical            =  ps_vui->u1_log2_max_mv_length_vertical;
3167 
3168 
3169     /* HRD parameters */
3170     ps_op->u1_timing_info_present_flag                         =    ps_vui->s_vui_hrd_parameters.u1_timing_info_present_flag;
3171     ps_op->u4_num_units_in_tick                                =    ps_vui->s_vui_hrd_parameters.u4_num_units_in_tick;
3172     ps_op->u4_time_scale                                       =    ps_vui->s_vui_hrd_parameters.u4_time_scale;
3173     ps_op->u1_nal_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_nal_hrd_parameters_present_flag;
3174     ps_op->u1_vcl_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_vcl_hrd_parameters_present_flag;
3175     ps_op->u1_cpbdpb_delays_present_flag                       =    ps_vui->s_vui_hrd_parameters.u1_cpbdpb_delays_present_flag;
3176     ps_op->u1_sub_pic_cpb_params_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_present_flag;
3177     ps_op->u1_tick_divisor_minus2                              =    ps_vui->s_vui_hrd_parameters.u1_tick_divisor_minus2;
3178     ps_op->u1_du_cpb_removal_delay_increment_length_minus1     =    ps_vui->s_vui_hrd_parameters.u1_du_cpb_removal_delay_increment_length_minus1;
3179     ps_op->u1_sub_pic_cpb_params_in_pic_timing_sei_flag        =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
3180     ps_op->u1_dpb_output_delay_du_length_minus1                =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_du_length_minus1;
3181     ps_op->u4_bit_rate_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_bit_rate_scale;
3182     ps_op->u4_cpb_size_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_scale;
3183     ps_op->u4_cpb_size_du_scale                                =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_du_scale;
3184     ps_op->u1_initial_cpb_removal_delay_length_minus1          =    ps_vui->s_vui_hrd_parameters.u1_initial_cpb_removal_delay_length_minus1;
3185     ps_op->u1_au_cpb_removal_delay_length_minus1               =    ps_vui->s_vui_hrd_parameters.u1_au_cpb_removal_delay_length_minus1;
3186     ps_op->u1_dpb_output_delay_length_minus1                   =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_length_minus1;
3187 
3188     for(i = 0; i < 6; i++)
3189     {
3190         ps_op->au1_fixed_pic_rate_general_flag[i]                  =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_general_flag[i];
3191         ps_op->au1_fixed_pic_rate_within_cvs_flag[i]               =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_within_cvs_flag[i];
3192         ps_op->au2_elemental_duration_in_tc_minus1[i]              =    ps_vui->s_vui_hrd_parameters.au2_elemental_duration_in_tc_minus1[i];
3193         ps_op->au1_low_delay_hrd_flag[i]                           =    ps_vui->s_vui_hrd_parameters.au1_low_delay_hrd_flag[i];
3194         ps_op->au1_cpb_cnt_minus1[i]                               =    ps_vui->s_vui_hrd_parameters.au1_cpb_cnt_minus1[i];
3195     }
3196 
3197 
3198     return IV_SUCCESS;
3199 }
3200 
3201 /**
3202 *******************************************************************************
3203 *
3204 * @brief
3205 *  Gets SEI mastering display color volume parameters
3206 *
3207 * @par Description:
3208 *  Gets SEI mastering display color volume parameters
3209 *
3210 * @param[in] ps_codec_obj
3211 *  Pointer to codec object at API level
3212 *
3213 * @param[in] pv_api_ip
3214 *  Pointer to input argument structure
3215 *
3216 * @param[out] pv_api_op
3217 *  Pointer to output argument structure
3218 *
3219 * @returns  Status
3220 *
3221 * @remarks
3222 *
3223 *
3224 *******************************************************************************
3225 */
ihevcd_get_sei_mastering_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3226 WORD32 ihevcd_get_sei_mastering_params(iv_obj_t *ps_codec_obj,
3227                              void *pv_api_ip,
3228                              void *pv_api_op)
3229 {
3230     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
3231     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
3232     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3233     sei_params_t *ps_sei;
3234     mastering_dis_col_vol_sei_params_t *ps_mastering_dis_col_vol;
3235     WORD32 i;
3236 
3237     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
3238     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3239     UNUSED(ps_ip);
3240     if(NULL == ps_codec->ps_disp_buf)
3241     {
3242         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3243         return IV_FAIL;
3244     }
3245     ps_sei = &ps_codec->ps_disp_buf->s_sei_params;
3246     if((0 == ps_sei->i4_sei_mastering_disp_colour_vol_params_present_flags)
3247                     || (0 == ps_sei->i1_sei_parameters_present_flag))
3248     {
3249         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3250         return IV_FAIL;
3251     }
3252 
3253     ps_mastering_dis_col_vol = &ps_sei->s_mastering_dis_col_vol_sei_params;
3254 
3255     for(i = 0; i < 3; i++)
3256     {
3257         ps_op->au2_display_primaries_x[i] =
3258                     ps_mastering_dis_col_vol->au2_display_primaries_x[i];
3259 
3260         ps_op->au2_display_primaries_y[i] =
3261                     ps_mastering_dis_col_vol->au2_display_primaries_y[i];
3262     }
3263 
3264     ps_op->u2_white_point_x = ps_mastering_dis_col_vol->u2_white_point_x;
3265 
3266     ps_op->u2_white_point_y = ps_mastering_dis_col_vol->u2_white_point_y;
3267 
3268     ps_op->u4_max_display_mastering_luminance =
3269                     ps_mastering_dis_col_vol->u4_max_display_mastering_luminance;
3270 
3271     ps_op->u4_min_display_mastering_luminance =
3272                     ps_mastering_dis_col_vol->u4_min_display_mastering_luminance;
3273 
3274     return IV_SUCCESS;
3275 }
3276 
3277 /**
3278 *******************************************************************************
3279 *
3280 * @brief
3281 *  Sets Processor type
3282 *
3283 * @par Description:
3284 *  Sets Processor type
3285 *
3286 * @param[in] ps_codec_obj
3287 *  Pointer to codec object at API level
3288 *
3289 * @param[in] pv_api_ip
3290 *  Pointer to input argument structure
3291 *
3292 * @param[out] pv_api_op
3293 *  Pointer to output argument structure
3294 *
3295 * @returns  Status
3296 *
3297 * @remarks
3298 *
3299 *
3300 *******************************************************************************
3301 */
3302 
ihevcd_set_processor(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3303 WORD32 ihevcd_set_processor(iv_obj_t *ps_codec_obj,
3304                             void *pv_api_ip,
3305                             void *pv_api_op)
3306 {
3307     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
3308     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
3309     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3310 
3311     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
3312     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
3313 
3314     ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
3315     ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
3316 
3317     ihevcd_init_function_ptr(ps_codec);
3318 
3319     ihevcd_update_function_ptr(ps_codec);
3320 
3321     if(ps_codec->e_processor_soc && (ps_codec->e_processor_soc <= SOC_HISI_37X))
3322     {
3323         /* 8th bit indicates if format conversion is to be done ahead */
3324         if(ps_codec->e_processor_soc & 0x80)
3325             ps_codec->u4_enable_fmt_conv_ahead = 1;
3326 
3327         /* Lower 7 bit indicate NCTB - if non-zero */
3328         ps_codec->e_processor_soc &= 0x7F;
3329 
3330         if(ps_codec->e_processor_soc)
3331             ps_codec->u4_nctb = ps_codec->e_processor_soc;
3332 
3333 
3334     }
3335 
3336     if((ps_codec->e_processor_soc == SOC_HISI_37X) && (ps_codec->i4_num_cores == 2))
3337     {
3338         ps_codec->u4_nctb = 2;
3339     }
3340 
3341 
3342     ps_op->u4_error_code = 0;
3343     return IV_SUCCESS;
3344 }
3345 
3346 /**
3347 *******************************************************************************
3348 *
3349 * @brief
3350 *  Sets Number of cores that can be used in the codec. Codec uses these many
3351 * threads for decoding
3352 *
3353 * @par Description:
3354 *  Sets number of cores
3355 *
3356 * @param[in] ps_codec_obj
3357 *  Pointer to codec object at API level
3358 *
3359 * @param[in] pv_api_ip
3360 *  Pointer to input argument structure
3361 *
3362 * @param[out] pv_api_op
3363 *  Pointer to output argument structure
3364 *
3365 * @returns  Status
3366 *
3367 * @remarks
3368 *
3369 *
3370 *******************************************************************************
3371 */
3372 
ihevcd_set_num_cores(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3373 WORD32 ihevcd_set_num_cores(iv_obj_t *ps_codec_obj,
3374                             void *pv_api_ip,
3375                             void *pv_api_op)
3376 {
3377     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
3378     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
3379     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3380 
3381     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
3382     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
3383 
3384 #ifdef MULTICORE
3385     ps_codec->i4_num_cores = ps_ip->u4_num_cores;
3386 #else
3387     ps_codec->i4_num_cores = 1;
3388 #endif
3389     ps_op->u4_error_code = 0;
3390     return IV_SUCCESS;
3391 }
3392 /**
3393 *******************************************************************************
3394 *
3395 * @brief
3396 *  Codec control call
3397 *
3398 * @par Description:
3399 *  Codec control call which in turn calls appropriate calls  based on
3400 * subcommand
3401 *
3402 * @param[in] ps_codec_obj
3403 *  Pointer to codec object at API level
3404 *
3405 * @param[in] pv_api_ip
3406 *  Pointer to input argument structure
3407 *
3408 * @param[out] pv_api_op
3409 *  Pointer to output argument structure
3410 *
3411 * @returns  Status
3412 *
3413 * @remarks
3414 *
3415 *
3416 *******************************************************************************
3417 */
3418 
ihevcd_ctl(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3419 WORD32 ihevcd_ctl(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3420 {
3421     ivd_ctl_set_config_ip_t *ps_ctl_ip;
3422     ivd_ctl_set_config_op_t *ps_ctl_op;
3423     WORD32 ret = 0;
3424     WORD32 subcommand;
3425     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3426 
3427     ps_ctl_ip = (ivd_ctl_set_config_ip_t *)pv_api_ip;
3428     ps_ctl_op = (ivd_ctl_set_config_op_t *)pv_api_op;
3429 
3430     if(ps_codec->i4_init_done != 1)
3431     {
3432         ps_ctl_op->u4_error_code |= 1 << IVD_FATALERROR;
3433         ps_ctl_op->u4_error_code |= IHEVCD_INIT_NOT_DONE;
3434         return IV_FAIL;
3435     }
3436     subcommand = ps_ctl_ip->e_sub_cmd;
3437 
3438     switch(subcommand)
3439     {
3440         case IVD_CMD_CTL_GETPARAMS:
3441             ret = ihevcd_get_status(ps_codec_obj, (void *)pv_api_ip,
3442                                     (void *)pv_api_op);
3443             break;
3444         case IVD_CMD_CTL_SETPARAMS:
3445             ret = ihevcd_set_params(ps_codec_obj, (void *)pv_api_ip,
3446                                     (void *)pv_api_op);
3447             break;
3448         case IVD_CMD_CTL_RESET:
3449             ret = ihevcd_reset(ps_codec_obj, (void *)pv_api_ip,
3450                                (void *)pv_api_op);
3451             break;
3452         case IVD_CMD_CTL_SETDEFAULT:
3453         {
3454             ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
3455                             (ivd_ctl_set_config_op_t *)pv_api_op;
3456 
3457             ret = ihevcd_set_default_params(ps_codec);
3458             if(IV_SUCCESS == ret)
3459                 s_ctl_dynparams_op->u4_error_code = 0;
3460             break;
3461         }
3462         case IVD_CMD_CTL_FLUSH:
3463             ret = ihevcd_set_flush_mode(ps_codec_obj, (void *)pv_api_ip,
3464                                         (void *)pv_api_op);
3465             break;
3466         case IVD_CMD_CTL_GETBUFINFO:
3467             ret = ihevcd_get_buf_info(ps_codec_obj, (void *)pv_api_ip,
3468                                       (void *)pv_api_op);
3469             break;
3470         case IVD_CMD_CTL_GETVERSION:
3471         {
3472             ivd_ctl_getversioninfo_ip_t *ps_ip;
3473             ivd_ctl_getversioninfo_op_t *ps_op;
3474             IV_API_CALL_STATUS_T ret;
3475             ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
3476             ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
3477 
3478             ps_op->u4_error_code = IV_SUCCESS;
3479 
3480             if((WORD32)ps_ip->u4_version_buffer_size <= 0)
3481             {
3482                 ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3483                 ret = IV_FAIL;
3484             }
3485             else
3486             {
3487                 ret = ihevcd_get_version((CHAR *)ps_ip->pv_version_buffer,
3488                                          ps_ip->u4_version_buffer_size);
3489                 if(ret != IV_SUCCESS)
3490                 {
3491                     ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3492                     ret = IV_FAIL;
3493                 }
3494             }
3495         }
3496             break;
3497         case IHEVCD_CXA_CMD_CTL_DEGRADE:
3498             ret = ihevcd_set_degrade(ps_codec_obj, (void *)pv_api_ip,
3499                             (void *)pv_api_op);
3500             break;
3501         case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
3502             ret = ihevcd_set_num_cores(ps_codec_obj, (void *)pv_api_ip,
3503                                        (void *)pv_api_op);
3504             break;
3505         case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
3506             ret = ihevcd_get_frame_dimensions(ps_codec_obj, (void *)pv_api_ip,
3507                                               (void *)pv_api_op);
3508             break;
3509         case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
3510             ret = ihevcd_get_vui_params(ps_codec_obj, (void *)pv_api_ip,
3511                                         (void *)pv_api_op);
3512             break;
3513         case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
3514             ret = ihevcd_get_sei_mastering_params(ps_codec_obj, (void *)pv_api_ip,
3515                                         (void *)pv_api_op);
3516             break;
3517         case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
3518             ret = ihevcd_set_processor(ps_codec_obj, (void *)pv_api_ip,
3519                             (void *)pv_api_op);
3520             break;
3521         default:
3522             DEBUG("\nDo nothing\n");
3523             break;
3524     }
3525 
3526     return ret;
3527 }
3528 
3529 /**
3530 *******************************************************************************
3531 *
3532 * @brief
3533 *  Codecs entry point function. All the function calls to  the codec are
3534 * done using this function with different  values specified in command
3535 *
3536 * @par Description:
3537 *  Arguments are tested for validity and then based on the  command
3538 * appropriate function is called
3539 *
3540 * @param[in] ps_handle
3541 *  API level handle for codec
3542 *
3543 * @param[in] pv_api_ip
3544 *  Input argument structure
3545 *
3546 * @param[out] pv_api_op
3547 *  Output argument structure
3548 *
3549 * @returns  Status of the function corresponding to command
3550 *
3551 * @remarks
3552 *
3553 *
3554 *******************************************************************************
3555 */
ihevcd_cxa_api_function(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)3556 IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
3557                                              void *pv_api_ip,
3558                                              void *pv_api_op)
3559 {
3560     WORD32 command;
3561     UWORD32 *pu4_ptr_cmd;
3562     WORD32 ret = 0;
3563     IV_API_CALL_STATUS_T e_status;
3564     e_status = api_check_struct_sanity(ps_handle, pv_api_ip, pv_api_op);
3565 
3566     if(e_status != IV_SUCCESS)
3567     {
3568         DEBUG("error code = %d\n", *((UWORD32 *)pv_api_op + 1));
3569         return IV_FAIL;
3570     }
3571 
3572     pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
3573     pu4_ptr_cmd++;
3574 
3575     command = *pu4_ptr_cmd;
3576 
3577     switch(command)
3578     {
3579         case IVD_CMD_CREATE:
3580             ret = ihevcd_create(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3581             break;
3582         case IVD_CMD_DELETE:
3583             ret = ihevcd_delete(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3584             break;
3585 
3586         case IVD_CMD_VIDEO_DECODE:
3587             ret = ihevcd_decode(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3588             break;
3589 
3590         case IVD_CMD_GET_DISPLAY_FRAME:
3591             //ret = ihevcd_get_display_frame(ps_handle,(void *)pv_api_ip,(void *)pv_api_op);
3592             break;
3593 
3594         case IVD_CMD_SET_DISPLAY_FRAME:
3595             ret = ihevcd_set_display_frame(ps_handle, (void *)pv_api_ip,
3596                                            (void *)pv_api_op);
3597 
3598             break;
3599 
3600         case IVD_CMD_REL_DISPLAY_FRAME:
3601             ret = ihevcd_rel_display_frame(ps_handle, (void *)pv_api_ip,
3602                                            (void *)pv_api_op);
3603             break;
3604 
3605         case IVD_CMD_VIDEO_CTL:
3606             ret = ihevcd_ctl(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3607             break;
3608         default:
3609             ret = IV_FAIL;
3610             break;
3611     }
3612 
3613     return (IV_API_CALL_STATUS_T)ret;
3614 }
3615 
3616