1 //===-- SystemZRegisterInfo.cpp - SystemZ register information ------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "SystemZInstrInfo.h"
11 #include "SystemZRegisterInfo.h"
12 #include "SystemZSubtarget.h"
13 #include "llvm/CodeGen/MachineInstrBuilder.h"
14 #include "llvm/CodeGen/MachineRegisterInfo.h"
15 #include "llvm/Target/TargetFrameLowering.h"
16
17 using namespace llvm;
18
19 #define GET_REGINFO_TARGET_DESC
20 #include "SystemZGenRegisterInfo.inc"
21
SystemZRegisterInfo()22 SystemZRegisterInfo::SystemZRegisterInfo()
23 : SystemZGenRegisterInfo(SystemZ::R14D) {}
24
25 const MCPhysReg *
getCalleeSavedRegs(const MachineFunction * MF) const26 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
27 if (MF->getSubtarget().getTargetLowering()->supportSwiftError() &&
28 MF->getFunction()->getAttributes().hasAttrSomewhere(
29 Attribute::SwiftError))
30 return CSR_SystemZ_SwiftError_SaveList;
31 return CSR_SystemZ_SaveList;
32 }
33
34 const uint32_t *
getCallPreservedMask(const MachineFunction & MF,CallingConv::ID CC) const35 SystemZRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
36 CallingConv::ID CC) const {
37 if (MF.getSubtarget().getTargetLowering()->supportSwiftError() &&
38 MF.getFunction()->getAttributes().hasAttrSomewhere(
39 Attribute::SwiftError))
40 return CSR_SystemZ_SwiftError_RegMask;
41 return CSR_SystemZ_RegMask;
42 }
43
44 BitVector
getReservedRegs(const MachineFunction & MF) const45 SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
46 BitVector Reserved(getNumRegs());
47 const SystemZFrameLowering *TFI = getFrameLowering(MF);
48
49 if (TFI->hasFP(MF)) {
50 // R11D is the frame pointer. Reserve all aliases.
51 Reserved.set(SystemZ::R11D);
52 Reserved.set(SystemZ::R11L);
53 Reserved.set(SystemZ::R11H);
54 Reserved.set(SystemZ::R10Q);
55 }
56
57 // R15D is the stack pointer. Reserve all aliases.
58 Reserved.set(SystemZ::R15D);
59 Reserved.set(SystemZ::R15L);
60 Reserved.set(SystemZ::R15H);
61 Reserved.set(SystemZ::R14Q);
62 return Reserved;
63 }
64
65 void
eliminateFrameIndex(MachineBasicBlock::iterator MI,int SPAdj,unsigned FIOperandNum,RegScavenger * RS) const66 SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
67 int SPAdj, unsigned FIOperandNum,
68 RegScavenger *RS) const {
69 assert(SPAdj == 0 && "Outgoing arguments should be part of the frame");
70
71 MachineBasicBlock &MBB = *MI->getParent();
72 MachineFunction &MF = *MBB.getParent();
73 auto *TII =
74 static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
75 const SystemZFrameLowering *TFI = getFrameLowering(MF);
76 DebugLoc DL = MI->getDebugLoc();
77
78 // Decompose the frame index into a base and offset.
79 int FrameIndex = MI->getOperand(FIOperandNum).getIndex();
80 unsigned BasePtr;
81 int64_t Offset = (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr) +
82 MI->getOperand(FIOperandNum + 1).getImm());
83
84 // Special handling of dbg_value instructions.
85 if (MI->isDebugValue()) {
86 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
87 MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
88 return;
89 }
90
91 // See if the offset is in range, or if an equivalent instruction that
92 // accepts the offset exists.
93 unsigned Opcode = MI->getOpcode();
94 unsigned OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
95 if (OpcodeForOffset) {
96 if (OpcodeForOffset == SystemZ::LE &&
97 MF.getSubtarget<SystemZSubtarget>().hasVector()) {
98 // If LE is ok for offset, use LDE instead on z13.
99 OpcodeForOffset = SystemZ::LDE32;
100 }
101 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
102 }
103 else {
104 // Create an anchor point that is in range. Start at 0xffff so that
105 // can use LLILH to load the immediate.
106 int64_t OldOffset = Offset;
107 int64_t Mask = 0xffff;
108 do {
109 Offset = OldOffset & Mask;
110 OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
111 Mask >>= 1;
112 assert(Mask && "One offset must be OK");
113 } while (!OpcodeForOffset);
114
115 unsigned ScratchReg =
116 MF.getRegInfo().createVirtualRegister(&SystemZ::ADDR64BitRegClass);
117 int64_t HighOffset = OldOffset - Offset;
118
119 if (MI->getDesc().TSFlags & SystemZII::HasIndex
120 && MI->getOperand(FIOperandNum + 2).getReg() == 0) {
121 // Load the offset into the scratch register and use it as an index.
122 // The scratch register then dies here.
123 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
124 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
125 MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg,
126 false, false, true);
127 } else {
128 // Load the anchor address into a scratch register.
129 unsigned LAOpcode = TII->getOpcodeForOffset(SystemZ::LA, HighOffset);
130 if (LAOpcode)
131 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg)
132 .addReg(BasePtr).addImm(HighOffset).addReg(0);
133 else {
134 // Load the high offset into the scratch register and use it as
135 // an index.
136 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
137 BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
138 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
139 }
140
141 // Use the scratch register as the base. It then dies here.
142 MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg,
143 false, false, true);
144 }
145 }
146 MI->setDesc(TII->get(OpcodeForOffset));
147 MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
148 }
149
150 unsigned
getFrameRegister(const MachineFunction & MF) const151 SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
152 const SystemZFrameLowering *TFI = getFrameLowering(MF);
153 return TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D;
154 }
155