1; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
2
3define <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
4;CHECK-LABEL: test_vextd:
5;CHECK: {{ext.8b.*#3}}
6	%tmp1 = load <8 x i8>, <8 x i8>* %A
7	%tmp2 = load <8 x i8>, <8 x i8>* %B
8	%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>
9	ret <8 x i8> %tmp3
10}
11
12define <8 x i8> @test_vextRd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
13;CHECK-LABEL: test_vextRd:
14;CHECK: {{ext.8b.*#5}}
15	%tmp1 = load <8 x i8>, <8 x i8>* %A
16	%tmp2 = load <8 x i8>, <8 x i8>* %B
17	%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4>
18	ret <8 x i8> %tmp3
19}
20
21define <16 x i8> @test_vextq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
22;CHECK-LABEL: test_vextq:
23;CHECK: {{ext.16b.*3}}
24	%tmp1 = load <16 x i8>, <16 x i8>* %A
25	%tmp2 = load <16 x i8>, <16 x i8>* %B
26	%tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>
27	ret <16 x i8> %tmp3
28}
29
30define <16 x i8> @test_vextRq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
31;CHECK-LABEL: test_vextRq:
32;CHECK: {{ext.16b.*7}}
33	%tmp1 = load <16 x i8>, <16 x i8>* %A
34	%tmp2 = load <16 x i8>, <16 x i8>* %B
35	%tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>
36	ret <16 x i8> %tmp3
37}
38
39define <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
40;CHECK-LABEL: test_vextd16:
41;CHECK: {{ext.8b.*#6}}
42	%tmp1 = load <4 x i16>, <4 x i16>* %A
43	%tmp2 = load <4 x i16>, <4 x i16>* %B
44	%tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
45	ret <4 x i16> %tmp3
46}
47
48define <4 x i32> @test_vextq32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
49;CHECK-LABEL: test_vextq32:
50;CHECK: {{ext.16b.*12}}
51	%tmp1 = load <4 x i32>, <4 x i32>* %A
52	%tmp2 = load <4 x i32>, <4 x i32>* %B
53	%tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
54	ret <4 x i32> %tmp3
55}
56
57; Undef shuffle indices should not prevent matching to VEXT:
58
59define <8 x i8> @test_vextd_undef(<8 x i8>* %A, <8 x i8>* %B) nounwind {
60;CHECK-LABEL: test_vextd_undef:
61;CHECK: {{ext.8b.*}}
62	%tmp1 = load <8 x i8>, <8 x i8>* %A
63	%tmp2 = load <8 x i8>, <8 x i8>* %B
64	%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 3, i32 undef, i32 undef, i32 6, i32 7, i32 8, i32 9, i32 10>
65	ret <8 x i8> %tmp3
66}
67
68define <8 x i8> @test_vextd_undef2(<8 x i8>* %A, <8 x i8>* %B) nounwind {
69;CHECK-LABEL: test_vextd_undef2:
70;CHECK: {{ext.8b.*#6}}
71  %tmp1 = load <8 x i8>, <8 x i8>* %A
72  %tmp2 = load <8 x i8>, <8 x i8>* %B
73  %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 2, i32 3, i32 4, i32 5>
74  ret <8 x i8> %tmp3
75}
76
77define <16 x i8> @test_vextRq_undef(<16 x i8>* %A, <16 x i8>* %B) nounwind {
78;CHECK-LABEL: test_vextRq_undef:
79;CHECK: {{ext.16b.*#7}}
80	%tmp1 = load <16 x i8>, <16 x i8>* %A
81	%tmp2 = load <16 x i8>, <16 x i8>* %B
82	%tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 23, i32 24, i32 25, i32 26, i32 undef, i32 undef, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 undef, i32 6>
83	ret <16 x i8> %tmp3
84}
85
86define <8 x i16> @test_vextRq_undef2(<8 x i16>* %A) nounwind {
87;CHECK-LABEL: test_vextRq_undef2:
88;CHECK: {{ext.16b.*#10}}
89  %tmp1 = load <8 x i16>, <8 x i16>* %A
90  %vext = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 2, i32 3, i32 4>
91  ret <8 x i16> %vext;
92}
93
94; Tests for ReconstructShuffle function. Indices have to be carefully
95; chosen to reach lowering phase as a BUILD_VECTOR.
96
97; One vector needs vext, the other can be handled by extract_subvector
98; Also checks interleaving of sources is handled correctly.
99; Essence: a vext is used on %A and something saner than stack load/store for final result.
100define <4 x i16> @test_interleaved(<8 x i16>* %A, <8 x i16>* %B) nounwind {
101;CHECK-LABEL: test_interleaved:
102;CHECK: ext.8b
103;CHECK: zip1.4h
104        %tmp1 = load <8 x i16>, <8 x i16>* %A
105        %tmp2 = load <8 x i16>, <8 x i16>* %B
106        %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <4 x i32> <i32 3, i32 8, i32 5, i32 9>
107        ret <4 x i16> %tmp3
108}
109
110; An undef in the shuffle list should still be optimizable
111define <4 x i16> @test_undef(<8 x i16>* %A, <8 x i16>* %B) nounwind {
112;CHECK-LABEL: test_undef:
113;CHECK: zip1.4h
114        %tmp1 = load <8 x i16>, <8 x i16>* %A
115        %tmp2 = load <8 x i16>, <8 x i16>* %B
116        %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <4 x i32> <i32 undef, i32 8, i32 5, i32 9>
117        ret <4 x i16> %tmp3
118}
119