1; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
2
3target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
4
5; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
6; CHECK-NEXT:   __LLVM_StackMaps:
7; Header
8; CHECK-NEXT:   .byte 1
9; CHECK-NEXT:   .byte 0
10; CHECK-NEXT:   .short 0
11; Num Functions
12; CHECK-NEXT:   .long 1
13; Num LargeConstants
14; CHECK-NEXT:   .long   0
15; Num Callsites
16; CHECK-NEXT:   .long   1
17
18; Functions and stack size
19; CHECK-NEXT:   .quad _stackmap_liveness
20; CHECK-NEXT:   .quad 16
21
22; Test that the return register is recognized as an live-out.
23define i64 @stackmap_liveness(i1 %c) {
24; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
25; CHECK-NEXT:   .short  0
26; CHECK-NEXT:   .short  0
27; Padding
28; CHECK-NEXT:   .short  0
29; Num LiveOut Entries: 1
30; CHECK-NEXT:   .short  2
31; LiveOut Entry 0: X0
32; CHECK-NEXT:   .short 0
33; CHECK-NEXT:   .byte 0
34; CHECK-NEXT:   .byte 8
35; LiveOut Entry 1: SP
36; CHECK-NEXT:   .short 31
37; CHECK-NEXT:   .byte 0
38; CHECK-NEXT:   .byte 8
39; Align
40; CHECK-NEXT:   .p2align  3
41  %1 = select i1 %c, i64 1, i64 2
42  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, i8* null, i32 0)
43  ret i64 %1
44}
45
46declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
47
48