1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-MACHO 5; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-ELF 6; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=THUMB-LONG 7; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP 8; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP 9; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP 10 11; Note that some of these tests assume that relocations are either 12; movw/movt or constant pool loads. Different platforms will select 13; different approaches. 14 15define i32 @t0(i1 zeroext %a) nounwind { 16 %1 = zext i1 %a to i32 17 ret i32 %1 18} 19 20define i32 @t1(i8 signext %a) nounwind { 21 %1 = sext i8 %a to i32 22 ret i32 %1 23} 24 25define i32 @t2(i8 zeroext %a) nounwind { 26 %1 = zext i8 %a to i32 27 ret i32 %1 28} 29 30define i32 @t3(i16 signext %a) nounwind { 31 %1 = sext i16 %a to i32 32 ret i32 %1 33} 34 35define i32 @t4(i16 zeroext %a) nounwind { 36 %1 = zext i16 %a to i32 37 ret i32 %1 38} 39 40define void @foo(i8 %a, i16 %b) nounwind { 41; ARM: foo 42; THUMB: foo 43;; Materialize i1 1 44; ARM: movw r2, #1 45;; zero-ext 46; ARM: and r2, r2, #1 47; THUMB: and r2, r2, #1 48 %1 = call i32 @t0(i1 zeroext 1) 49; ARM: sxtb r2, r1 50; ARM: mov r0, r2 51; THUMB: sxtb r2, r1 52; THUMB: mov r0, r2 53 %2 = call i32 @t1(i8 signext %a) 54; ARM: and r2, r1, #255 55; ARM: mov r0, r2 56; THUMB: and r2, r1, #255 57; THUMB: mov r0, r2 58 %3 = call i32 @t2(i8 zeroext %a) 59; ARM: sxth r2, r1 60; ARM: mov r0, r2 61; THUMB: sxth r2, r1 62; THUMB: mov r0, r2 63 %4 = call i32 @t3(i16 signext %b) 64; ARM: uxth r2, r1 65; ARM: mov r0, r2 66; THUMB: uxth r2, r1 67; THUMB: mov r0, r2 68 %5 = call i32 @t4(i16 zeroext %b) 69 70;; A few test to check materialization 71;; Note: i1 1 was materialized with t1 call 72; ARM: movw r1, #255 73%6 = call i32 @t2(i8 zeroext 255) 74; ARM: movw r1, #65535 75; THUMB: movw r1, #65535 76%7 = call i32 @t4(i16 zeroext 65535) 77 ret void 78} 79 80define void @foo2() nounwind { 81 %1 = call signext i16 @t5() 82 %2 = call zeroext i16 @t6() 83 %3 = call signext i8 @t7() 84 %4 = call zeroext i8 @t8() 85 %5 = call zeroext i1 @t9() 86 ret void 87} 88 89declare signext i16 @t5(); 90declare zeroext i16 @t6(); 91declare signext i8 @t7(); 92declare zeroext i8 @t8(); 93declare zeroext i1 @t9(); 94 95define i32 @t10() { 96entry: 97; ARM: @t10 98; ARM: movw [[R0:l?r[0-9]*]], #0 99; ARM: movw [[R1:l?r[0-9]*]], #248 100; ARM: movw [[R2:l?r[0-9]*]], #187 101; ARM: movw [[R3:l?r[0-9]*]], #28 102; ARM: movw [[R4:l?r[0-9]*]], #40 103; ARM: movw [[R5:l?r[0-9]*]], #186 104; ARM: and [[R0]], [[R0]], #255 105; ARM: and [[R1]], [[R1]], #255 106; ARM: and [[R2]], [[R2]], #255 107; ARM: and [[R3]], [[R3]], #255 108; ARM: and [[R4]], [[R4]], #255 109; ARM: str [[R4]], [sp] 110; ARM: and [[R4]], [[R5]], #255 111; ARM: str [[R4]], [sp, #4] 112; ARM: bl {{_?}}bar 113; ARM-LONG: @t10 114 115; ARM-LONG-MACHO: {{(movw)|(ldr)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 116; ARM-LONG-MACHO: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 117; ARM-LONG-MACHO: ldr [[R]], {{\[}}[[R]]{{\]}} 118 119; ARM-LONG-ELF: movw [[R:l?r[0-9]*]], :lower16:bar 120; ARM-LONG-ELF: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 121 122; ARM-LONG: blx [[R]] 123; THUMB: @t10 124; THUMB: movs [[R0:l?r[0-9]*]], #0 125; THUMB: movs [[R1:l?r[0-9]*]], #248 126; THUMB: movs [[R2:l?r[0-9]*]], #187 127; THUMB: movs [[R3:l?r[0-9]*]], #28 128; THUMB: movw [[R4:l?r[0-9]*]], #40 129; THUMB: movw [[R5:l?r[0-9]*]], #186 130; THUMB: and [[R0]], [[R0]], #255 131; THUMB: and [[R1]], [[R1]], #255 132; THUMB: and [[R2]], [[R2]], #255 133; THUMB: and [[R3]], [[R3]], #255 134; THUMB: and [[R4]], [[R4]], #255 135; THUMB: str.w [[R4]], [sp] 136; THUMB: and [[R4]], [[R5]], #255 137; THUMB: str.w [[R4]], [sp, #4] 138; THUMB: bl {{_?}}bar 139; THUMB-LONG: @t10 140; THUMB-LONG: {{(movw)|(ldr.n)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 141; THUMB-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 142; THUMB-LONG: ldr{{(.w)?}} [[R]], {{\[}}[[R]]{{\]}} 143; THUMB-LONG: blx [[R]] 144 %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70) 145 ret i32 0 146} 147 148declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext) 149 150define i32 @bar0(i32 %i) nounwind { 151 ret i32 0 152} 153 154define void @foo3() uwtable { 155; ARM: movw r0, #0 156; ARM: {{(movw r1, :lower16:_?bar0)|(ldr r1, .LCPI)}} 157; ARM: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}} 158; ARM: blx r1 159; THUMB: movs r0, #0 160; THUMB: {{(movw r1, :lower16:_?bar0)|(ldr.n r1, .LCPI)}} 161; THUMB: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}} 162; THUMB: blx r1 163 %fptr = alloca i32 (i32)*, align 8 164 store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8 165 %1 = load i32 (i32)*, i32 (i32)** %fptr, align 8 166 %call = call i32 %1(i32 0) 167 ret void 168} 169 170define i32 @LibCall(i32 %a, i32 %b) { 171entry: 172; ARM: LibCall 173; ARM: bl {{___udivsi3|__aeabi_uidiv}} 174; ARM-LONG: LibCall 175 176; ARM-LONG-MACHO: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}} 177; ARM-LONG-MACHO: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 178; ARM-LONG-MACHO: ldr r2, [r2] 179 180; ARM-LONG-ELF: movw r2, :lower16:__aeabi_uidiv 181; ARM-LONG-ELF: movt r2, :upper16:__aeabi_uidiv 182 183; ARM-LONG: blx r2 184; THUMB: LibCall 185; THUMB: bl {{___udivsi3|__aeabi_uidiv}} 186; THUMB-LONG: LibCall 187; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}} 188; THUMB-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 189; THUMB-LONG: ldr r2, [r2] 190; THUMB-LONG: blx r2 191 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] 192 ret i32 %tmp1 193} 194 195; Test fastcc 196 197define fastcc void @fast_callee(float %i) ssp { 198entry: 199; ARM: fast_callee 200; ARM: vmov r0, s0 201; THUMB: fast_callee 202; THUMB: vmov r0, s0 203; ARM-NOVFP: fast_callee 204; ARM-NOVFP-NOT: s0 205; THUMB-NOVFP: fast_callee 206; THUMB-NOVFP-NOT: s0 207 call void @print(float %i) 208 ret void 209} 210 211define void @fast_caller() ssp { 212entry: 213; ARM: fast_caller 214; ARM: vldr s0, 215; THUMB: fast_caller 216; THUMB: vldr s0, 217; ARM-NOVFP: fast_caller 218; ARM-NOVFP: movw r0, #13107 219; ARM-NOVFP: movt r0, #16611 220; THUMB-NOVFP: fast_caller 221; THUMB-NOVFP: movw r0, #13107 222; THUMB-NOVFP: movt r0, #16611 223 call fastcc void @fast_callee(float 0x401C666660000000) 224 ret void 225} 226 227define void @no_fast_callee(float %i) ssp { 228entry: 229; ARM: no_fast_callee 230; ARM: vmov s0, r0 231; THUMB: no_fast_callee 232; THUMB: vmov s0, r0 233; ARM-NOVFP: no_fast_callee 234; ARM-NOVFP-NOT: s0 235; THUMB-NOVFP: no_fast_callee 236; THUMB-NOVFP-NOT: s0 237 call void @print(float %i) 238 ret void 239} 240 241define void @no_fast_caller() ssp { 242entry: 243; ARM: no_fast_caller 244; ARM: vmov r0, s0 245; THUMB: no_fast_caller 246; THUMB: vmov r0, s0 247; ARM-NOVFP: no_fast_caller 248; ARM-NOVFP: movw r0, #13107 249; ARM-NOVFP: movt r0, #16611 250; THUMB-NOVFP: no_fast_caller 251; THUMB-NOVFP: movw r0, #13107 252; THUMB-NOVFP: movt r0, #16611 253 call void @no_fast_callee(float 0x401C666660000000) 254 ret void 255} 256 257declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6) 258 259define void @call_undef_args() { 260; ARM-LABEL: call_undef_args 261; ARM: movw r0, #1 262; ARM-NEXT: movw r1, #2 263; ARM-NEXT: movw r2, #3 264; ARM-NEXT: movw r3, #4 265; ARM-NOT: str {{r[0-9]+}}, [sp] 266; ARM: movw [[REG:l?r[0-9]*]], #6 267; ARM-NEXT: str [[REG]], [sp, #4] 268 call void @bar2(i32 1, i32 2, i32 3, i32 4, i32 undef, i32 6) 269 ret void 270} 271 272declare void @print(float) 273