1; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips -relocation-model=pic | FileCheck %s
2; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s
3; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s
4; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s
5
6@us = global i16 0, align 2
7
8define i32 @lhfunc() {
9entry:
10; CHECK-LABEL: lhfunc
11; CHECK: lh $[[REG1:[0-9]+]], 0(${{[0-9]+}})
12  %0 = load i16, i16* @us, align 2
13  %conv = sext i16 %0 to i32
14  ret i32 %conv
15}
16
17define i16 @lhfunc_atomic() {
18entry:
19; CHECK-LABEL: lhfunc_atomic
20; CHECK: lh $[[REG1:[0-9]+]], 0(${{[0-9]+}})
21  %0 = load atomic i16, i16* @us acquire, align 2
22  ret i16 %0
23}
24
25define i32 @lhufunc() {
26entry:
27; CHECK-LABEL: lhufunc
28; CHECK: lhu $[[REG1:[0-9]+]], 0(${{[0-9]+}})
29  %0 = load i16, i16* @us, align 2
30  %conv = zext i16 %0 to i32
31  ret i32 %conv
32}
33