1; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefixes=ALL,GP32
2; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefixes=ALL,GP32
3; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
4; RUN:    -check-prefixes=ALL,GP32
5; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
6; RUN:    -check-prefixes=ALL,GP32
7; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
8; RUN:    -check-prefixes=ALL,GP32
9; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
10; RUN:    -check-prefixes=ALL,GP32
11; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
12; RUN:    -check-prefixes=ALL,GP64
13; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
14; RUN:    -check-prefixes=ALL,GP64
15; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
16; RUN:    -check-prefixes=ALL,GP64
17; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
18; RUN:    -check-prefixes=ALL,GP64
19; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
20; RUN:    -check-prefixes=ALL,GP64
21; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
22; RUN:    -check-prefixes=ALL,GP64
23; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
24; RUN:    -check-prefixes=ALL,GP64
25; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
26; RUN:    -check-prefixes=ALL,MM,MM32
27; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
28; RUN:    -check-prefixes=ALL,MM,MM32
29; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
30; RUN:    -check-prefixes=ALL,MM,MM64
31
32define signext i1 @not_i1(i1 signext %a) {
33entry:
34; ALL-LABEL: not_i1:
35
36  ; GP32:         not     $2, $4
37
38  ; GP64:         not     $2, $4
39
40  ; MM:           not16   $2, $4
41
42  %r = xor i1 %a, -1
43  ret i1 %r
44}
45
46define signext i8 @not_i8(i8 signext %a) {
47entry:
48; ALL-LABEL: not_i8:
49
50  ; GP32:         not     $2, $4
51
52  ; GP64:         not     $2, $4
53
54  ; MM:           not16   $2, $4
55
56  %r = xor i8 %a, -1
57  ret i8 %r
58}
59
60define signext i16 @not_i16(i16 signext %a) {
61entry:
62; ALL-LABEL: not_i16:
63
64  ; GP32:         not     $2, $4
65
66  ; GP64:         not     $2, $4
67
68  ; MM:           not16   $2, $4
69
70  %r = xor i16 %a, -1
71  ret i16 %r
72}
73
74define signext i32 @not_i32(i32 signext %a) {
75entry:
76; ALL-LABEL: not_i32:
77
78  ; GP32:         not     $2, $4
79
80  ; GP64:         not     $2, $4
81
82  ; MM:           not16   $2, $4
83
84  %r = xor i32 %a, -1
85  ret i32 %r
86}
87
88define signext i64 @not_i64(i64 signext %a) {
89entry:
90; ALL-LABEL: not_i64:
91
92  ; GP32:         not     $2, $4
93  ; GP32:         not     $3, $5
94
95  ; GP64:         daddiu  $[[T0:[0-9]+]], $zero, -1
96  ; GP64:         xor     $2, $4, $[[T0]]
97
98  ; MM32:         not16   $2, $4
99  ; MM32:         not16   $3, $5
100
101  ; MM64:         daddiu  $[[T0:[0-9]+]], $zero, -1
102  ; MM64:         xor     $2, $4, $[[T0]]
103
104  %r = xor i64 %a, -1
105  ret i64 %r
106}
107
108define signext i128 @not_i128(i128 signext %a) {
109entry:
110; ALL-LABEL: not_i128:
111
112  ; GP32:         not     $2, $4
113  ; GP32:         not     $3, $5
114  ; GP32:         not     $4, $6
115  ; GP32:         not     $5, $7
116
117  ; GP64:         daddiu  $[[T0:[0-9]+]], $zero, -1
118  ; GP64:         xor     $2, $4, $[[T0]]
119  ; GP64:         xor     $3, $5, $[[T0]]
120
121  ; MM32:         not16   $2, $4
122  ; MM32:         not16   $3, $5
123  ; MM32:         not16   $4, $6
124  ; MM32:         not16   $5, $7
125
126  ; MM64:         daddiu  $[[T0:[0-9]+]], $zero, -1
127  ; MM64:         xor     $2, $4, $[[T0]]
128  ; MM64:         xor     $3, $5, $[[T0]]
129
130  %r = xor i128 %a, -1
131  ret i128 %r
132}
133
134define signext i1 @nor_i1(i1 signext %a, i1 signext %b) {
135entry:
136; ALL-LABEL: nor_i1:
137
138  ; ALL:          nor     $2, $5, $4
139
140  %or = or i1 %b, %a
141  %r = xor i1 %or, -1
142  ret i1 %r
143}
144
145define signext i8 @nor_i8(i8 signext %a, i8 signext %b) {
146entry:
147; ALL-LABEL: nor_i8:
148
149  ; ALL:          nor     $2, $5, $4
150
151  %or = or i8 %b, %a
152  %r = xor i8 %or, -1
153  ret i8 %r
154}
155
156define signext i16 @nor_i16(i16 signext %a, i16 signext %b) {
157entry:
158; ALL-LABEL: nor_i16:
159
160  ; ALL:          nor     $2, $5, $4
161
162  %or = or i16 %b, %a
163  %r = xor i16 %or, -1
164  ret i16 %r
165}
166
167define signext i32 @nor_i32(i32 signext %a, i32 signext %b) {
168entry:
169; ALL-LABEL: nor_i32:
170
171  ; GP32:         nor     $2, $5, $4
172
173  ; GP64:         or      $[[T0:[0-9]+]], $5, $4
174  ; GP64:         sll     $[[T1:[0-9]+]], $[[T0]], 0
175  ; GP64:         not     $2, $[[T1]]
176
177  ; MM32:         nor     $2, $5, $4
178
179  ; MM64:         or      $[[T0:[0-9]+]], $5, $4
180  ; MM64:         sll     $[[T1:[0-9]+]], $[[T0]], 0
181  ; MM64:         not16   $2, $[[T1]]
182
183  %or = or i32 %b, %a
184  %r = xor i32 %or, -1
185  ret i32 %r
186}
187
188
189define signext i64 @nor_i64(i64 signext %a, i64 signext %b) {
190entry:
191; ALL-LABEL: nor_i64:
192
193  ; GP32:         nor     $2, $6, $4
194  ; GP32:         nor     $3, $7, $5
195
196  ; GP64:         nor     $2, $5, $4
197
198  ; MM32:         nor     $2, $6, $4
199  ; MM32:         nor     $3, $7, $5
200
201  ; MM64:         nor     $2, $5, $4
202
203  %or = or i64 %b, %a
204  %r = xor i64 %or, -1
205  ret i64 %r
206}
207
208define signext i128 @nor_i128(i128 signext %a, i128 signext %b) {
209entry:
210; ALL-LABEL: nor_i128:
211
212  ; GP32:         lw      $[[T0:[0-9]+]], 24($sp)
213  ; GP32:         lw      $[[T1:[0-9]+]], 20($sp)
214  ; GP32:         lw      $[[T2:[0-9]+]], 16($sp)
215  ; GP32:         nor     $2, $[[T2]], $4
216  ; GP32:         nor     $3, $[[T1]], $5
217  ; GP32:         nor     $4, $[[T0]], $6
218  ; GP32:         lw      $[[T3:[0-9]+]], 28($sp)
219  ; GP32:         nor     $5, $[[T3]], $7
220
221  ; GP64:         nor     $2, $6, $4
222  ; GP64:         nor     $3, $7, $5
223
224  ; MM32:         lw      $[[T0:[0-9]+]], 20($sp)
225  ; MM32:         lw      $[[T1:[0-9]+]], 16($sp)
226  ; MM32:         nor     $2, $[[T1]], $4
227  ; MM32:         nor     $3, $[[T0]], $5
228  ; MM32:         lw      $[[T2:[0-9]+]], 24($sp)
229  ; MM32:         nor     $4, $[[T2]], $6
230  ; MM32:         lw      $[[T3:[0-9]+]], 28($sp)
231  ; MM32:         nor     $5, $[[T3]], $7
232
233  ; MM64:         nor     $2, $6, $4
234  ; MM64:         nor     $3, $7, $5
235
236  %or = or i128 %b, %a
237  %r = xor i128 %or, -1
238  ret i128 %r
239}
240