1; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
2; RUN: llc -O1 -mcpu=pwr7 < %s | FileCheck %s
3target datalayout = "E-m:e-i64:64-n32:64"
4target triple = "powerpc64-unknown-linux-gnu"
5
6define zeroext i1 @testi1(i1 zeroext %b1, i1 zeroext %b2) #0 {
7entry:
8  %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2) #0
9  %1 = and i8 %0, 1
10  %tobool3 = icmp ne i8 %1, 0
11  ret i1 %tobool3
12
13; CHECK-LABEL: @testi1
14; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
15; CHECK-DAG: li [[REG1:[0-9]+]], 0
16; CHECK-DAG: crmove [[REG2:[0-9]+]], 1
17; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
18; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1
19; CHECK-DAG: li [[REG4:[0-9]+]], 1
20; CHECK: isel 3, [[REG4]], [[REG1]], [[REG3]]
21; CHECK: blr
22}
23
24define signext i32 @testi32(i32 signext %b1, i32 signext %b2) #0 {
25entry:
26  %0 = tail call i32 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i32 %b1, i32 %b2) #0
27  ret i32 %0
28
29; The ABI sign_extend should combine with the any_extend from the asm result,
30; and the result will be 0 or -1. This highlights the fact that only the first
31; bit is meaningful.
32; CHECK-LABEL: @testi32
33; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
34; CHECK-DAG: li [[REG1:[0-9]+]], 0
35; CHECK-DAG: crmove [[REG2:[0-9]+]], 1
36; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
37; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1
38; CHECK-DAG: li [[REG4:[0-9]+]], -1
39; CHECK: isel 3, [[REG4]], [[REG1]], [[REG3]]
40; CHECK: blr
41}
42
43define zeroext i8 @testi8(i8 zeroext %b1, i8 zeroext %b2) #0 {
44entry:
45  %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i8 %b1, i8 %b2) #0
46  ret i8 %0
47
48; CHECK-LABEL: @testi8
49; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
50; CHECK-DAG: li [[REG1:[0-9]+]], 0
51; CHECK-DAG: crmove [[REG2:[0-9]+]], 1
52; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
53; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1
54; CHECK-DAG: li [[REG4:[0-9]+]], 1
55; CHECK: isel 3, [[REG4]], [[REG1]], [[REG3]]
56; CHECK: blr
57}
58
59attributes #0 = { nounwind "target-features"="+crbits" }
60
61