1; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC32
2; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC64
3; RUN: llc -O0 -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=PPC64-ELFv2
4
5declare void @foo()
6
7define i32 @test_cr2() nounwind uwtable {
8entry:
9  %ret = alloca i32, align 4
10  %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
11  store i32 %0, i32* %ret, align 4
12  call void @foo()
13  %1 = load i32, i32* %ret, align 4
14  ret i32 %1
15}
16
17; PPC32: stw 31, -4(1)
18; PPC32: stwu 1, -32(1)
19; PPC32: mfcr 12
20; PPC32-NEXT: stw 12, 24(31)
21; PPC32: lwz 12, 24(31)
22; PPC32-NEXT: mtocrf 32, 12
23
24; PPC64: .cfi_startproc
25; PPC64: mfcr 12
26; PPC64: stw 12, 8(1)
27; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
28; PPC64: .cfi_def_cfa_offset 128
29; PPC64: .cfi_offset lr, 16
30; PPC64: .cfi_offset cr2, 8
31; PPC64: addi 1, 1, [[AMT]]
32; PPC64: lwz 12, 8(1)
33; PPC64: mtocrf 32, 12
34; PPC64: .cfi_endproc
35
36define i32 @test_cr234() nounwind {
37entry:
38  %ret = alloca i32, align 4
39  %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
40  store i32 %0, i32* %ret, align 4
41  call void @foo()
42  %1 = load i32, i32* %ret, align 4
43  ret i32 %1
44}
45
46; PPC32: stw 31, -4(1)
47; PPC32: stwu 1, -32(1)
48; PPC32: mfcr 12
49; PPC32-NEXT: stw 12, 24(31)
50; PPC32: lwz 12, 24(31)
51; PPC32-NEXT: mtocrf 32, 12
52; PPC32-NEXT: mtocrf 16, 12
53; PPC32-NEXT: mtocrf 8, 12
54
55; PPC64: mfcr 12
56; PPC64: stw 12, 8(1)
57; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
58; PPC64: addi 1, 1, [[AMT]]
59; PPC64: lwz 12, 8(1)
60; PPC64: mtocrf 32, 12
61; PPC64: mtocrf 16, 12
62; PPC64: mtocrf 8, 12
63
64; Generate mfocrf in prologue when we need to save 1 nonvolatile CR field
65define void @cloberOneNvCrField() {
66entry:
67  tail call void asm sideeffect "# clobbers", "~{cr2}"()
68  ret void
69
70; PPC64-ELFv2-LABEL: @cloberOneNvCrField
71; PPC64-ELFv2: mfocrf [[REG1:[0-9]+]], 32
72}
73
74; Generate mfcr in prologue when we need to save all nonvolatile CR field
75define void @cloberAllNvCrField() {
76entry:
77  tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"()
78  ret void
79
80; PPC64-ELFv2-LABEL: @cloberAllNvCrField
81; PPC64-ELFv2: mfcr [[REG1:[0-9]+]]
82}
83