1; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
2; RUN: llc -mcpu=a2q < %s | FileCheck %s --check-prefix=QPX
3target triple = "powerpc64-unknown-linux-gnu"
4
5declare float @fabsf(float)
6
7declare float @fminf(float, float)
8declare double @fmin(double, double)
9declare float @llvm.minnum.f32(float, float)
10declare double @llvm.minnum.f64(double, double)
11
12declare float @fmaxf(float, float)
13declare double @fmax(double, double)
14declare float @llvm.maxnum.f32(float, float)
15declare double @llvm.maxnum.f64(double, double)
16
17declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
18declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>)
19declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
20declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>)
21
22define void @test1(float %f, float* %fp) {
23entry:
24  br label %loop_body
25
26loop_body:
27  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
28  %0 = call float @llvm.minnum.f32(float %f, float 1.0)
29  store float %0, float* %fp, align 4
30  %1 = add i64 %invar_address.dim.0.01, 1
31  %2 = icmp eq i64 %1, 2
32  br i1 %2, label %loop_exit, label %loop_body
33
34loop_exit:
35  ret void
36}
37
38; CHECK-LABEL: test1:
39; CHECK-NOT: mtctr
40; CHECK: bl fminf
41
42define void @test1v(<4 x float> %f, <4 x float>* %fp) {
43entry:
44  br label %loop_body
45
46loop_body:
47  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
48  %0 = call <4 x float> @llvm.minnum.v4f32(<4 x float> %f, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)
49  store <4 x float> %0, <4 x float>* %fp, align 16
50  %1 = add i64 %invar_address.dim.0.01, 1
51  %2 = icmp eq i64 %1, 2
52  br i1 %2, label %loop_exit, label %loop_body
53
54loop_exit:
55  ret void
56}
57
58; CHECK-LABEL: test1v:
59; CHECK-NOT: mtctr
60; CHECK: bl fminf
61
62; QPX-LABEL: test1v:
63; QPX: mtctr
64; QPX-NOT: bl fminf
65; QPX: blr
66
67define void @test1a(float %f, float* %fp) {
68entry:
69  br label %loop_body
70
71loop_body:
72  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
73  %0 = call float @fminf(float %f, float 1.0) readnone
74  store float %0, float* %fp, align 4
75  %1 = add i64 %invar_address.dim.0.01, 1
76  %2 = icmp eq i64 %1, 2
77  br i1 %2, label %loop_exit, label %loop_body
78
79loop_exit:
80  ret void
81}
82
83; CHECK-LABEL: test1a:
84; CHECK-NOT: mtctr
85; CHECK: bl fminf
86
87define void @test2(float %f, float* %fp) {
88entry:
89  br label %loop_body
90
91loop_body:
92  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
93  %0 = call float @llvm.maxnum.f32(float %f, float 1.0)
94  store float %0, float* %fp, align 4
95  %1 = add i64 %invar_address.dim.0.01, 1
96  %2 = icmp eq i64 %1, 2
97  br i1 %2, label %loop_exit, label %loop_body
98
99loop_exit:
100  ret void
101}
102
103; CHECK-LABEL: test2:
104; CHECK-NOT: mtctr
105; CHECK: bl fmaxf
106
107define void @test2v(<4 x double> %f, <4 x double>* %fp) {
108entry:
109  br label %loop_body
110
111loop_body:
112  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
113  %0 = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %f, <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>)
114  store <4 x double> %0, <4 x double>* %fp, align 16
115  %1 = add i64 %invar_address.dim.0.01, 1
116  %2 = icmp eq i64 %1, 2
117  br i1 %2, label %loop_exit, label %loop_body
118
119loop_exit:
120  ret void
121}
122
123; CHECK-LABEL: test2v:
124; CHECK-NOT: mtctr
125; CHECK: bl fmax
126
127; QPX-LABEL: test2v:
128; QPX: mtctr
129; QPX-NOT: bl fmax
130; QPX: blr
131
132define void @test2a(float %f, float* %fp) {
133entry:
134  br label %loop_body
135
136loop_body:
137  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
138  %0 = call float @fmaxf(float %f, float 1.0) readnone
139  store float %0, float* %fp, align 4
140  %1 = add i64 %invar_address.dim.0.01, 1
141  %2 = icmp eq i64 %1, 2
142  br i1 %2, label %loop_exit, label %loop_body
143
144loop_exit:
145  ret void
146}
147
148; CHECK-LABEL: test2a:
149; CHECK-NOT: mtctr
150; CHECK: bl fmaxf
151
152define void @test3(double %f, double* %fp) {
153entry:
154  br label %loop_body
155
156loop_body:
157  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
158  %0 = call double @llvm.minnum.f64(double %f, double 1.0)
159  store double %0, double* %fp, align 8
160  %1 = add i64 %invar_address.dim.0.01, 1
161  %2 = icmp eq i64 %1, 2
162  br i1 %2, label %loop_exit, label %loop_body
163
164loop_exit:
165  ret void
166}
167
168; CHECK-LABEL: test3:
169; CHECK-NOT: mtctr
170; CHECK: bl fmin
171
172define void @test3a(double %f, double* %fp) {
173entry:
174  br label %loop_body
175
176loop_body:
177  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
178  %0 = call double @fmin(double %f, double 1.0) readnone
179  store double %0, double* %fp, align 8
180  %1 = add i64 %invar_address.dim.0.01, 1
181  %2 = icmp eq i64 %1, 2
182  br i1 %2, label %loop_exit, label %loop_body
183
184loop_exit:
185  ret void
186}
187
188; CHECK-LABEL: test3a:
189; CHECK-NOT: mtctr
190; CHECK: bl fmin
191
192define void @test4(double %f, double* %fp) {
193entry:
194  br label %loop_body
195
196loop_body:
197  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
198  %0 = call double @llvm.maxnum.f64(double %f, double 1.0)
199  store double %0, double* %fp, align 8
200  %1 = add i64 %invar_address.dim.0.01, 1
201  %2 = icmp eq i64 %1, 2
202  br i1 %2, label %loop_exit, label %loop_body
203
204loop_exit:
205  ret void
206}
207
208; CHECK-LABEL: test4:
209; CHECK-NOT: mtctr
210; CHECK: bl fmax
211
212define void @test4a(double %f, double* %fp) {
213entry:
214  br label %loop_body
215
216loop_body:
217  %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
218  %0 = call double @fmax(double %f, double 1.0) readnone
219  store double %0, double* %fp, align 8
220  %1 = add i64 %invar_address.dim.0.01, 1
221  %2 = icmp eq i64 %1, 2
222  br i1 %2, label %loop_exit, label %loop_body
223
224loop_exit:
225  ret void
226}
227
228; CHECK-LABEL: test4a:
229; CHECK-NOT: mtctr
230; CHECK: bl fmax
231
232