1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
3
4define <4 x i64> @test256_1(<4 x i64> %x, <4 x i64> %y) nounwind {
5; CHECK-LABEL: test256_1:
6; CHECK:       ## BB#0:
7; CHECK-NEXT:    vpcmpeqq %ymm1, %ymm0, %k1
8; CHECK-NEXT:    vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
9; CHECK-NEXT:    retq
10  %mask = icmp eq <4 x i64> %x, %y
11  %max = select <4 x i1> %mask, <4 x i64> %x, <4 x i64> %y
12  ret <4 x i64> %max
13}
14
15define <4 x i64> @test256_2(<4 x i64> %x, <4 x i64> %y, <4 x i64> %x1) nounwind {
16; CHECK-LABEL: test256_2:
17; CHECK:       ## BB#0:
18; CHECK-NEXT:    vpcmpgtq %ymm1, %ymm0, %k1
19; CHECK-NEXT:    vpblendmq %ymm2, %ymm1, %ymm0 {%k1}
20; CHECK-NEXT:    retq
21  %mask = icmp sgt <4 x i64> %x, %y
22  %max = select <4 x i1> %mask, <4 x i64> %x1, <4 x i64> %y
23  ret <4 x i64> %max
24}
25
26define <8 x i32> @test256_3(<8 x i32> %x, <8 x i32> %y, <8 x i32> %x1) nounwind {
27; CHECK-LABEL: test256_3:
28; CHECK:       ## BB#0:
29; CHECK-NEXT:    vpcmpled %ymm0, %ymm1, %k1
30; CHECK-NEXT:    vpblendmd %ymm2, %ymm1, %ymm0 {%k1}
31; CHECK-NEXT:    retq
32  %mask = icmp sge <8 x i32> %x, %y
33  %max = select <8 x i1> %mask, <8 x i32> %x1, <8 x i32> %y
34  ret <8 x i32> %max
35}
36
37define <4 x i64> @test256_4(<4 x i64> %x, <4 x i64> %y, <4 x i64> %x1) nounwind {
38; CHECK-LABEL: test256_4:
39; CHECK:       ## BB#0:
40; CHECK-NEXT:    vpcmpnleuq %ymm1, %ymm0, %k1
41; CHECK-NEXT:    vpblendmq %ymm2, %ymm1, %ymm0 {%k1}
42; CHECK-NEXT:    retq
43  %mask = icmp ugt <4 x i64> %x, %y
44  %max = select <4 x i1> %mask, <4 x i64> %x1, <4 x i64> %y
45  ret <4 x i64> %max
46}
47
48define <8 x i32> @test256_5(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %yp) nounwind {
49; CHECK-LABEL: test256_5:
50; CHECK:       ## BB#0:
51; CHECK-NEXT:    vpcmpeqd (%rdi), %ymm0, %k1
52; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
53; CHECK-NEXT:    retq
54  %y = load <8 x i32>, <8 x i32>* %yp, align 4
55  %mask = icmp eq <8 x i32> %x, %y
56  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %x1
57  ret <8 x i32> %max
58}
59
60define <8 x i32> @test256_6(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
61; CHECK-LABEL: test256_6:
62; CHECK:       ## BB#0:
63; CHECK-NEXT:    vpcmpgtd (%rdi), %ymm0, %k1
64; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
65; CHECK-NEXT:    retq
66  %y = load <8 x i32>, <8 x i32>* %y.ptr, align 4
67  %mask = icmp sgt <8 x i32> %x, %y
68  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %x1
69  ret <8 x i32> %max
70}
71
72define <8 x i32> @test256_7(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
73; CHECK-LABEL: test256_7:
74; CHECK:       ## BB#0:
75; CHECK-NEXT:    vpcmpled (%rdi), %ymm0, %k1
76; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
77; CHECK-NEXT:    retq
78  %y = load <8 x i32>, <8 x i32>* %y.ptr, align 4
79  %mask = icmp sle <8 x i32> %x, %y
80  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %x1
81  ret <8 x i32> %max
82}
83
84define <8 x i32> @test256_8(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
85; CHECK-LABEL: test256_8:
86; CHECK:       ## BB#0:
87; CHECK-NEXT:    vpcmpleud (%rdi), %ymm0, %k1
88; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
89; CHECK-NEXT:    retq
90  %y = load <8 x i32>, <8 x i32>* %y.ptr, align 4
91  %mask = icmp ule <8 x i32> %x, %y
92  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %x1
93  ret <8 x i32> %max
94}
95
96define <8 x i32> @test256_9(<8 x i32> %x, <8 x i32> %y, <8 x i32> %x1, <8 x i32> %y1) nounwind {
97; CHECK-LABEL: test256_9:
98; CHECK:       ## BB#0:
99; CHECK-NEXT:    vpcmpeqd %ymm1, %ymm0, %k1
100; CHECK-NEXT:    vpcmpeqd %ymm3, %ymm2, %k1 {%k1}
101; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
102; CHECK-NEXT:    retq
103  %mask1 = icmp eq <8 x i32> %x1, %y1
104  %mask0 = icmp eq <8 x i32> %x, %y
105  %mask = select <8 x i1> %mask0, <8 x i1> %mask1, <8 x i1> zeroinitializer
106  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %y
107  ret <8 x i32> %max
108}
109
110define <4 x i64> @test256_10(<4 x i64> %x, <4 x i64> %y, <4 x i64> %x1, <4 x i64> %y1) nounwind {
111; CHECK-LABEL: test256_10:
112; CHECK:       ## BB#0:
113; CHECK-NEXT:    vpcmpleq %ymm1, %ymm0, %k1
114; CHECK-NEXT:    vpcmpleq %ymm2, %ymm3, %k1 {%k1}
115; CHECK-NEXT:    vpblendmq %ymm0, %ymm2, %ymm0 {%k1}
116; CHECK-NEXT:    retq
117  %mask1 = icmp sge <4 x i64> %x1, %y1
118  %mask0 = icmp sle <4 x i64> %x, %y
119  %mask = select <4 x i1> %mask0, <4 x i1> %mask1, <4 x i1> zeroinitializer
120  %max = select <4 x i1> %mask, <4 x i64> %x, <4 x i64> %x1
121  ret <4 x i64> %max
122}
123
124define <4 x i64> @test256_11(<4 x i64> %x, <4 x i64>* %y.ptr, <4 x i64> %x1, <4 x i64> %y1) nounwind {
125; CHECK-LABEL: test256_11:
126; CHECK:       ## BB#0:
127; CHECK-NEXT:    vpcmpgtq %ymm2, %ymm1, %k1
128; CHECK-NEXT:    vpcmpgtq (%rdi), %ymm0, %k1 {%k1}
129; CHECK-NEXT:    vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
130; CHECK-NEXT:    retq
131  %mask1 = icmp sgt <4 x i64> %x1, %y1
132  %y = load <4 x i64>, <4 x i64>* %y.ptr, align 4
133  %mask0 = icmp sgt <4 x i64> %x, %y
134  %mask = select <4 x i1> %mask0, <4 x i1> %mask1, <4 x i1> zeroinitializer
135  %max = select <4 x i1> %mask, <4 x i64> %x, <4 x i64> %x1
136  ret <4 x i64> %max
137}
138
139define <8 x i32> @test256_12(<8 x i32> %x, <8 x i32>* %y.ptr, <8 x i32> %x1, <8 x i32> %y1) nounwind {
140; CHECK-LABEL: test256_12:
141; CHECK:       ## BB#0:
142; CHECK-NEXT:    vpcmpled %ymm1, %ymm2, %k1
143; CHECK-NEXT:    vpcmpleud (%rdi), %ymm0, %k1 {%k1}
144; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
145; CHECK-NEXT:    retq
146  %mask1 = icmp sge <8 x i32> %x1, %y1
147  %y = load <8 x i32>, <8 x i32>* %y.ptr, align 4
148  %mask0 = icmp ule <8 x i32> %x, %y
149  %mask = select <8 x i1> %mask0, <8 x i1> %mask1, <8 x i1> zeroinitializer
150  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %x1
151  ret <8 x i32> %max
152}
153
154define <4 x i64> @test256_13(<4 x i64> %x, <4 x i64> %x1, i64* %yb.ptr) nounwind {
155; CHECK-LABEL: test256_13:
156; CHECK:       ## BB#0:
157; CHECK-NEXT:    vpcmpeqq (%rdi){1to4}, %ymm0, %k1
158; CHECK-NEXT:    vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
159; CHECK-NEXT:    retq
160  %yb = load i64, i64* %yb.ptr, align 4
161  %y.0 = insertelement <4 x i64> undef, i64 %yb, i32 0
162  %y = shufflevector <4 x i64> %y.0, <4 x i64> undef, <4 x i32> zeroinitializer
163  %mask = icmp eq <4 x i64> %x, %y
164  %max = select <4 x i1> %mask, <4 x i64> %x, <4 x i64> %x1
165  ret <4 x i64> %max
166}
167
168define <8 x i32> @test256_14(<8 x i32> %x, i32* %yb.ptr, <8 x i32> %x1) nounwind {
169; CHECK-LABEL: test256_14:
170; CHECK:       ## BB#0:
171; CHECK-NEXT:    vpcmpled (%rdi){1to8}, %ymm0, %k1
172; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
173; CHECK-NEXT:    retq
174  %yb = load i32, i32* %yb.ptr, align 4
175  %y.0 = insertelement <8 x i32> undef, i32 %yb, i32 0
176  %y = shufflevector <8 x i32> %y.0, <8 x i32> undef, <8 x i32> zeroinitializer
177  %mask = icmp sle <8 x i32> %x, %y
178  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %x1
179  ret <8 x i32> %max
180}
181
182define <8 x i32> @test256_15(<8 x i32> %x, i32* %yb.ptr, <8 x i32> %x1, <8 x i32> %y1) nounwind {
183; CHECK-LABEL: test256_15:
184; CHECK:       ## BB#0:
185; CHECK-NEXT:    vpcmpled %ymm1, %ymm2, %k1
186; CHECK-NEXT:    vpcmpgtd (%rdi){1to8}, %ymm0, %k1 {%k1}
187; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
188; CHECK-NEXT:    retq
189  %mask1 = icmp sge <8 x i32> %x1, %y1
190  %yb = load i32, i32* %yb.ptr, align 4
191  %y.0 = insertelement <8 x i32> undef, i32 %yb, i32 0
192  %y = shufflevector <8 x i32> %y.0, <8 x i32> undef, <8 x i32> zeroinitializer
193  %mask0 = icmp sgt <8 x i32> %x, %y
194  %mask = select <8 x i1> %mask0, <8 x i1> %mask1, <8 x i1> zeroinitializer
195  %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %x1
196  ret <8 x i32> %max
197}
198
199define <4 x i64> @test256_16(<4 x i64> %x, i64* %yb.ptr, <4 x i64> %x1, <4 x i64> %y1) nounwind {
200; CHECK-LABEL: test256_16:
201; CHECK:       ## BB#0:
202; CHECK-NEXT:    vpcmpleq %ymm1, %ymm2, %k1
203; CHECK-NEXT:    vpcmpgtq (%rdi){1to4}, %ymm0, %k1 {%k1}
204; CHECK-NEXT:    vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
205; CHECK-NEXT:    retq
206  %mask1 = icmp sge <4 x i64> %x1, %y1
207  %yb = load i64, i64* %yb.ptr, align 4
208  %y.0 = insertelement <4 x i64> undef, i64 %yb, i32 0
209  %y = shufflevector <4 x i64> %y.0, <4 x i64> undef, <4 x i32> zeroinitializer
210  %mask0 = icmp sgt <4 x i64> %x, %y
211  %mask = select <4 x i1> %mask0, <4 x i1> %mask1, <4 x i1> zeroinitializer
212  %max = select <4 x i1> %mask, <4 x i64> %x, <4 x i64> %x1
213  ret <4 x i64> %max
214}
215
216define <2 x i64> @test128_1(<2 x i64> %x, <2 x i64> %y) nounwind {
217; CHECK-LABEL: test128_1:
218; CHECK:       ## BB#0:
219; CHECK-NEXT:    vpcmpeqq %xmm1, %xmm0, %k1
220; CHECK-NEXT:    vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
221; CHECK-NEXT:    retq
222  %mask = icmp eq <2 x i64> %x, %y
223  %max = select <2 x i1> %mask, <2 x i64> %x, <2 x i64> %y
224  ret <2 x i64> %max
225}
226
227define <2 x i64> @test128_2(<2 x i64> %x, <2 x i64> %y, <2 x i64> %x1) nounwind {
228; CHECK-LABEL: test128_2:
229; CHECK:       ## BB#0:
230; CHECK-NEXT:    vpcmpgtq %xmm1, %xmm0, %k1
231; CHECK-NEXT:    vpblendmq %xmm2, %xmm1, %xmm0 {%k1}
232; CHECK-NEXT:    retq
233  %mask = icmp sgt <2 x i64> %x, %y
234  %max = select <2 x i1> %mask, <2 x i64> %x1, <2 x i64> %y
235  ret <2 x i64> %max
236}
237
238define <4 x i32> @test128_3(<4 x i32> %x, <4 x i32> %y, <4 x i32> %x1) nounwind {
239; CHECK-LABEL: test128_3:
240; CHECK:       ## BB#0:
241; CHECK-NEXT:    vpcmpled %xmm0, %xmm1, %k1
242; CHECK-NEXT:    vpblendmd %xmm2, %xmm1, %xmm0 {%k1}
243; CHECK-NEXT:    retq
244  %mask = icmp sge <4 x i32> %x, %y
245  %max = select <4 x i1> %mask, <4 x i32> %x1, <4 x i32> %y
246  ret <4 x i32> %max
247}
248
249define <2 x i64> @test128_4(<2 x i64> %x, <2 x i64> %y, <2 x i64> %x1) nounwind {
250; CHECK-LABEL: test128_4:
251; CHECK:       ## BB#0:
252; CHECK-NEXT:    vpcmpnleuq %xmm1, %xmm0, %k1
253; CHECK-NEXT:    vpblendmq %xmm2, %xmm1, %xmm0 {%k1}
254; CHECK-NEXT:    retq
255  %mask = icmp ugt <2 x i64> %x, %y
256  %max = select <2 x i1> %mask, <2 x i64> %x1, <2 x i64> %y
257  ret <2 x i64> %max
258}
259
260define <4 x i32> @test128_5(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %yp) nounwind {
261; CHECK-LABEL: test128_5:
262; CHECK:       ## BB#0:
263; CHECK-NEXT:    vpcmpeqd (%rdi), %xmm0, %k1
264; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
265; CHECK-NEXT:    retq
266  %y = load <4 x i32>, <4 x i32>* %yp, align 4
267  %mask = icmp eq <4 x i32> %x, %y
268  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %x1
269  ret <4 x i32> %max
270}
271
272define <4 x i32> @test128_6(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
273; CHECK-LABEL: test128_6:
274; CHECK:       ## BB#0:
275; CHECK-NEXT:    vpcmpgtd (%rdi), %xmm0, %k1
276; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
277; CHECK-NEXT:    retq
278  %y = load <4 x i32>, <4 x i32>* %y.ptr, align 4
279  %mask = icmp sgt <4 x i32> %x, %y
280  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %x1
281  ret <4 x i32> %max
282}
283
284define <4 x i32> @test128_7(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
285; CHECK-LABEL: test128_7:
286; CHECK:       ## BB#0:
287; CHECK-NEXT:    vpcmpled (%rdi), %xmm0, %k1
288; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
289; CHECK-NEXT:    retq
290  %y = load <4 x i32>, <4 x i32>* %y.ptr, align 4
291  %mask = icmp sle <4 x i32> %x, %y
292  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %x1
293  ret <4 x i32> %max
294}
295
296define <4 x i32> @test128_8(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
297; CHECK-LABEL: test128_8:
298; CHECK:       ## BB#0:
299; CHECK-NEXT:    vpcmpleud (%rdi), %xmm0, %k1
300; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
301; CHECK-NEXT:    retq
302  %y = load <4 x i32>, <4 x i32>* %y.ptr, align 4
303  %mask = icmp ule <4 x i32> %x, %y
304  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %x1
305  ret <4 x i32> %max
306}
307
308define <4 x i32> @test128_9(<4 x i32> %x, <4 x i32> %y, <4 x i32> %x1, <4 x i32> %y1) nounwind {
309; CHECK-LABEL: test128_9:
310; CHECK:       ## BB#0:
311; CHECK-NEXT:    vpcmpeqd %xmm1, %xmm0, %k1
312; CHECK-NEXT:    vpcmpeqd %xmm3, %xmm2, %k1 {%k1}
313; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
314; CHECK-NEXT:    retq
315  %mask1 = icmp eq <4 x i32> %x1, %y1
316  %mask0 = icmp eq <4 x i32> %x, %y
317  %mask = select <4 x i1> %mask0, <4 x i1> %mask1, <4 x i1> zeroinitializer
318  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %y
319  ret <4 x i32> %max
320}
321
322define <2 x i64> @test128_10(<2 x i64> %x, <2 x i64> %y, <2 x i64> %x1, <2 x i64> %y1) nounwind {
323; CHECK-LABEL: test128_10:
324; CHECK:       ## BB#0:
325; CHECK-NEXT:    vpcmpleq %xmm1, %xmm0, %k1
326; CHECK-NEXT:    vpcmpleq %xmm2, %xmm3, %k1 {%k1}
327; CHECK-NEXT:    vpblendmq %xmm0, %xmm2, %xmm0 {%k1}
328; CHECK-NEXT:    retq
329  %mask1 = icmp sge <2 x i64> %x1, %y1
330  %mask0 = icmp sle <2 x i64> %x, %y
331  %mask = select <2 x i1> %mask0, <2 x i1> %mask1, <2 x i1> zeroinitializer
332  %max = select <2 x i1> %mask, <2 x i64> %x, <2 x i64> %x1
333  ret <2 x i64> %max
334}
335
336define <2 x i64> @test128_11(<2 x i64> %x, <2 x i64>* %y.ptr, <2 x i64> %x1, <2 x i64> %y1) nounwind {
337; CHECK-LABEL: test128_11:
338; CHECK:       ## BB#0:
339; CHECK-NEXT:    vpcmpgtq %xmm2, %xmm1, %k1
340; CHECK-NEXT:    vpcmpgtq (%rdi), %xmm0, %k1 {%k1}
341; CHECK-NEXT:    vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
342; CHECK-NEXT:    retq
343  %mask1 = icmp sgt <2 x i64> %x1, %y1
344  %y = load <2 x i64>, <2 x i64>* %y.ptr, align 4
345  %mask0 = icmp sgt <2 x i64> %x, %y
346  %mask = select <2 x i1> %mask0, <2 x i1> %mask1, <2 x i1> zeroinitializer
347  %max = select <2 x i1> %mask, <2 x i64> %x, <2 x i64> %x1
348  ret <2 x i64> %max
349}
350
351define <4 x i32> @test128_12(<4 x i32> %x, <4 x i32>* %y.ptr, <4 x i32> %x1, <4 x i32> %y1) nounwind {
352; CHECK-LABEL: test128_12:
353; CHECK:       ## BB#0:
354; CHECK-NEXT:    vpcmpled %xmm1, %xmm2, %k1
355; CHECK-NEXT:    vpcmpleud (%rdi), %xmm0, %k1 {%k1}
356; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
357; CHECK-NEXT:    retq
358  %mask1 = icmp sge <4 x i32> %x1, %y1
359  %y = load <4 x i32>, <4 x i32>* %y.ptr, align 4
360  %mask0 = icmp ule <4 x i32> %x, %y
361  %mask = select <4 x i1> %mask0, <4 x i1> %mask1, <4 x i1> zeroinitializer
362  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %x1
363  ret <4 x i32> %max
364}
365
366define <2 x i64> @test128_13(<2 x i64> %x, <2 x i64> %x1, i64* %yb.ptr) nounwind {
367; CHECK-LABEL: test128_13:
368; CHECK:       ## BB#0:
369; CHECK-NEXT:    vpcmpeqq (%rdi){1to2}, %xmm0, %k1
370; CHECK-NEXT:    vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
371; CHECK-NEXT:    retq
372  %yb = load i64, i64* %yb.ptr, align 4
373  %y.0 = insertelement <2 x i64> undef, i64 %yb, i32 0
374  %y = insertelement <2 x i64> %y.0, i64 %yb, i32 1
375  %mask = icmp eq <2 x i64> %x, %y
376  %max = select <2 x i1> %mask, <2 x i64> %x, <2 x i64> %x1
377  ret <2 x i64> %max
378}
379
380define <4 x i32> @test128_14(<4 x i32> %x, i32* %yb.ptr, <4 x i32> %x1) nounwind {
381; CHECK-LABEL: test128_14:
382; CHECK:       ## BB#0:
383; CHECK-NEXT:    vpcmpled (%rdi){1to4}, %xmm0, %k1
384; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
385; CHECK-NEXT:    retq
386  %yb = load i32, i32* %yb.ptr, align 4
387  %y.0 = insertelement <4 x i32> undef, i32 %yb, i32 0
388  %y = shufflevector <4 x i32> %y.0, <4 x i32> undef, <4 x i32> zeroinitializer
389  %mask = icmp sle <4 x i32> %x, %y
390  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %x1
391  ret <4 x i32> %max
392}
393
394define <4 x i32> @test128_15(<4 x i32> %x, i32* %yb.ptr, <4 x i32> %x1, <4 x i32> %y1) nounwind {
395; CHECK-LABEL: test128_15:
396; CHECK:       ## BB#0:
397; CHECK-NEXT:    vpcmpled %xmm1, %xmm2, %k1
398; CHECK-NEXT:    vpcmpgtd (%rdi){1to4}, %xmm0, %k1 {%k1}
399; CHECK-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
400; CHECK-NEXT:    retq
401  %mask1 = icmp sge <4 x i32> %x1, %y1
402  %yb = load i32, i32* %yb.ptr, align 4
403  %y.0 = insertelement <4 x i32> undef, i32 %yb, i32 0
404  %y = shufflevector <4 x i32> %y.0, <4 x i32> undef, <4 x i32> zeroinitializer
405  %mask0 = icmp sgt <4 x i32> %x, %y
406  %mask = select <4 x i1> %mask0, <4 x i1> %mask1, <4 x i1> zeroinitializer
407  %max = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %x1
408  ret <4 x i32> %max
409}
410
411define <2 x i64> @test128_16(<2 x i64> %x, i64* %yb.ptr, <2 x i64> %x1, <2 x i64> %y1) nounwind {
412; CHECK-LABEL: test128_16:
413; CHECK:       ## BB#0:
414; CHECK-NEXT:    vpcmpleq %xmm1, %xmm2, %k1
415; CHECK-NEXT:    vpcmpgtq (%rdi){1to2}, %xmm0, %k1 {%k1}
416; CHECK-NEXT:    vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
417; CHECK-NEXT:    retq
418  %mask1 = icmp sge <2 x i64> %x1, %y1
419  %yb = load i64, i64* %yb.ptr, align 4
420  %y.0 = insertelement <2 x i64> undef, i64 %yb, i32 0
421  %y = insertelement <2 x i64> %y.0, i64 %yb, i32 1
422  %mask0 = icmp sgt <2 x i64> %x, %y
423  %mask = select <2 x i1> %mask0, <2 x i1> %mask1, <2 x i1> zeroinitializer
424  %max = select <2 x i1> %mask, <2 x i64> %x, <2 x i64> %x1
425  ret <2 x i64> %max
426}
427