1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4; PR1822 5 6target datalayout = "e-p:64:64-p1:16:16-p2:32:32:32-p3:64:64:64" 7 8define i32 @test1(i32 %A, i32 %B) { 9 %C = select i1 false, i32 %A, i32 %B 10 ret i32 %C 11; CHECK-LABEL: @test1( 12; CHECK: ret i32 %B 13} 14 15define i32 @test2(i32 %A, i32 %B) { 16 %C = select i1 true, i32 %A, i32 %B 17 ret i32 %C 18; CHECK-LABEL: @test2( 19; CHECK: ret i32 %A 20} 21 22 23define i32 @test3(i1 %C, i32 %I) { 24 ; V = I 25 %V = select i1 %C, i32 %I, i32 %I 26 ret i32 %V 27; CHECK-LABEL: @test3( 28; CHECK: ret i32 %I 29} 30 31define i1 @test4(i1 %C) { 32 ; V = C 33 %V = select i1 %C, i1 true, i1 false 34 ret i1 %V 35; CHECK-LABEL: @test4( 36; CHECK: ret i1 %C 37} 38 39define i1 @test5(i1 %C) { 40 ; V = !C 41 %V = select i1 %C, i1 false, i1 true 42 ret i1 %V 43; CHECK-LABEL: @test5( 44; CHECK: xor i1 %C, true 45; CHECK: ret i1 46} 47 48define i32 @test6(i1 %C) { 49 ; V = cast C to int 50 %V = select i1 %C, i32 1, i32 0 51 ret i32 %V 52; CHECK-LABEL: @test6( 53; CHECK: %V = zext i1 %C to i32 54; CHECK: ret i32 %V 55} 56 57define i1 @test7(i1 %C, i1 %X) { 58; CHECK-LABEL: @test7( 59; CHECK-NEXT: [[R:%.*]] = or i1 %C, %X 60; CHECK-NEXT: ret i1 [[R]] 61; 62 %R = select i1 %C, i1 true, i1 %X 63 ret i1 %R 64} 65 66define <2 x i1> @test7vec(<2 x i1> %C, <2 x i1> %X) { 67; CHECK-LABEL: @test7vec( 68; CHECK-NEXT: [[R:%.*]] = or <2 x i1> %C, %X 69; CHECK-NEXT: ret <2 x i1> [[R]] 70; 71 %R = select <2 x i1> %C, <2 x i1> <i1 true, i1 true>, <2 x i1> %X 72 ret <2 x i1> %R 73} 74 75define i1 @test8(i1 %C, i1 %X) { 76; CHECK-LABEL: @test8( 77; CHECK-NEXT: [[R:%.*]] = and i1 %C, %X 78; CHECK-NEXT: ret i1 [[R]] 79; 80 %R = select i1 %C, i1 %X, i1 false 81 ret i1 %R 82} 83 84define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) { 85; CHECK-LABEL: @test8vec( 86; CHECK-NEXT: [[R:%.*]] = and <2 x i1> %C, %X 87; CHECK-NEXT: ret <2 x i1> [[R]] 88; 89 %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 false, i1 false> 90 ret <2 x i1> %R 91} 92 93define i1 @test9(i1 %C, i1 %X) { 94; CHECK-LABEL: @test9( 95; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 %C, true 96; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_C]], %X 97; CHECK-NEXT: ret i1 [[R]] 98; 99 %R = select i1 %C, i1 false, i1 %X 100 ret i1 %R 101} 102 103define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) { 104; CHECK-LABEL: @test9vec( 105; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> %C, <i1 true, i1 true> 106; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[NOT_C]], %X 107; CHECK-NEXT: ret <2 x i1> [[R]] 108; 109 %R = select <2 x i1> %C, <2 x i1> <i1 false, i1 false>, <2 x i1> %X 110 ret <2 x i1> %R 111} 112 113define i1 @test10(i1 %C, i1 %X) { 114; CHECK-LABEL: @test10( 115; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 %C, true 116; CHECK-NEXT: [[R:%.*]] = or i1 [[NOT_C]], %X 117; CHECK-NEXT: ret i1 [[R]] 118; 119 %R = select i1 %C, i1 %X, i1 true 120 ret i1 %R 121} 122 123define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) { 124; CHECK-LABEL: @test10vec( 125; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> %C, <i1 true, i1 true> 126; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[NOT_C]], %X 127; CHECK-NEXT: ret <2 x i1> [[R]] 128; 129 %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 true, i1 true> 130 ret <2 x i1> %R 131} 132 133define i1 @test23(i1 %a, i1 %b) { 134; CHECK-LABEL: @test23( 135; CHECK-NEXT: [[C:%.*]] = and i1 %a, %b 136; CHECK-NEXT: ret i1 [[C]] 137; 138 %c = select i1 %a, i1 %b, i1 %a 139 ret i1 %c 140} 141 142define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) { 143; CHECK-LABEL: @test23vec( 144; CHECK-NEXT: [[C:%.*]] = and <2 x i1> %a, %b 145; CHECK-NEXT: ret <2 x i1> [[C]] 146; 147 %c = select <2 x i1> %a, <2 x i1> %b, <2 x i1> %a 148 ret <2 x i1> %c 149} 150 151define i1 @test24(i1 %a, i1 %b) { 152; CHECK-LABEL: @test24( 153; CHECK-NEXT: [[C:%.*]] = or i1 %a, %b 154; CHECK-NEXT: ret i1 [[C]] 155; 156 %c = select i1 %a, i1 %a, i1 %b 157 ret i1 %c 158} 159 160define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) { 161; CHECK-LABEL: @test24vec( 162; CHECK-NEXT: [[C:%.*]] = or <2 x i1> %a, %b 163; CHECK-NEXT: ret <2 x i1> [[C]] 164; 165 %c = select <2 x i1> %a, <2 x i1> %a, <2 x i1> %b 166 ret <2 x i1> %c 167} 168 169define i1 @test62(i1 %A, i1 %B) { 170; CHECK-LABEL: @test62( 171; CHECK-NEXT: [[NOT:%.*]] = xor i1 %A, true 172; CHECK-NEXT: [[C:%.*]] = and i1 [[NOT]], %B 173; CHECK-NEXT: ret i1 [[C]] 174; 175 %not = xor i1 %A, true 176 %C = select i1 %A, i1 %not, i1 %B 177 ret i1 %C 178} 179 180define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) { 181; CHECK-LABEL: @test62vec( 182; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> %A, <i1 true, i1 true> 183; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[NOT]], %B 184; CHECK-NEXT: ret <2 x i1> [[C]] 185; 186 %not = xor <2 x i1> %A, <i1 true, i1 true> 187 %C = select <2 x i1> %A, <2 x i1> %not, <2 x i1> %B 188 ret <2 x i1> %C 189} 190 191define i1 @test63(i1 %A, i1 %B) { 192; CHECK-LABEL: @test63( 193; CHECK-NEXT: [[NOT:%.*]] = xor i1 %A, true 194; CHECK-NEXT: [[C:%.*]] = or i1 %B, [[NOT]] 195; CHECK-NEXT: ret i1 [[C]] 196; 197 %not = xor i1 %A, true 198 %C = select i1 %A, i1 %B, i1 %not 199 ret i1 %C 200} 201 202define <2 x i1> @test63vec(<2 x i1> %A, <2 x i1> %B) { 203; CHECK-LABEL: @test63vec( 204; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> %A, <i1 true, i1 true> 205; CHECK-NEXT: [[C:%.*]] = or <2 x i1> %B, [[NOT]] 206; CHECK-NEXT: ret <2 x i1> [[C]] 207; 208 %not = xor <2 x i1> %A, <i1 true, i1 true> 209 %C = select <2 x i1> %A, <2 x i1> %B, <2 x i1> %not 210 ret <2 x i1> %C 211} 212 213define i32 @test11(i32 %a) { 214 %C = icmp eq i32 %a, 0 215 %R = select i1 %C, i32 0, i32 1 216 ret i32 %R 217; CHECK-LABEL: @test11( 218; CHECK: icmp ne i32 %a, 0 219; CHECK: %R = zext i1 220; CHECK: ret i32 %R 221} 222 223define i32 @test12(i1 %cond, i32 %a) { 224 %b = or i32 %a, 1 225 %c = select i1 %cond, i32 %b, i32 %a 226 ret i32 %c 227; CHECK-LABEL: @test12( 228; CHECK: %b = zext i1 %cond to i32 229; CHECK: %c = or i32 %b, %a 230; CHECK: ret i32 %c 231} 232 233define i32 @test12a(i1 %cond, i32 %a) { 234 %b = ashr i32 %a, 1 235 %c = select i1 %cond, i32 %b, i32 %a 236 ret i32 %c 237; CHECK-LABEL: @test12a( 238; CHECK: %b = zext i1 %cond to i32 239; CHECK: %c = ashr i32 %a, %b 240; CHECK: ret i32 %c 241} 242 243define i32 @test12b(i1 %cond, i32 %a) { 244 %b = ashr i32 %a, 1 245 %c = select i1 %cond, i32 %a, i32 %b 246 ret i32 %c 247; CHECK-LABEL: @test12b( 248; CHECK: zext i1 %cond to i32 249; CHECK: %b = xor i32 250; CHECK: %c = ashr i32 %a, %b 251; CHECK: ret i32 %c 252} 253 254define i32 @test13(i32 %a, i32 %b) { 255 %C = icmp eq i32 %a, %b 256 %V = select i1 %C, i32 %a, i32 %b 257 ret i32 %V 258; CHECK-LABEL: @test13( 259; CHECK: ret i32 %b 260} 261 262define i32 @test13a(i32 %a, i32 %b) { 263 %C = icmp ne i32 %a, %b 264 %V = select i1 %C, i32 %a, i32 %b 265 ret i32 %V 266; CHECK-LABEL: @test13a( 267; CHECK: ret i32 %a 268} 269 270define i32 @test13b(i32 %a, i32 %b) { 271 %C = icmp eq i32 %a, %b 272 %V = select i1 %C, i32 %b, i32 %a 273 ret i32 %V 274; CHECK-LABEL: @test13b( 275; CHECK: ret i32 %a 276} 277 278define i1 @test14a(i1 %C, i32 %X) { 279 %V = select i1 %C, i32 %X, i32 0 280 ; (X < 1) | !C 281 %R = icmp slt i32 %V, 1 282 ret i1 %R 283; CHECK-LABEL: @test14a( 284; CHECK: icmp slt i32 %X, 1 285; CHECK: xor i1 %C, true 286; CHECK: or i1 287; CHECK: ret i1 %R 288} 289 290define i1 @test14b(i1 %C, i32 %X) { 291 %V = select i1 %C, i32 0, i32 %X 292 ; (X < 1) | C 293 %R = icmp slt i32 %V, 1 294 ret i1 %R 295; CHECK-LABEL: @test14b( 296; CHECK: icmp slt i32 %X, 1 297; CHECK: or i1 298; CHECK: ret i1 %R 299} 300 301;; Code sequence for (X & 16) ? 16 : 0 302define i32 @test15a(i32 %X) { 303 %t1 = and i32 %X, 16 304 %t2 = icmp eq i32 %t1, 0 305 %t3 = select i1 %t2, i32 0, i32 16 306 ret i32 %t3 307; CHECK-LABEL: @test15a( 308; CHECK: %t1 = and i32 %X, 16 309; CHECK: ret i32 %t1 310} 311 312;; Code sequence for (X & 32) ? 0 : 24 313define i32 @test15b(i32 %X) { 314 %t1 = and i32 %X, 32 315 %t2 = icmp eq i32 %t1, 0 316 %t3 = select i1 %t2, i32 32, i32 0 317 ret i32 %t3 318; CHECK-LABEL: @test15b( 319; CHECK: %t1 = and i32 %X, 32 320; CHECK: xor i32 %t1, 32 321; CHECK: ret i32 322} 323 324;; Alternate code sequence for (X & 16) ? 16 : 0 325define i32 @test15c(i32 %X) { 326 %t1 = and i32 %X, 16 327 %t2 = icmp eq i32 %t1, 16 328 %t3 = select i1 %t2, i32 16, i32 0 329 ret i32 %t3 330; CHECK-LABEL: @test15c( 331; CHECK: %t1 = and i32 %X, 16 332; CHECK: ret i32 %t1 333} 334 335;; Alternate code sequence for (X & 16) ? 16 : 0 336define i32 @test15d(i32 %X) { 337 %t1 = and i32 %X, 16 338 %t2 = icmp ne i32 %t1, 0 339 %t3 = select i1 %t2, i32 16, i32 0 340 ret i32 %t3 341; CHECK-LABEL: @test15d( 342; CHECK: %t1 = and i32 %X, 16 343; CHECK: ret i32 %t1 344} 345 346;; (a & 128) ? 256 : 0 347define i32 @test15e(i32 %X) { 348 %t1 = and i32 %X, 128 349 %t2 = icmp ne i32 %t1, 0 350 %t3 = select i1 %t2, i32 256, i32 0 351 ret i32 %t3 352; CHECK-LABEL: @test15e( 353; CHECK: %t1 = shl i32 %X, 1 354; CHECK: and i32 %t1, 256 355; CHECK: ret i32 356} 357 358;; (a & 128) ? 0 : 256 359define i32 @test15f(i32 %X) { 360 %t1 = and i32 %X, 128 361 %t2 = icmp ne i32 %t1, 0 362 %t3 = select i1 %t2, i32 0, i32 256 363 ret i32 %t3 364; CHECK-LABEL: @test15f( 365; CHECK: %t1 = shl i32 %X, 1 366; CHECK: and i32 %t1, 256 367; CHECK: xor i32 %{{.*}}, 256 368; CHECK: ret i32 369} 370 371;; (a & 8) ? -1 : -9 372define i32 @test15g(i32 %X) { 373 %t1 = and i32 %X, 8 374 %t2 = icmp ne i32 %t1, 0 375 %t3 = select i1 %t2, i32 -1, i32 -9 376 ret i32 %t3 377; CHECK-LABEL: @test15g( 378; CHECK-NEXT: %1 = or i32 %X, -9 379; CHECK-NEXT: ret i32 %1 380} 381 382;; (a & 8) ? -9 : -1 383define i32 @test15h(i32 %X) { 384 %t1 = and i32 %X, 8 385 %t2 = icmp ne i32 %t1, 0 386 %t3 = select i1 %t2, i32 -9, i32 -1 387 ret i32 %t3 388; CHECK-LABEL: @test15h( 389; CHECK-NEXT: %1 = or i32 %X, -9 390; CHECK-NEXT: %2 = xor i32 %1, 8 391; CHECK-NEXT: ret i32 %2 392} 393 394;; (a & 2) ? 577 : 1089 395define i32 @test15i(i32 %X) { 396 %t1 = and i32 %X, 2 397 %t2 = icmp ne i32 %t1, 0 398 %t3 = select i1 %t2, i32 577, i32 1089 399 ret i32 %t3 400; CHECK-LABEL: @test15i( 401; CHECK-NEXT: %t1 = shl i32 %X, 8 402; CHECK-NEXT: %1 = and i32 %t1, 512 403; CHECK-NEXT: %2 = xor i32 %1, 512 404; CHECK-NEXT: %3 = add nuw nsw i32 %2, 577 405; CHECK-NEXT: ret i32 %3 406} 407 408;; (a & 2) ? 1089 : 577 409define i32 @test15j(i32 %X) { 410 %t1 = and i32 %X, 2 411 %t2 = icmp ne i32 %t1, 0 412 %t3 = select i1 %t2, i32 1089, i32 577 413 ret i32 %t3 414; CHECK-LABEL: @test15j( 415; CHECK-NEXT: %t1 = shl i32 %X, 8 416; CHECK-NEXT: %1 = and i32 %t1, 512 417; CHECK-NEXT: %2 = add nuw nsw i32 %1, 577 418; CHECK-NEXT: ret i32 %2 419} 420 421define i32 @test16(i1 %C, i32* %P) { 422 %P2 = select i1 %C, i32* %P, i32* null 423 %V = load i32, i32* %P2 424 ret i32 %V 425; CHECK-LABEL: @test16( 426; CHECK-NEXT: %V = load i32, i32* %P 427; CHECK: ret i32 %V 428} 429 430;; It may be legal to load from a null address in a non-zero address space 431define i32 @test16_neg(i1 %C, i32 addrspace(1)* %P) { 432 %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null 433 %V = load i32, i32 addrspace(1)* %P2 434 ret i32 %V 435; CHECK-LABEL: @test16_neg 436; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null 437; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2 438; CHECK: ret i32 %V 439} 440define i32 @test16_neg2(i1 %C, i32 addrspace(1)* %P) { 441 %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P 442 %V = load i32, i32 addrspace(1)* %P2 443 ret i32 %V 444; CHECK-LABEL: @test16_neg2 445; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P 446; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2 447; CHECK: ret i32 %V 448} 449 450define i1 @test17(i32* %X, i1 %C) { 451 %R = select i1 %C, i32* %X, i32* null 452 %RV = icmp eq i32* %R, null 453 ret i1 %RV 454; CHECK-LABEL: @test17( 455; CHECK: icmp eq i32* %X, null 456; CHECK: xor i1 %C, true 457; CHECK: %RV = or i1 458; CHECK: ret i1 %RV 459} 460 461define i32 @test18(i32 %X, i32 %Y, i1 %C) { 462 %R = select i1 %C, i32 %X, i32 0 463 %V = sdiv i32 %Y, %R 464 ret i32 %V 465; CHECK-LABEL: @test18( 466; CHECK: %V = sdiv i32 %Y, %X 467; CHECK: ret i32 %V 468} 469 470define i32 @test19(i32 %x) { 471 %tmp = icmp ugt i32 %x, 2147483647 472 %retval = select i1 %tmp, i32 -1, i32 0 473 ret i32 %retval 474; CHECK-LABEL: @test19( 475; CHECK-NEXT: ashr i32 %x, 31 476; CHECK-NEXT: ret i32 477} 478 479define i32 @test20(i32 %x) { 480 %tmp = icmp slt i32 %x, 0 481 %retval = select i1 %tmp, i32 -1, i32 0 482 ret i32 %retval 483; CHECK-LABEL: @test20( 484; CHECK-NEXT: ashr i32 %x, 31 485; CHECK-NEXT: ret i32 486} 487 488define i64 @test21(i32 %x) { 489 %tmp = icmp slt i32 %x, 0 490 %retval = select i1 %tmp, i64 -1, i64 0 491 ret i64 %retval 492; CHECK-LABEL: @test21( 493; CHECK-NEXT: ashr i32 %x, 31 494; CHECK-NEXT: sext i32 495; CHECK-NEXT: ret i64 496} 497 498define i16 @test22(i32 %x) { 499 %tmp = icmp slt i32 %x, 0 500 %retval = select i1 %tmp, i16 -1, i16 0 501 ret i16 %retval 502; CHECK-LABEL: @test22( 503; CHECK-NEXT: ashr i32 %x, 31 504; CHECK-NEXT: trunc i32 505; CHECK-NEXT: ret i16 506} 507 508define i32 @test25(i1 %c) { 509entry: 510 br i1 %c, label %jump, label %ret 511jump: 512 br label %ret 513ret: 514 %a = phi i1 [true, %jump], [false, %entry] 515 %b = select i1 %a, i32 10, i32 20 516 ret i32 %b 517; CHECK-LABEL: @test25( 518; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ] 519; CHECK-NEXT: ret i32 %a 520} 521 522define i32 @test26(i1 %cond) { 523entry: 524 br i1 %cond, label %jump, label %ret 525jump: 526 %c = or i1 false, false 527 br label %ret 528ret: 529 %a = phi i1 [true, %entry], [%c, %jump] 530 %b = select i1 %a, i32 20, i32 10 531 ret i32 %b 532; CHECK-LABEL: @test26( 533; CHECK: %a = phi i32 [ 20, %entry ], [ 10, %jump ] 534; CHECK-NEXT: ret i32 %a 535} 536 537define i32 @test27(i1 %c, i32 %A, i32 %B) { 538entry: 539 br i1 %c, label %jump, label %ret 540jump: 541 br label %ret 542ret: 543 %a = phi i1 [true, %jump], [false, %entry] 544 %b = select i1 %a, i32 %A, i32 %B 545 ret i32 %b 546; CHECK-LABEL: @test27( 547; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 548; CHECK-NEXT: ret i32 %a 549} 550 551define i32 @test28(i1 %cond, i32 %A, i32 %B) { 552entry: 553 br i1 %cond, label %jump, label %ret 554jump: 555 br label %ret 556ret: 557 %c = phi i32 [%A, %jump], [%B, %entry] 558 %a = phi i1 [true, %jump], [false, %entry] 559 %b = select i1 %a, i32 %A, i32 %c 560 ret i32 %b 561; CHECK-LABEL: @test28( 562; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 563; CHECK-NEXT: ret i32 %a 564} 565 566define i32 @test29(i1 %cond, i32 %A, i32 %B) { 567entry: 568 br i1 %cond, label %jump, label %ret 569jump: 570 br label %ret 571ret: 572 %c = phi i32 [%A, %jump], [%B, %entry] 573 %a = phi i1 [true, %jump], [false, %entry] 574 br label %next 575 576next: 577 %b = select i1 %a, i32 %A, i32 %c 578 ret i32 %b 579; CHECK-LABEL: @test29( 580; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 581; CHECK: ret i32 %a 582} 583 584 585; SMAX(SMAX(x, y), x) -> SMAX(x, y) 586define i32 @test30(i32 %x, i32 %y) { 587 %cmp = icmp sgt i32 %x, %y 588 %cond = select i1 %cmp, i32 %x, i32 %y 589 590 %cmp5 = icmp sgt i32 %cond, %x 591 %retval = select i1 %cmp5, i32 %cond, i32 %x 592 ret i32 %retval 593; CHECK-LABEL: @test30( 594; CHECK: ret i32 %cond 595} 596 597; UMAX(UMAX(x, y), x) -> UMAX(x, y) 598define i32 @test31(i32 %x, i32 %y) { 599 %cmp = icmp ugt i32 %x, %y 600 %cond = select i1 %cmp, i32 %x, i32 %y 601 %cmp5 = icmp ugt i32 %cond, %x 602 %retval = select i1 %cmp5, i32 %cond, i32 %x 603 ret i32 %retval 604; CHECK-LABEL: @test31( 605; CHECK: ret i32 %cond 606} 607 608; SMIN(SMIN(x, y), x) -> SMIN(x, y) 609define i32 @test32(i32 %x, i32 %y) { 610 %cmp = icmp sgt i32 %x, %y 611 %cond = select i1 %cmp, i32 %y, i32 %x 612 %cmp5 = icmp sgt i32 %cond, %x 613 %retval = select i1 %cmp5, i32 %x, i32 %cond 614 ret i32 %retval 615; CHECK-LABEL: @test32( 616; CHECK: ret i32 %cond 617} 618 619; MAX(MIN(x, y), x) -> x 620define i32 @test33(i32 %x, i32 %y) { 621 %cmp = icmp sgt i32 %x, %y 622 %cond = select i1 %cmp, i32 %y, i32 %x 623 %cmp5 = icmp sgt i32 %cond, %x 624 %retval = select i1 %cmp5, i32 %cond, i32 %x 625 ret i32 %retval 626; CHECK-LABEL: @test33( 627; CHECK: ret i32 %x 628} 629 630; MIN(MAX(x, y), x) -> x 631define i32 @test34(i32 %x, i32 %y) { 632 %cmp = icmp sgt i32 %x, %y 633 %cond = select i1 %cmp, i32 %x, i32 %y 634 %cmp5 = icmp sgt i32 %cond, %x 635 %retval = select i1 %cmp5, i32 %x, i32 %cond 636 ret i32 %retval 637; CHECK-LABEL: @test34( 638; CHECK: ret i32 %x 639} 640 641define i32 @test35(i32 %x) { 642 %cmp = icmp sge i32 %x, 0 643 %cond = select i1 %cmp, i32 60, i32 100 644 ret i32 %cond 645; CHECK-LABEL: @test35( 646; CHECK: ashr i32 %x, 31 647; CHECK: and i32 {{.*}}, 40 648; CHECK: add nuw nsw i32 {{.*}}, 60 649; CHECK: ret 650} 651 652define i32 @test36(i32 %x) { 653 %cmp = icmp slt i32 %x, 0 654 %cond = select i1 %cmp, i32 60, i32 100 655 ret i32 %cond 656; CHECK-LABEL: @test36( 657; CHECK: ashr i32 %x, 31 658; CHECK: and i32 {{.*}}, -40 659; CHECK: add nsw i32 {{.*}}, 100 660; CHECK: ret 661} 662 663define i32 @test37(i32 %x) { 664 %cmp = icmp sgt i32 %x, -1 665 %cond = select i1 %cmp, i32 1, i32 -1 666 ret i32 %cond 667; CHECK-LABEL: @test37( 668; CHECK: ashr i32 %x, 31 669; CHECK: or i32 {{.*}}, 1 670; CHECK: ret 671} 672 673define i1 @test38(i1 %cond) { 674 %zero = alloca i32 675 %one = alloca i32 676 %ptr = select i1 %cond, i32* %zero, i32* %one 677 %isnull = icmp eq i32* %ptr, null 678 ret i1 %isnull 679; CHECK-LABEL: @test38( 680; CHECK: ret i1 false 681} 682 683define i1 @test39(i1 %cond, double %x) { 684 %s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty 685 %cmp = fcmp ule double %x, %s 686 ret i1 %cmp 687; CHECK-LABEL: @test39( 688; CHECK: ret i1 true 689} 690 691define i1 @test40(i1 %cond) { 692 %a = alloca i32 693 %b = alloca i32 694 %c = alloca i32 695 %s = select i1 %cond, i32* %a, i32* %b 696 %r = icmp eq i32* %s, %c 697 ret i1 %r 698; CHECK-LABEL: @test40( 699; CHECK: ret i1 false 700} 701 702define i32 @test41(i1 %cond, i32 %x, i32 %y) { 703 %z = and i32 %x, %y 704 %s = select i1 %cond, i32 %y, i32 %z 705 %r = and i32 %x, %s 706 ret i32 %r 707; CHECK-LABEL: @test41( 708; CHECK-NEXT: and i32 %x, %y 709; CHECK-NEXT: ret i32 710} 711 712define i32 @test42(i32 %x, i32 %y) { 713 %b = add i32 %y, -1 714 %cond = icmp eq i32 %x, 0 715 %c = select i1 %cond, i32 %b, i32 %y 716 ret i32 %c 717; CHECK-LABEL: @test42( 718; CHECK-NEXT: %cond = icmp eq i32 %x, 0 719; CHECK-NEXT: %b = sext i1 %cond to i32 720; CHECK-NEXT: %c = add i32 %b, %y 721; CHECK-NEXT: ret i32 %c 722} 723 724define i64 @test43(i32 %a) nounwind { 725 %a_ext = sext i32 %a to i64 726 %is_a_nonnegative = icmp sgt i32 %a, -1 727 %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0 728 ret i64 %max 729; CHECK-LABEL: @test43( 730; CHECK-NEXT: %a_ext = sext i32 %a to i64 731; CHECK-NEXT: %is_a_nonnegative = icmp slt i64 %a_ext, 0 732; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 0, i64 %a_ext 733; CHECK-NEXT: ret i64 %max 734} 735 736define i64 @test44(i32 %a) nounwind { 737 %a_ext = sext i32 %a to i64 738 %is_a_nonpositive = icmp slt i32 %a, 1 739 %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 0 740 ret i64 %min 741; CHECK-LABEL: @test44( 742; CHECK-NEXT: %a_ext = sext i32 %a to i64 743; CHECK-NEXT: %is_a_nonpositive = icmp sgt i64 %a_ext, 0 744; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 0, i64 %a_ext 745; CHECK-NEXT: ret i64 %min 746} 747define i64 @test45(i32 %a) nounwind { 748 %a_ext = zext i32 %a to i64 749 %is_a_nonnegative = icmp ugt i32 %a, 2 750 %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 751 ret i64 %max 752; CHECK-LABEL: @test45( 753; CHECK-NEXT: %a_ext = zext i32 %a to i64 754; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 755; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext 756; CHECK-NEXT: ret i64 %max 757} 758 759define i64 @test46(i32 %a) nounwind { 760 %a_ext = zext i32 %a to i64 761 %is_a_nonpositive = icmp ult i32 %a, 3 762 %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 763 ret i64 %min 764; CHECK-LABEL: @test46( 765; CHECK-NEXT: %a_ext = zext i32 %a to i64 766; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 767; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 768; CHECK-NEXT: ret i64 %min 769} 770define i64 @test47(i32 %a) nounwind { 771 %a_ext = sext i32 %a to i64 772 %is_a_nonnegative = icmp ugt i32 %a, 2 773 %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 774 ret i64 %max 775; CHECK-LABEL: @test47( 776; CHECK-NEXT: %a_ext = sext i32 %a to i64 777; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 778; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext 779; CHECK-NEXT: ret i64 %max 780} 781 782define i64 @test48(i32 %a) nounwind { 783 %a_ext = sext i32 %a to i64 784 %is_a_nonpositive = icmp ult i32 %a, 3 785 %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 786 ret i64 %min 787; CHECK-LABEL: @test48( 788; CHECK-NEXT: %a_ext = sext i32 %a to i64 789; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 790; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 791; CHECK-NEXT: ret i64 %min 792} 793 794define i64 @test49(i32 %a) nounwind { 795 %a_ext = sext i32 %a to i64 796 %is_a_nonpositive = icmp ult i32 %a, 3 797 %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 798 ret i64 %min 799; CHECK-LABEL: @test49( 800; CHECK-NEXT: %a_ext = sext i32 %a to i64 801; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 802; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 803; CHECK-NEXT: ret i64 %min 804} 805define i64 @test50(i32 %a) nounwind { 806 %is_a_nonpositive = icmp ult i32 %a, 3 807 %a_ext = sext i32 %a to i64 808 %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 809 ret i64 %min 810; CHECK-LABEL: @test50( 811; CHECK-NEXT: %a_ext = sext i32 %a to i64 812; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 813; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 814; CHECK-NEXT: ret i64 %min 815} 816 817; PR8994 818 819; This select instruction can't be eliminated because trying to do so would 820; change the number of vector elements. This used to assert. 821define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) { 822; CHECK-LABEL: @test51( 823 %select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp 824; CHECK: select <3 x i1> 825 %tmp2 = bitcast <3 x i16> %select to i48 826 ret i48 %tmp2 827} 828 829; Allow select promotion even if there are multiple uses of bitcasted ops. 830; Hoisting the selects allows later pattern matching to see that these are min/max ops. 831 832define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) { 833; CHECK-LABEL: @min_max_bitcast( 834; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %a, %b 835; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %a, <4 x float> %b 836; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %b, <4 x float> %a 837; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* %ptr1 to <4 x float>* 838; CHECK-NEXT: store <4 x float> [[SEL1_V]], <4 x float>* [[TMP1]], align 16 839; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* %ptr2 to <4 x float>* 840; CHECK-NEXT: store <4 x float> [[SEL2_V]], <4 x float>* [[TMP2]], align 16 841; CHECK-NEXT: ret void 842; 843 %cmp = fcmp olt <4 x float> %a, %b 844 %bc1 = bitcast <4 x float> %a to <4 x i32> 845 %bc2 = bitcast <4 x float> %b to <4 x i32> 846 %sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2 847 %sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1 848 store <4 x i32> %sel1, <4 x i32>* %ptr1 849 store <4 x i32> %sel2, <4 x i32>* %ptr2 850 ret void 851} 852 853; To avoid potential backend problems, we don't do the same transform for other casts. 854 855define void @truncs_before_selects(<4 x float> %f1, <4 x float> %f2, <4 x i64> %a, <4 x i64> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) { 856; CHECK-LABEL: @truncs_before_selects( 857; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %f1, %f2 858; CHECK-NEXT: [[BC1:%.*]] = trunc <4 x i64> %a to <4 x i32> 859; CHECK-NEXT: [[BC2:%.*]] = trunc <4 x i64> %b to <4 x i32> 860; CHECK-NEXT: [[SEL1:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC1]], <4 x i32> [[BC2]] 861; CHECK-NEXT: [[SEL2:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC2]], <4 x i32> [[BC1]] 862; CHECK-NEXT: store <4 x i32> [[SEL1]], <4 x i32>* %ptr1, align 16 863; CHECK-NEXT: store <4 x i32> [[SEL2]], <4 x i32>* %ptr2, align 16 864; CHECK-NEXT: ret void 865; 866 %cmp = fcmp olt <4 x float> %f1, %f2 867 %bc1 = trunc <4 x i64> %a to <4 x i32> 868 %bc2 = trunc <4 x i64> %b to <4 x i32> 869 %sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2 870 %sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1 871 store <4 x i32> %sel1, <4 x i32>* %ptr1, align 16 872 store <4 x i32> %sel2, <4 x i32>* %ptr2, align 16 873 ret void 874} 875 876; PR8575 877 878define i32 @test52(i32 %n, i32 %m) nounwind { 879; CHECK-LABEL: @test52( 880 %cmp = icmp sgt i32 %n, %m 881 %. = select i1 %cmp, i32 1, i32 3 882 %add = add nsw i32 %., 3 883 %storemerge = select i1 %cmp, i32 %., i32 %add 884; CHECK: select i1 %cmp, i32 1, i32 6 885 ret i32 %storemerge 886} 887 888; PR9454 889define i32 @test53(i32 %x) nounwind { 890 %and = and i32 %x, 2 891 %cmp = icmp eq i32 %and, %x 892 %sel = select i1 %cmp, i32 2, i32 1 893 ret i32 %sel 894; CHECK-LABEL: @test53( 895; CHECK: select i1 %cmp 896; CHECK: ret 897} 898 899define i32 @test54(i32 %X, i32 %Y) { 900 %A = ashr exact i32 %X, %Y 901 %B = icmp eq i32 %A, 0 902 %C = select i1 %B, i32 %A, i32 1 903 ret i32 %C 904; CHECK-LABEL: @test54( 905; CHECK-NOT: ashr 906; CHECK-NOT: select 907; CHECK: icmp ne i32 %X, 0 908; CHECK: zext 909; CHECK: ret 910} 911 912define i1 @test55(i1 %X, i32 %Y, i32 %Z) { 913 %A = ashr exact i32 %Y, %Z 914 %B = select i1 %X, i32 %Y, i32 %A 915 %C = icmp eq i32 %B, 0 916 ret i1 %C 917; CHECK-LABEL: @test55( 918; CHECK-NOT: ashr 919; CHECK-NOT: select 920; CHECK: icmp eq 921; CHECK: ret i1 922} 923 924define i32 @test56(i16 %x) nounwind { 925 %tobool = icmp eq i16 %x, 0 926 %conv = zext i16 %x to i32 927 %cond = select i1 %tobool, i32 0, i32 %conv 928 ret i32 %cond 929; CHECK-LABEL: @test56( 930; CHECK-NEXT: zext 931; CHECK-NEXT: ret 932} 933 934define i32 @test57(i32 %x, i32 %y) nounwind { 935 %and = and i32 %x, %y 936 %tobool = icmp eq i32 %x, 0 937 %.and = select i1 %tobool, i32 0, i32 %and 938 ret i32 %.and 939; CHECK-LABEL: @test57( 940; CHECK-NEXT: and i32 %x, %y 941; CHECK-NEXT: ret 942} 943 944define i32 @test58(i16 %x) nounwind { 945 %tobool = icmp ne i16 %x, 1 946 %conv = zext i16 %x to i32 947 %cond = select i1 %tobool, i32 %conv, i32 1 948 ret i32 %cond 949; CHECK-LABEL: @test58( 950; CHECK-NEXT: zext 951; CHECK-NEXT: ret 952} 953 954define i32 @test59(i32 %x, i32 %y) nounwind { 955 %and = and i32 %x, %y 956 %tobool = icmp ne i32 %x, %y 957 %.and = select i1 %tobool, i32 %and, i32 %y 958 ret i32 %.and 959; CHECK-LABEL: @test59( 960; CHECK-NEXT: and i32 %x, %y 961; CHECK-NEXT: ret 962} 963 964define i1 @test60(i32 %x, i1* %y) nounwind { 965 %cmp = icmp eq i32 %x, 0 966 %load = load i1, i1* %y, align 1 967 %cmp1 = icmp slt i32 %x, 1 968 %sel = select i1 %cmp, i1 %load, i1 %cmp1 969 ret i1 %sel 970; CHECK-LABEL: @test60( 971; CHECK: select 972} 973 974@glbl = constant i32 10 975define i32 @test61(i32* %ptr) { 976 %A = load i32, i32* %ptr 977 %B = icmp eq i32* %ptr, @glbl 978 %C = select i1 %B, i32 %A, i32 10 979 ret i32 %C 980; CHECK-LABEL: @test61( 981; CHECK: ret i32 10 982} 983 984; PR14131 985define void @test64(i32 %p, i16 %b) noreturn nounwind { 986entry: 987 %p.addr.0.insert.mask = and i32 %p, -65536 988 %conv2 = and i32 %p, 65535 989 br i1 undef, label %lor.rhs, label %lor.end 990 991lor.rhs: 992 %p.addr.0.extract.trunc = trunc i32 %p.addr.0.insert.mask to i16 993 %phitmp = zext i16 %p.addr.0.extract.trunc to i32 994 br label %lor.end 995 996lor.end: 997 %t.1 = phi i32 [ 0, %entry ], [ %phitmp, %lor.rhs ] 998 %conv6 = zext i16 %b to i32 999 %div = udiv i32 %conv6, %t.1 1000 %tobool8 = icmp eq i32 %div, 0 1001 %cmp = icmp eq i32 %t.1, 0 1002 %cmp12 = icmp ult i32 %conv2, 2 1003 %cmp.sink = select i1 %tobool8, i1 %cmp12, i1 %cmp 1004 br i1 %cmp.sink, label %cond.end17, label %cond.false16 1005 1006cond.false16: 1007 br label %cond.end17 1008 1009cond.end17: 1010 br label %while.body 1011 1012while.body: 1013 br label %while.body 1014; CHECK-LABEL: @test64( 1015; CHECK-NOT: select 1016} 1017 1018; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2( 1019; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 1 1020; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 2 1021; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y 1022; CHECK-NEXT: ret i32 [[OR]] 1023define i32 @select_icmp_eq_and_1_0_or_2(i32 %x, i32 %y) { 1024 %and = and i32 %x, 1 1025 %cmp = icmp eq i32 %and, 0 1026 %or = or i32 %y, 2 1027 %select = select i1 %cmp, i32 %y, i32 %or 1028 ret i32 %select 1029} 1030 1031; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8( 1032; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 2 1033; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 8 1034; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y 1035; CHECK-NEXT: ret i32 [[OR]] 1036define i32 @select_icmp_eq_and_32_0_or_8(i32 %x, i32 %y) { 1037 %and = and i32 %x, 32 1038 %cmp = icmp eq i32 %and, 0 1039 %or = or i32 %y, 8 1040 %select = select i1 %cmp, i32 %y, i32 %or 1041 ret i32 %select 1042} 1043 1044; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096( 1045; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096 1046; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096 1047; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 1048; CHECK-NEXT: ret i32 [[OR]] 1049define i32 @select_icmp_ne_0_and_4096_or_4096(i32 %x, i32 %y) { 1050 %and = and i32 %x, 4096 1051 %cmp = icmp ne i32 0, %and 1052 %or = or i32 %y, 4096 1053 %select = select i1 %cmp, i32 %y, i32 %or 1054 ret i32 %select 1055} 1056 1057; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096( 1058; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096 1059; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y 1060; CHECK-NEXT: ret i32 [[OR]] 1061define i32 @select_icmp_eq_and_4096_0_or_4096(i32 %x, i32 %y) { 1062 %and = and i32 %x, 4096 1063 %cmp = icmp eq i32 %and, 0 1064 %or = or i32 %y, 4096 1065 %select = select i1 %cmp, i32 %y, i32 %or 1066 ret i32 %select 1067} 1068 1069; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1( 1070; CHECK-NEXT: [[TRUNC:%.+]] = trunc i64 %x to i32 1071; CHECK-NEXT: [[AND:%.+]] = and i32 [[TRUNC]], 1 1072; CHECK-NEXT: [[OR:%.+]] = or i32 [[XOR]], %y 1073; CHECK-NEXT: ret i32 [[OR]] 1074define i32 @select_icmp_eq_0_and_1_or_1(i64 %x, i32 %y) { 1075 %and = and i64 %x, 1 1076 %cmp = icmp eq i64 %and, 0 1077 %or = or i32 %y, 1 1078 %select = select i1 %cmp, i32 %y, i32 %or 1079 ret i32 %select 1080} 1081 1082; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_32( 1083; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 7 1084; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 32 1085; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 32 1086; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 1087; CHECK-NEXT: ret i32 [[OR]] 1088define i32 @select_icmp_ne_0_and_4096_or_32(i32 %x, i32 %y) { 1089 %and = and i32 %x, 4096 1090 %cmp = icmp ne i32 0, %and 1091 %or = or i32 %y, 32 1092 %select = select i1 %cmp, i32 %y, i32 %or 1093 ret i32 %select 1094} 1095 1096; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096( 1097; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 7 1098; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 4096 1099; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096 1100; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 1101; CHECK-NEXT: ret i32 [[OR]] 1102define i32 @select_icmp_ne_0_and_32_or_4096(i32 %x, i32 %y) { 1103 %and = and i32 %x, 32 1104 %cmp = icmp ne i32 0, %and 1105 %or = or i32 %y, 4096 1106 %select = select i1 %cmp, i32 %y, i32 %or 1107 ret i32 %select 1108} 1109 1110; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_or_8( 1111; CHECK-NEXT: [[LSHR:%.+]] = lshr i32 %x, 27 1112; CHECK-NEXT: [[TRUNC:%.+]] = trunc i32 [[LSHR]] to i8 1113; CHECK-NEXT: [[AND:%.+]] = and i8 [[TRUNC]], 8 1114; CHECK-NEXT: [[XOR:%.+]] = xor i8 [[AND]], 8 1115; CHECK-NEXT: [[OR:%.+]] = or i8 [[XOR]], %y 1116; CHECK-NEXT: ret i8 [[OR]] 1117define i8 @select_icmp_ne_0_and_1073741824_or_8(i32 %x, i8 %y) { 1118 %and = and i32 %x, 1073741824 1119 %cmp = icmp ne i32 0, %and 1120 %or = or i8 %y, 8 1121 %select = select i1 %cmp, i8 %y, i8 %or 1122 ret i8 %select 1123} 1124 1125; CHECK-LABEL: @select_icmp_ne_0_and_8_or_1073741824( 1126; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i8 %x, 8 1127; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i8 [[AND]] to i32 1128; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl nuw nsw i32 [[ZEXT]], 27 1129; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[SHL]], 1073741824 1130; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 1131; CHECK-NEXT: ret i32 [[OR]] 1132define i32 @select_icmp_ne_0_and_8_or_1073741824(i8 %x, i32 %y) { 1133 %and = and i8 %x, 8 1134 %cmp = icmp ne i8 0, %and 1135 %or = or i32 %y, 1073741824 1136 %select = select i1 %cmp, i32 %y, i32 %or 1137 ret i32 %select 1138} 1139 1140; We can't combine here, because the cmp is scalar and the or vector. 1141; Just make sure we don't assert. 1142define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) { 1143 %and = and i32 %x, 1 1144 %cmp = icmp eq i32 %and, 0 1145 %or = or <2 x i32> %y, <i32 2, i32 2> 1146 %select = select i1 %cmp, <2 x i32> %y, <2 x i32> %or 1147 ret <2 x i32> %select 1148} 1149 1150; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8( 1151; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9 1152; CHECK-NEXT: ret i32 [[AND]] 1153define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) { 1154 %and = and i32 %x, 8 1155 %cmp = icmp eq i32 %and, 0 1156 %xor = xor i32 %x, 8 1157 %x.xor = select i1 %cmp, i32 %x, i32 %xor 1158 ret i32 %x.xor 1159} 1160 1161; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8( 1162; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8 1163; CHECK-NEXT: ret i32 [[OR]] 1164define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) { 1165 %and = and i32 %x, 8 1166 %cmp = icmp eq i32 %and, 0 1167 %xor = xor i32 %x, 8 1168 %xor.x = select i1 %cmp, i32 %xor, i32 %x 1169 ret i32 %xor.x 1170} 1171 1172; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8( 1173; CHECK: select i1 %cmp, i64 %y, i64 %xor 1174define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) { 1175 %and = and i32 %x, 8 1176 %cmp = icmp eq i32 %and, 0 1177 %xor = xor i64 %y, 8 1178 %y.xor = select i1 %cmp, i64 %y, i64 %xor 1179 ret i64 %y.xor 1180} 1181 1182; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8( 1183; CHECK: select i1 %cmp, i64 %xor, i64 %y 1184define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) { 1185 %and = and i32 %x, 8 1186 %cmp = icmp eq i32 %and, 0 1187 %xor = xor i64 %y, 8 1188 %xor.y = select i1 %cmp, i64 %xor, i64 %y 1189 ret i64 %xor.y 1190} 1191 1192; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8( 1193; CHECK: xor i64 %1, 8 1194; CHECK: or i64 %2, %y 1195define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) { 1196 %and = and i32 %x, 8 1197 %cmp = icmp eq i32 %and, 0 1198 %or = or i64 %y, 8 1199 %or.y = select i1 %cmp, i64 %or, i64 %y 1200 ret i64 %or.y 1201} 1202 1203; CHECK-LABEL: @select_icmp_and_2147483648_ne_0_xor_2147483648( 1204; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 2147483647 1205; CHECK-NEXT: ret i32 [[AND]] 1206define i32 @select_icmp_and_2147483648_ne_0_xor_2147483648(i32 %x) { 1207 %and = and i32 %x, 2147483648 1208 %cmp = icmp eq i32 %and, 0 1209 %xor = xor i32 %x, 2147483648 1210 %x.xor = select i1 %cmp, i32 %x, i32 %xor 1211 ret i32 %x.xor 1212} 1213 1214; CHECK-LABEL: @select_icmp_and_2147483648_eq_0_xor_2147483648( 1215; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, -2147483648 1216; CHECK-NEXT: ret i32 [[OR]] 1217define i32 @select_icmp_and_2147483648_eq_0_xor_2147483648(i32 %x) { 1218 %and = and i32 %x, 2147483648 1219 %cmp = icmp eq i32 %and, 0 1220 %xor = xor i32 %x, 2147483648 1221 %xor.x = select i1 %cmp, i32 %xor, i32 %x 1222 ret i32 %xor.x 1223} 1224 1225; CHECK-LABEL: @select_icmp_x_and_2147483648_ne_0_or_2147483648( 1226; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, -2147483648 1227; CHECK-NEXT: ret i32 [[OR]] 1228define i32 @select_icmp_x_and_2147483648_ne_0_or_2147483648(i32 %x) { 1229 %and = and i32 %x, 2147483648 1230 %cmp = icmp eq i32 %and, 0 1231 %or = or i32 %x, 2147483648 1232 %or.x = select i1 %cmp, i32 %or, i32 %x 1233 ret i32 %or.x 1234} 1235 1236define i32 @test65(i64 %x) { 1237 %1 = and i64 %x, 16 1238 %2 = icmp ne i64 %1, 0 1239 %3 = select i1 %2, i32 40, i32 42 1240 ret i32 %3 1241 1242; CHECK-LABEL: @test65( 1243; CHECK: %[[TRUNC:.*]] = trunc i64 %x to i32 1244; CHECK: %[[LSHR:.*]] = lshr i32 %[[TRUNC]], 3 1245; CHECK: %[[AND:.*]] = and i32 %[[LSHR]], 2 1246; CHECK: %[[XOR:.*]] = xor i32 %[[AND]], 42 1247; CHECK: ret i32 %[[XOR]] 1248} 1249 1250define i32 @test66(i64 %x) { 1251 %1 = and i64 %x, 4294967296 1252 %2 = icmp ne i64 %1, 0 1253 %3 = select i1 %2, i32 40, i32 42 1254 ret i32 %3 1255 1256; CHECK-LABEL: @test66( 1257; CHECK: select 1258} 1259 1260define i32 @test67(i16 %x) { 1261 %1 = and i16 %x, 4 1262 %2 = icmp ne i16 %1, 0 1263 %3 = select i1 %2, i32 40, i32 42 1264 ret i32 %3 1265 1266; CHECK-LABEL: @test67( 1267; CHECK: and i16 %x, 4 1268; CHECK: zext i16 %1 to i32 1269; CHECK: lshr exact i32 %2, 1 1270; CHECK: xor i32 %3, 42 1271} 1272 1273; SMIN(SMIN(X, 11), 92) -> SMIN(X, 11) 1274define i32 @test68(i32 %x) { 1275entry: 1276 %cmp = icmp slt i32 11, %x 1277 %cond = select i1 %cmp, i32 11, i32 %x 1278 %cmp3 = icmp slt i32 92, %cond 1279 %retval = select i1 %cmp3, i32 92, i32 %cond 1280 ret i32 %retval 1281; CHECK-LABEL: @test68( 1282; CHECK: ret i32 %cond 1283} 1284 1285; MIN(MIN(X, 24), 83) -> MIN(X, 24) 1286define i32 @test69(i32 %x) { 1287entry: 1288 %cmp = icmp ult i32 24, %x 1289 %cond = select i1 %cmp, i32 24, i32 %x 1290 %cmp3 = icmp ult i32 83, %cond 1291 %retval = select i1 %cmp3, i32 83, i32 %cond 1292 ret i32 %retval 1293; CHECK-LABEL: @test69( 1294; CHECK: ret i32 %cond 1295} 1296 1297; SMAX(SMAX(X, 75), 36) -> SMAX(X, 75) 1298define i32 @test70(i32 %x) { 1299entry: 1300 %cmp = icmp slt i32 %x, 75 1301 %cond = select i1 %cmp, i32 75, i32 %x 1302 %cmp3 = icmp slt i32 %cond, 36 1303 %retval = select i1 %cmp3, i32 36, i32 %cond 1304 ret i32 %retval 1305; CHECK-LABEL: @test70( 1306; CHECK: ret i32 %cond 1307} 1308 1309; MAX(MAX(X, 68), 47) -> MAX(X, 68) 1310define i32 @test71(i32 %x) { 1311entry: 1312 %cmp = icmp ult i32 %x, 68 1313 %cond = select i1 %cmp, i32 68, i32 %x 1314 %cmp3 = icmp ult i32 %cond, 47 1315 %retval = select i1 %cmp3, i32 47, i32 %cond 1316 ret i32 %retval 1317; CHECK-LABEL: @test71( 1318; CHECK: ret i32 %cond 1319} 1320 1321; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11) 1322define i32 @test72(i32 %x) { 1323 %cmp = icmp sgt i32 %x, 92 1324 %cond = select i1 %cmp, i32 92, i32 %x 1325 %cmp3 = icmp sgt i32 %cond, 11 1326 %retval = select i1 %cmp3, i32 11, i32 %cond 1327 ret i32 %retval 1328; CHECK-LABEL: @test72( 1329; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 11 1330; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 11, i32 %x 1331; CHECK-NEXT: ret i32 [[SEL]] 1332} 1333 1334; MIN(MIN(X, 83), 24) -> MIN(X, 24) 1335define i32 @test73(i32 %x) { 1336 %cmp = icmp ugt i32 %x, 83 1337 %cond = select i1 %cmp, i32 83, i32 %x 1338 %cmp3 = icmp ugt i32 %cond, 24 1339 %retval = select i1 %cmp3, i32 24, i32 %cond 1340 ret i32 %retval 1341; CHECK-LABEL: @test73( 1342; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ugt i32 %x, 24 1343; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 24, i32 %x 1344; CHECK-NEXT: ret i32 [[SEL]] 1345} 1346 1347; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75) 1348define i32 @test74(i32 %x) { 1349 %cmp = icmp slt i32 %x, 36 1350 %cond = select i1 %cmp, i32 36, i32 %x 1351 %cmp3 = icmp slt i32 %cond, 75 1352 %retval = select i1 %cmp3, i32 75, i32 %cond 1353 ret i32 %retval 1354; CHECK-LABEL: @test74( 1355; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 75 1356; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 75, i32 %x 1357; CHECK-NEXT: ret i32 [[SEL]] 1358} 1359 1360; MAX(MAX(X, 47), 68) -> MAX(X, 68) 1361define i32 @test75(i32 %x) { 1362 %cmp = icmp ult i32 %x, 47 1363 %cond = select i1 %cmp, i32 47, i32 %x 1364 %cmp3 = icmp ult i32 %cond, 68 1365 %retval = select i1 %cmp3, i32 68, i32 %cond 1366 ret i32 %retval 1367; CHECK-LABEL: @test75( 1368; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %x, 68 1369; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 68, i32 %x 1370; CHECK-NEXT: ret i32 [[SEL]] 1371} 1372 1373@under_aligned = external global i32, align 1 1374 1375define i32 @test76(i1 %flag, i32* %x) { 1376; The load here must not be speculated around the select. One side of the 1377; select is trivially dereferencable but may have a lower alignment than the 1378; load does. 1379; CHECK-LABEL: @test76( 1380; CHECK: store i32 0, i32* %x 1381; CHECK: %[[P:.*]] = select i1 %flag, i32* @under_aligned, i32* %x 1382; CHECK: load i32, i32* %[[P]] 1383 1384 store i32 0, i32* %x 1385 %p = select i1 %flag, i32* @under_aligned, i32* %x 1386 %v = load i32, i32* %p 1387 ret i32 %v 1388} 1389 1390declare void @scribble_on_i32(i32*) 1391 1392define i32 @test77(i1 %flag, i32* %x) { 1393; The load here must not be speculated around the select. One side of the 1394; select is trivially dereferencable but may have a lower alignment than the 1395; load does. 1396; CHECK-LABEL: @test77( 1397; CHECK: %[[A:.*]] = alloca i32, align 1 1398; CHECK: call void @scribble_on_i32(i32* nonnull %[[A]]) 1399; CHECK: store i32 0, i32* %x 1400; CHECK: %[[P:.*]] = select i1 %flag, i32* %[[A]], i32* %x 1401; CHECK: load i32, i32* %[[P]] 1402 1403 %under_aligned = alloca i32, align 1 1404 call void @scribble_on_i32(i32* %under_aligned) 1405 store i32 0, i32* %x 1406 %p = select i1 %flag, i32* %under_aligned, i32* %x 1407 %v = load i32, i32* %p 1408 ret i32 %v 1409} 1410 1411define i32 @test78(i1 %flag, i32* %x, i32* %y, i32* %z) { 1412; Test that we can speculate the loads around the select even when we can't 1413; fold the load completely away. 1414; CHECK-LABEL: @test78( 1415; CHECK: %[[V1:.*]] = load i32, i32* %x 1416; CHECK-NEXT: %[[V2:.*]] = load i32, i32* %y 1417; CHECK-NEXT: %[[S:.*]] = select i1 %flag, i32 %[[V1]], i32 %[[V2]] 1418; CHECK-NEXT: ret i32 %[[S]] 1419entry: 1420 store i32 0, i32* %x 1421 store i32 0, i32* %y 1422 ; Block forwarding by storing to %z which could alias either %x or %y. 1423 store i32 42, i32* %z 1424 %p = select i1 %flag, i32* %x, i32* %y 1425 %v = load i32, i32* %p 1426 ret i32 %v 1427} 1428 1429define i32 @test78_deref(i1 %flag, i32* dereferenceable(4) %x, i32* dereferenceable(4) %y, i32* %z) { 1430; Test that we can speculate the loads around the select even when we can't 1431; fold the load completely away. 1432; CHECK-LABEL: @test78_deref( 1433; CHECK: %[[V1:.*]] = load i32, i32* %x 1434; CHECK-NEXT: %[[V2:.*]] = load i32, i32* %y 1435; CHECK-NEXT: %[[S:.*]] = select i1 %flag, i32 %[[V1]], i32 %[[V2]] 1436; CHECK-NEXT: ret i32 %[[S]] 1437entry: 1438 %p = select i1 %flag, i32* %x, i32* %y 1439 %v = load i32, i32* %p 1440 ret i32 %v 1441} 1442 1443define i32 @test78_neg(i1 %flag, i32* %x, i32* %y, i32* %z) { 1444; The same as @test78 but we can't speculate the load because it can trap 1445; if under-aligned. 1446; CHECK-LABEL: @test78_neg( 1447; CHECK: %p = select i1 %flag, i32* %x, i32* %y 1448; CHECK-NEXT: %v = load i32, i32* %p, align 16 1449; CHECK-NEXT: ret i32 %v 1450entry: 1451 store i32 0, i32* %x 1452 store i32 0, i32* %y 1453 ; Block forwarding by storing to %z which could alias either %x or %y. 1454 store i32 42, i32* %z 1455 %p = select i1 %flag, i32* %x, i32* %y 1456 %v = load i32, i32* %p, align 16 1457 ret i32 %v 1458} 1459 1460define i32 @test78_deref_neg(i1 %flag, i32* dereferenceable(2) %x, i32* dereferenceable(4) %y, i32* %z) { 1461; The same as @test78_deref but we can't speculate the load because 1462; one of the arguments is not sufficiently dereferenceable. 1463; CHECK-LABEL: @test78_deref_neg( 1464; CHECK: %p = select i1 %flag, i32* %x, i32* %y 1465; CHECK-NEXT: %v = load i32, i32* %p 1466; CHECK-NEXT: ret i32 %v 1467entry: 1468 %p = select i1 %flag, i32* %x, i32* %y 1469 %v = load i32, i32* %p 1470 ret i32 %v 1471} 1472 1473define float @test79(i1 %flag, float* %x, i32* %y, i32* %z) { 1474; Test that we can speculate the loads around the select even when we can't 1475; fold the load completely away. 1476; CHECK-LABEL: @test79( 1477; CHECK: %[[V1:.*]] = load float, float* %x 1478; CHECK-NEXT: %[[V2:.*]] = load float, float* %y 1479; CHECK-NEXT: %[[S:.*]] = select i1 %flag, float %[[V1]], float %[[V2]] 1480; CHECK-NEXT: ret float %[[S]] 1481entry: 1482 %x1 = bitcast float* %x to i32* 1483 %y1 = bitcast i32* %y to float* 1484 store i32 0, i32* %x1 1485 store i32 0, i32* %y 1486 ; Block forwarding by storing to %z which could alias either %x or %y. 1487 store i32 42, i32* %z 1488 %p = select i1 %flag, float* %x, float* %y1 1489 %v = load float, float* %p 1490 ret float %v 1491} 1492 1493define i32 @test80(i1 %flag) { 1494; Test that when we speculate the loads around the select they fold throug 1495; load->load folding and load->store folding. 1496; CHECK-LABEL: @test80( 1497; CHECK: %[[X:.*]] = alloca i32 1498; CHECK-NEXT: %[[Y:.*]] = alloca i32 1499; CHECK: %[[V:.*]] = load i32, i32* %[[X]] 1500; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]] 1501; CHECK-NEXT: ret i32 %[[V]] 1502entry: 1503 %x = alloca i32 1504 %y = alloca i32 1505 call void @scribble_on_i32(i32* %x) 1506 call void @scribble_on_i32(i32* %y) 1507 %tmp = load i32, i32* %x 1508 store i32 %tmp, i32* %y 1509 %p = select i1 %flag, i32* %x, i32* %y 1510 %v = load i32, i32* %p 1511 ret i32 %v 1512} 1513 1514define float @test81(i1 %flag) { 1515; Test that we can speculate the load around the select even though they use 1516; differently typed pointers. 1517; CHECK-LABEL: @test81( 1518; CHECK: %[[X:.*]] = alloca i32 1519; CHECK-NEXT: %[[Y:.*]] = alloca i32 1520; CHECK: %[[V:.*]] = load i32, i32* %[[X]] 1521; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]] 1522; CHECK-NEXT: %[[C:.*]] = bitcast i32 %[[V]] to float 1523; CHECK-NEXT: ret float %[[C]] 1524entry: 1525 %x = alloca float 1526 %y = alloca i32 1527 %x1 = bitcast float* %x to i32* 1528 %y1 = bitcast i32* %y to float* 1529 call void @scribble_on_i32(i32* %x1) 1530 call void @scribble_on_i32(i32* %y) 1531 %tmp = load i32, i32* %x1 1532 store i32 %tmp, i32* %y 1533 %p = select i1 %flag, float* %x, float* %y1 1534 %v = load float, float* %p 1535 ret float %v 1536} 1537 1538define i32 @test82(i1 %flag) { 1539; Test that we can speculate the load around the select even though they use 1540; differently typed pointers. 1541; CHECK-LABEL: @test82( 1542; CHECK: %[[X:.*]] = alloca float 1543; CHECK-NEXT: %[[Y:.*]] = alloca i32 1544; CHECK-NEXT: %[[X1:.*]] = bitcast float* %[[X]] to i32* 1545; CHECK-NEXT: %[[Y1:.*]] = bitcast i32* %[[Y]] to float* 1546; CHECK: %[[V:.*]] = load float, float* %[[X]] 1547; CHECK-NEXT: store float %[[V]], float* %[[Y1]] 1548; CHECK-NEXT: %[[C:.*]] = bitcast float %[[V]] to i32 1549; CHECK-NEXT: ret i32 %[[C]] 1550entry: 1551 %x = alloca float 1552 %y = alloca i32 1553 %x1 = bitcast float* %x to i32* 1554 %y1 = bitcast i32* %y to float* 1555 call void @scribble_on_i32(i32* %x1) 1556 call void @scribble_on_i32(i32* %y) 1557 %tmp = load float, float* %x 1558 store float %tmp, float* %y1 1559 %p = select i1 %flag, i32* %x1, i32* %y 1560 %v = load i32, i32* %p 1561 ret i32 %v 1562} 1563 1564declare void @scribble_on_i64(i64*) 1565declare void @scribble_on_i128(i128*) 1566 1567define i8* @test83(i1 %flag) { 1568; Test that we can speculate the load around the select even though they use 1569; differently typed pointers and requires inttoptr casts. 1570; CHECK-LABEL: @test83( 1571; CHECK: %[[X:.*]] = alloca i8* 1572; CHECK-NEXT: %[[Y:.*]] = alloca i8* 1573; CHECK-DAG: %[[X2:.*]] = bitcast i8** %[[X]] to i64* 1574; CHECK-DAG: %[[Y2:.*]] = bitcast i8** %[[Y]] to i64* 1575; CHECK: %[[V:.*]] = load i64, i64* %[[X2]] 1576; CHECK-NEXT: store i64 %[[V]], i64* %[[Y2]] 1577; CHECK-NEXT: %[[C:.*]] = inttoptr i64 %[[V]] to i8* 1578; CHECK-NEXT: ret i8* %[[S]] 1579entry: 1580 %x = alloca i8* 1581 %y = alloca i64 1582 %x1 = bitcast i8** %x to i64* 1583 %y1 = bitcast i64* %y to i8** 1584 call void @scribble_on_i64(i64* %x1) 1585 call void @scribble_on_i64(i64* %y) 1586 %tmp = load i64, i64* %x1 1587 store i64 %tmp, i64* %y 1588 %p = select i1 %flag, i8** %x, i8** %y1 1589 %v = load i8*, i8** %p 1590 ret i8* %v 1591} 1592 1593define i64 @test84(i1 %flag) { 1594; Test that we can speculate the load around the select even though they use 1595; differently typed pointers and requires a ptrtoint cast. 1596; CHECK-LABEL: @test84( 1597; CHECK: %[[X:.*]] = alloca i8* 1598; CHECK-NEXT: %[[Y:.*]] = alloca i8* 1599; CHECK: %[[V:.*]] = load i8*, i8** %[[X]] 1600; CHECK-NEXT: store i8* %[[V]], i8** %[[Y]] 1601; CHECK-NEXT: %[[C:.*]] = ptrtoint i8* %[[V]] to i64 1602; CHECK-NEXT: ret i64 %[[C]] 1603entry: 1604 %x = alloca i8* 1605 %y = alloca i64 1606 %x1 = bitcast i8** %x to i64* 1607 %y1 = bitcast i64* %y to i8** 1608 call void @scribble_on_i64(i64* %x1) 1609 call void @scribble_on_i64(i64* %y) 1610 %tmp = load i8*, i8** %x 1611 store i8* %tmp, i8** %y1 1612 %p = select i1 %flag, i64* %x1, i64* %y 1613 %v = load i64, i64* %p 1614 ret i64 %v 1615} 1616 1617define i8* @test85(i1 %flag) { 1618; Test that we can't speculate the load around the select. The load of the 1619; pointer doesn't load all of the stored integer bits. We could fix this, but it 1620; would require endianness checks and other nastiness. 1621; CHECK-LABEL: @test85( 1622; CHECK: %[[T:.*]] = load i128, i128* 1623; CHECK-NEXT: store i128 %[[T]], i128* 1624; CHECK-NEXT: %[[X:.*]] = load i8*, i8** 1625; CHECK-NEXT: %[[Y:.*]] = load i8*, i8** 1626; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i8* %[[X]], i8* %[[Y]] 1627; CHECK-NEXT: ret i8* %[[V]] 1628entry: 1629 %x = alloca [2 x i8*] 1630 %y = alloca i128 1631 %x1 = bitcast [2 x i8*]* %x to i8** 1632 %x2 = bitcast i8** %x1 to i128* 1633 %y1 = bitcast i128* %y to i8** 1634 call void @scribble_on_i128(i128* %x2) 1635 call void @scribble_on_i128(i128* %y) 1636 %tmp = load i128, i128* %x2 1637 store i128 %tmp, i128* %y 1638 %p = select i1 %flag, i8** %x1, i8** %y1 1639 %v = load i8*, i8** %p 1640 ret i8* %v 1641} 1642 1643define i128 @test86(i1 %flag) { 1644; Test that we can't speculate the load around the select when the integer size 1645; is larger than the pointer size. The store of the pointer doesn't store to all 1646; the bits of the integer. 1647; 1648; CHECK-LABEL: @test86( 1649; CHECK: %[[T:.*]] = load i8*, i8** 1650; CHECK-NEXT: store i8* %[[T]], i8** 1651; CHECK-NEXT: %[[X:.*]] = load i128, i128* 1652; CHECK-NEXT: %[[Y:.*]] = load i128, i128* 1653; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i128 %[[X]], i128 %[[Y]] 1654; CHECK-NEXT: ret i128 %[[V]] 1655entry: 1656 %x = alloca [2 x i8*] 1657 %y = alloca i128 1658 %x1 = bitcast [2 x i8*]* %x to i8** 1659 %x2 = bitcast i8** %x1 to i128* 1660 %y1 = bitcast i128* %y to i8** 1661 call void @scribble_on_i128(i128* %x2) 1662 call void @scribble_on_i128(i128* %y) 1663 %tmp = load i8*, i8** %x1 1664 store i8* %tmp, i8** %y1 1665 %p = select i1 %flag, i128* %x2, i128* %y 1666 %v = load i128, i128* %p 1667 ret i128 %v 1668} 1669 1670define i32 @test_select_select0(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { 1671 ; CHECK-LABEL: @test_select_select0( 1672 ; CHECK: %[[C0:.*]] = icmp sge i32 %a, %v1 1673 ; CHECK-NEXT: %[[C1:.*]] = icmp slt i32 %a, %v2 1674 ; CHECK-NEXT: %[[C:.*]] = and i1 %[[C1]], %[[C0]] 1675 ; CHECK-NEXT: %[[SEL:.*]] = select i1 %[[C]], i32 %r0, i32 %r1 1676 ; CHECK-NEXT: ret i32 %[[SEL]] 1677 %c0 = icmp sge i32 %a, %v1 1678 %s0 = select i1 %c0, i32 %r0, i32 %r1 1679 %c1 = icmp slt i32 %a, %v2 1680 %s1 = select i1 %c1, i32 %s0, i32 %r1 1681 ret i32 %s1 1682} 1683 1684define i32 @test_select_select1(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { 1685 ; CHECK-LABEL: @test_select_select1( 1686 ; CHECK: %[[C0:.*]] = icmp sge i32 %a, %v1 1687 ; CHECK-NEXT: %[[C1:.*]] = icmp slt i32 %a, %v2 1688 ; CHECK-NEXT: %[[C:.*]] = or i1 %[[C1]], %[[C0]] 1689 ; CHECK-NEXT: %[[SEL:.*]] = select i1 %[[C]], i32 %r0, i32 %r1 1690 ; CHECK-NEXT: ret i32 %[[SEL]] 1691 %c0 = icmp sge i32 %a, %v1 1692 %s0 = select i1 %c0, i32 %r0, i32 %r1 1693 %c1 = icmp slt i32 %a, %v2 1694 %s1 = select i1 %c1, i32 %r0, i32 %s0 1695 ret i32 %s1 1696} 1697 1698define i32 @test_max_of_min(i32 %a) { 1699; MAX(MIN(%a, -1), -1) == -1 1700; CHECK-LABEL: @test_max_of_min( 1701; CHECK: ret i32 -1 1702 %not_a = xor i32 %a, -1 1703 %c0 = icmp sgt i32 %a, 0 1704 %s0 = select i1 %c0, i32 %not_a, i32 -1 1705 %c1 = icmp sgt i32 %s0, -1 1706 %s1 = select i1 %c1, i32 %s0, i32 -1 1707 ret i32 %s1 1708} 1709 1710 1711define i32 @PR23757(i32 %x) { 1712; CHECK-LABEL: @PR23757 1713; CHECK: %[[cmp:.*]] = icmp eq i32 %x, 2147483647 1714; CHECK-NEXT: %[[add:.*]] = add nsw i32 %x, 1 1715; CHECK-NEXT: %[[sel:.*]] = select i1 %[[cmp]], i32 -2147483648, i32 %[[add]] 1716; CHECK-NEXT: ret i32 %[[sel]] 1717 %cmp = icmp eq i32 %x, 2147483647 1718 %add = add nsw i32 %x, 1 1719 %sel = select i1 %cmp, i32 -2147483648, i32 %add 1720 ret i32 %sel 1721} 1722 1723 1724define i32 @PR27137(i32 %a) { 1725; CHECK-LABEL: @PR27137( 1726; CHECK-NEXT: %not_a = xor i32 %a, -1 1727; CHECK-NEXT: %c0 = icmp slt i32 %a, 0 1728; CHECK-NEXT: %s0 = select i1 %c0, i32 %not_a, i32 -1 1729; CHECK-NEXT: %c1 = icmp sgt i32 %s0, -1 1730; CHECK-NEXT: %s1 = select i1 %c1, i32 %s0, i32 -1 1731; CHECK-NEXT: ret i32 %s1 1732 1733 %not_a = xor i32 %a, -1 1734 %c0 = icmp slt i32 %a, 0 1735 %s0 = select i1 %c0, i32 %not_a, i32 -1 1736 %c1 = icmp sgt i32 %s0, -1 1737 %s1 = select i1 %c1, i32 %s0, i32 -1 1738 ret i32 %s1 1739} 1740