1//===- ARMCallingConv.td - Calling Conventions for ARM -----*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9// This describes the calling conventions for ARM architecture.
10//===----------------------------------------------------------------------===//
11
12/// CCIfSubtarget - Match if the current subtarget has a feature F.
13class CCIfSubtarget<string F, CCAction A>:
14  CCIf<!strconcat("State.getTarget().getSubtarget<ARMSubtarget>().", F), A>;
15
16/// CCIfAlign - Match of the original alignment of the arg
17class CCIfAlign<string Align, CCAction A>:
18  CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
19
20//===----------------------------------------------------------------------===//
21// ARM APCS Calling Convention
22//===----------------------------------------------------------------------===//
23def CC_ARM_APCS : CallingConv<[
24
25  // Handles byval parameters.
26  CCIfByVal<CCPassByVal<4, 4>>,
27
28  CCIfType<[i8, i16], CCPromoteToType<i32>>,
29
30  // Handle all vector types as either f64 or v2f64.
31  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
32  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
33
34  // f64 and v2f64 are passed in adjacent GPRs, possibly split onto the stack
35  CCIfType<[f64, v2f64], CCCustom<"CC_ARM_APCS_Custom_f64">>,
36
37  CCIfType<[f32], CCBitConvertToType<i32>>,
38  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
39
40  CCIfType<[i32], CCAssignToStack<4, 4>>,
41  CCIfType<[f64], CCAssignToStack<8, 4>>,
42  CCIfType<[v2f64], CCAssignToStack<16, 4>>
43]>;
44
45def RetCC_ARM_APCS : CallingConv<[
46  CCIfType<[f32], CCBitConvertToType<i32>>,
47
48  // Handle all vector types as either f64 or v2f64.
49  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
50  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
51
52  CCIfType<[f64, v2f64], CCCustom<"RetCC_ARM_APCS_Custom_f64">>,
53
54  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
55  CCIfType<[i64], CCAssignToRegWithShadow<[R0, R2], [R1, R3]>>
56]>;
57
58//===----------------------------------------------------------------------===//
59// ARM APCS Calling Convention for FastCC (when VFP2 or later is available)
60//===----------------------------------------------------------------------===//
61def FastCC_ARM_APCS : CallingConv<[
62  // Handle all vector types as either f64 or v2f64.
63  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
64  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
65
66  CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
67  CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
68  CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
69                                 S9, S10, S11, S12, S13, S14, S15]>>,
70  CCDelegateTo<CC_ARM_APCS>
71]>;
72
73def RetFastCC_ARM_APCS : CallingConv<[
74  // Handle all vector types as either f64 or v2f64.
75  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
76  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
77
78  CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
79  CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
80  CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
81                                 S9, S10, S11, S12, S13, S14, S15]>>,
82  CCDelegateTo<RetCC_ARM_APCS>
83]>;
84
85//===----------------------------------------------------------------------===//
86// ARM APCS Calling Convention for GHC
87//===----------------------------------------------------------------------===//
88
89def CC_ARM_APCS_GHC : CallingConv<[
90  // Handle all vector types as either f64 or v2f64.
91  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
92  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
93
94  CCIfType<[v2f64], CCAssignToReg<[Q4, Q5]>>,
95  CCIfType<[f64], CCAssignToReg<[D8, D9, D10, D11]>>,
96  CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,
97
98  // Promote i8/i16 arguments to i32.
99  CCIfType<[i8, i16], CCPromoteToType<i32>>,
100
101  // Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, SpLim
102  CCIfType<[i32], CCAssignToReg<[R4, R5, R6, R7, R8, R9, R10, R11]>>
103]>;
104
105//===----------------------------------------------------------------------===//
106// ARM AAPCS (EABI) Calling Convention, common parts
107//===----------------------------------------------------------------------===//
108
109def CC_ARM_AAPCS_Common : CallingConv<[
110
111  CCIfType<[i8, i16], CCPromoteToType<i32>>,
112
113  // i64/f64 is passed in even pairs of GPRs
114  // i64 is 8-aligned i32 here, so we may need to eat R1 as a pad register
115  // (and the same is true for f64 if VFP is not enabled)
116  CCIfType<[i32], CCIfAlign<"8", CCAssignToRegWithShadow<[R0, R2], [R0, R1]>>>,
117  CCIfType<[i32], CCIf<"State.getNextStackOffset() == 0 &&"
118                       "ArgFlags.getOrigAlign() != 8",
119                       CCAssignToReg<[R0, R1, R2, R3]>>>,
120
121  CCIfType<[i32], CCIfAlign<"8", CCAssignToStackWithShadow<4, 8, R3>>>,
122  CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
123  CCIfType<[f64], CCAssignToStack<8, 8>>,
124  CCIfType<[v2f64], CCAssignToStack<16, 8>>
125]>;
126
127def RetCC_ARM_AAPCS_Common : CallingConv<[
128  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
129  CCIfType<[i64], CCAssignToRegWithShadow<[R0, R2], [R1, R3]>>
130]>;
131
132//===----------------------------------------------------------------------===//
133// ARM AAPCS (EABI) Calling Convention
134//===----------------------------------------------------------------------===//
135
136def CC_ARM_AAPCS : CallingConv<[
137  // Handle all vector types as either f64 or v2f64.
138  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
139  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
140
141  CCIfType<[f64, v2f64], CCCustom<"CC_ARM_AAPCS_Custom_f64">>,
142  CCIfType<[f32], CCBitConvertToType<i32>>,
143  CCDelegateTo<CC_ARM_AAPCS_Common>
144]>;
145
146def RetCC_ARM_AAPCS : CallingConv<[
147  // Handle all vector types as either f64 or v2f64.
148  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
149  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
150
151  CCIfType<[f64, v2f64], CCCustom<"RetCC_ARM_AAPCS_Custom_f64">>,
152  CCIfType<[f32], CCBitConvertToType<i32>>,
153  CCDelegateTo<RetCC_ARM_AAPCS_Common>
154]>;
155
156//===----------------------------------------------------------------------===//
157// ARM AAPCS-VFP (EABI) Calling Convention
158// Also used for FastCC (when VFP2 or later is available)
159//===----------------------------------------------------------------------===//
160
161def CC_ARM_AAPCS_VFP : CallingConv<[
162  // Handle all vector types as either f64 or v2f64.
163  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
164  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
165
166  CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
167  CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
168  CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
169                                 S9, S10, S11, S12, S13, S14, S15]>>,
170  CCDelegateTo<CC_ARM_AAPCS_Common>
171]>;
172
173def RetCC_ARM_AAPCS_VFP : CallingConv<[
174  // Handle all vector types as either f64 or v2f64.
175  CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
176  CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
177
178  CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
179  CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
180  CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
181                                 S9, S10, S11, S12, S13, S14, S15]>>,
182  CCDelegateTo<RetCC_ARM_AAPCS_Common>
183]>;
184