1 //===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Define several functions to decode x86 specific shuffle semantics into a
11 // generic vector mask.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef X86_SHUFFLE_DECODE_H
16 #define X86_SHUFFLE_DECODE_H
17 
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 
21 //===----------------------------------------------------------------------===//
22 //  Vector Mask Decoding
23 //===----------------------------------------------------------------------===//
24 
25 namespace llvm {
26 enum {
27   SM_SentinelZero = ~0U
28 };
29 
30 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<unsigned> &ShuffleMask);
31 
32 // <3,1> or <6,7,2,3>
33 void DecodeMOVHLPSMask(unsigned NElts,
34                        SmallVectorImpl<unsigned> &ShuffleMask);
35 
36 // <0,2> or <0,1,4,5>
37 void DecodeMOVLHPSMask(unsigned NElts,
38                        SmallVectorImpl<unsigned> &ShuffleMask);
39 
40 void DecodePSHUFMask(unsigned NElts, unsigned Imm,
41                      SmallVectorImpl<unsigned> &ShuffleMask);
42 
43 void DecodePSHUFHWMask(unsigned Imm,
44                        SmallVectorImpl<unsigned> &ShuffleMask);
45 
46 void DecodePSHUFLWMask(unsigned Imm,
47                        SmallVectorImpl<unsigned> &ShuffleMask);
48 
49 void DecodePUNPCKLBWMask(unsigned NElts,
50                          SmallVectorImpl<unsigned> &ShuffleMask);
51 
52 void DecodePUNPCKLWDMask(unsigned NElts,
53                          SmallVectorImpl<unsigned> &ShuffleMask);
54 
55 void DecodePUNPCKLDQMask(unsigned NElts,
56                          SmallVectorImpl<unsigned> &ShuffleMask);
57 
58 void DecodePUNPCKLQDQMask(unsigned NElts,
59                           SmallVectorImpl<unsigned> &ShuffleMask);
60 
61 void DecodePUNPCKLMask(EVT VT,
62                        SmallVectorImpl<unsigned> &ShuffleMask);
63 
64 void DecodePUNPCKHMask(unsigned NElts,
65                        SmallVectorImpl<unsigned> &ShuffleMask);
66 
67 void DecodeSHUFPSMask(unsigned NElts, unsigned Imm,
68                       SmallVectorImpl<unsigned> &ShuffleMask);
69 
70 void DecodeUNPCKHPMask(unsigned NElts,
71                        SmallVectorImpl<unsigned> &ShuffleMask);
72 
73 void DecodeUNPCKLPSMask(unsigned NElts,
74                         SmallVectorImpl<unsigned> &ShuffleMask);
75 
76 void DecodeUNPCKLPDMask(unsigned NElts,
77                         SmallVectorImpl<unsigned> &ShuffleMask);
78 
79 /// DecodeUNPCKLPMask - This decodes the shuffle masks for unpcklps/unpcklpd
80 /// etc.  VT indicates the type of the vector allowing it to handle different
81 /// datatypes and vector widths.
82 void DecodeUNPCKLPMask(EVT VT,
83                        SmallVectorImpl<unsigned> &ShuffleMask);
84 
85 
86 // DecodeVPERMILPSMask - Decodes VPERMILPS permutes for any 128-bit 32-bit
87 // elements. For 256-bit vectors, it's considered as two 128 lanes, the
88 // referenced elements can't cross lanes and the mask of the first lane must
89 // be the same of the second.
90 void DecodeVPERMILPSMask(unsigned NElts, unsigned Imm,
91                         SmallVectorImpl<unsigned> &ShuffleMask);
92 
93 // DecodeVPERMILPDMask - Decodes VPERMILPD permutes for any 128-bit 64-bit
94 // elements. For 256-bit vectors, it's considered as two 128 lanes, the
95 // referenced elements can't cross lanes but the mask of the first lane can
96 // be the different of the second (not like VPERMILPS).
97 void DecodeVPERMILPDMask(unsigned NElts, unsigned Imm,
98                         SmallVectorImpl<unsigned> &ShuffleMask);
99 
100 void DecodeVPERM2F128Mask(unsigned Imm,
101                           SmallVectorImpl<unsigned> &ShuffleMask);
102 void DecodeVPERM2F128Mask(EVT VT, unsigned Imm,
103                           SmallVectorImpl<unsigned> &ShuffleMask);
104 
105 } // llvm namespace
106 
107 #endif
108