1; RUN: llc < %s -march=cellspu -o %t1.s
2; RUN: grep rot          %t1.s | count 86
3; RUN: grep roth         %t1.s | count 8
4; RUN: grep roti.*5      %t1.s | count 1
5; RUN: grep roti.*27     %t1.s | count 1
6; RUN: grep rothi.*5      %t1.s | count 2
7; RUN: grep rothi.*11     %t1.s | count 1
8; RUN: grep rothi.*,.3    %t1.s | count 1
9; RUN: grep andhi        %t1.s | count 4
10; RUN: grep shlhi        %t1.s | count 4
11; RUN: cat %t1.s | FileCheck %s
12
13target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
14target triple = "spu"
15
16; Vector rotates are not currently supported in gcc or llvm assembly. These are
17; not tested.
18
19; 32-bit rotates:
20define i32 @rotl32_1a(i32 %arg1, i8 %arg2) {
21        %tmp1 = zext i8 %arg2 to i32    ; <i32> [#uses=1]
22        %B = shl i32 %arg1, %tmp1       ; <i32> [#uses=1]
23        %arg22 = sub i8 32, %arg2       ; <i8> [#uses=1]
24        %tmp2 = zext i8 %arg22 to i32   ; <i32> [#uses=1]
25        %C = lshr i32 %arg1, %tmp2      ; <i32> [#uses=1]
26        %D = or i32 %B, %C              ; <i32> [#uses=1]
27        ret i32 %D
28}
29
30define i32 @rotl32_1b(i32 %arg1, i16 %arg2) {
31        %tmp1 = zext i16 %arg2 to i32   ; <i32> [#uses=1]
32        %B = shl i32 %arg1, %tmp1       ; <i32> [#uses=1]
33        %arg22 = sub i16 32, %arg2      ; <i8> [#uses=1]
34        %tmp2 = zext i16 %arg22 to i32  ; <i32> [#uses=1]
35        %C = lshr i32 %arg1, %tmp2      ; <i32> [#uses=1]
36        %D = or i32 %B, %C              ; <i32> [#uses=1]
37        ret i32 %D
38}
39
40define i32 @rotl32_2(i32 %arg1, i32 %arg2) {
41        %B = shl i32 %arg1, %arg2       ; <i32> [#uses=1]
42        %tmp1 = sub i32 32, %arg2       ; <i32> [#uses=1]
43        %C = lshr i32 %arg1, %tmp1      ; <i32> [#uses=1]
44        %D = or i32 %B, %C              ; <i32> [#uses=1]
45        ret i32 %D
46}
47
48define i32 @rotl32_3(i32 %arg1, i32 %arg2) {
49        %tmp1 = sub i32 32, %arg2       ; <i32> [#uses=1]
50        %B = shl i32 %arg1, %arg2       ; <i32> [#uses=1]
51        %C = lshr i32 %arg1, %tmp1      ; <i32> [#uses=1]
52        %D = or i32 %B, %C              ; <i32> [#uses=1]
53        ret i32 %D
54}
55
56define i32 @rotl32_4(i32 %arg1, i32 %arg2) {
57        %tmp1 = sub i32 32, %arg2       ; <i32> [#uses=1]
58        %C = lshr i32 %arg1, %tmp1      ; <i32> [#uses=1]
59        %B = shl i32 %arg1, %arg2       ; <i32> [#uses=1]
60        %D = or i32 %B, %C              ; <i32> [#uses=1]
61        ret i32 %D
62}
63
64define i32 @rotr32_1(i32 %A, i8 %Amt) {
65        %tmp1 = zext i8 %Amt to i32     ; <i32> [#uses=1]
66        %B = lshr i32 %A, %tmp1         ; <i32> [#uses=1]
67        %Amt2 = sub i8 32, %Amt         ; <i8> [#uses=1]
68        %tmp2 = zext i8 %Amt2 to i32    ; <i32> [#uses=1]
69        %C = shl i32 %A, %tmp2          ; <i32> [#uses=1]
70        %D = or i32 %B, %C              ; <i32> [#uses=1]
71        ret i32 %D
72}
73
74define i32 @rotr32_2(i32 %A, i8 %Amt) {
75        %Amt2 = sub i8 32, %Amt         ; <i8> [#uses=1]
76        %tmp1 = zext i8 %Amt to i32     ; <i32> [#uses=1]
77        %B = lshr i32 %A, %tmp1         ; <i32> [#uses=1]
78        %tmp2 = zext i8 %Amt2 to i32    ; <i32> [#uses=1]
79        %C = shl i32 %A, %tmp2          ; <i32> [#uses=1]
80        %D = or i32 %B, %C              ; <i32> [#uses=1]
81        ret i32 %D
82}
83
84; Rotate left with immediate
85define i32 @rotli32(i32 %A) {
86        %B = shl i32 %A, 5              ; <i32> [#uses=1]
87        %C = lshr i32 %A, 27            ; <i32> [#uses=1]
88        %D = or i32 %B, %C              ; <i32> [#uses=1]
89        ret i32 %D
90}
91
92; Rotate right with immediate
93define i32 @rotri32(i32 %A) {
94        %B = lshr i32 %A, 5             ; <i32> [#uses=1]
95        %C = shl i32 %A, 27             ; <i32> [#uses=1]
96        %D = or i32 %B, %C              ; <i32> [#uses=1]
97        ret i32 %D
98}
99
100; 16-bit rotates:
101define i16 @rotr16_1(i16 %arg1, i8 %arg) {
102        %tmp1 = zext i8 %arg to i16             ; <i16> [#uses=1]
103        %B = lshr i16 %arg1, %tmp1              ; <i16> [#uses=1]
104        %arg2 = sub i8 16, %arg                 ; <i8> [#uses=1]
105        %tmp2 = zext i8 %arg2 to i16            ; <i16> [#uses=1]
106        %C = shl i16 %arg1, %tmp2               ; <i16> [#uses=1]
107        %D = or i16 %B, %C                      ; <i16> [#uses=1]
108        ret i16 %D
109}
110
111define i16 @rotr16_2(i16 %arg1, i16 %arg) {
112        %B = lshr i16 %arg1, %arg       ; <i16> [#uses=1]
113        %tmp1 = sub i16 16, %arg        ; <i16> [#uses=1]
114        %C = shl i16 %arg1, %tmp1       ; <i16> [#uses=1]
115        %D = or i16 %B, %C              ; <i16> [#uses=1]
116        ret i16 %D
117}
118
119define i16 @rotli16(i16 %A) {
120        %B = shl i16 %A, 5              ; <i16> [#uses=1]
121        %C = lshr i16 %A, 11            ; <i16> [#uses=1]
122        %D = or i16 %B, %C              ; <i16> [#uses=1]
123        ret i16 %D
124}
125
126define i16 @rotri16(i16 %A) {
127        %B = lshr i16 %A, 5             ; <i16> [#uses=1]
128        %C = shl i16 %A, 11             ; <i16> [#uses=1]
129        %D = or i16 %B, %C              ; <i16> [#uses=1]
130        ret i16 %D
131}
132
133define i8 @rotl8(i8 %A, i8 %Amt) {
134        %B = shl i8 %A, %Amt            ; <i8> [#uses=1]
135        %Amt2 = sub i8 8, %Amt          ; <i8> [#uses=1]
136        %C = lshr i8 %A, %Amt2          ; <i8> [#uses=1]
137        %D = or i8 %B, %C               ; <i8> [#uses=1]
138        ret i8 %D
139}
140
141define i8 @rotr8(i8 %A, i8 %Amt) {
142        %B = lshr i8 %A, %Amt           ; <i8> [#uses=1]
143        %Amt2 = sub i8 8, %Amt          ; <i8> [#uses=1]
144        %C = shl i8 %A, %Amt2           ; <i8> [#uses=1]
145        %D = or i8 %B, %C               ; <i8> [#uses=1]
146        ret i8 %D
147}
148
149define i8 @rotli8(i8 %A) {
150        %B = shl i8 %A, 5               ; <i8> [#uses=1]
151        %C = lshr i8 %A, 3              ; <i8> [#uses=1]
152        %D = or i8 %B, %C               ; <i8> [#uses=1]
153        ret i8 %D
154}
155
156define i8 @rotri8(i8 %A) {
157        %B = lshr i8 %A, 5              ; <i8> [#uses=1]
158        %C = shl i8 %A, 3               ; <i8> [#uses=1]
159        %D = or i8 %B, %C               ; <i8> [#uses=1]
160        ret i8 %D
161}
162
163define <2 x float> @test1(<4 x float> %param )
164{
165; CHECK: test1
166; CHECK: rotqbyi
167  %el = extractelement <4 x float> %param, i32 1
168  %vec1 = insertelement <1 x float> undef, float %el, i32 0
169  %rv = shufflevector <1 x float> %vec1, <1 x float> undef, <2 x i32><i32 0,i32 0>
170; CHECK: bi $lr
171  ret <2 x float> %rv
172}
173