1; There should be exactly one vxor here.
2; RUN: llc < %s -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \
3; RUN:   grep vxor | count 1
4
5; There should be exactly one vsplti here.
6; RUN: llc < %s -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \
7; RUN:   grep vsplti | count 1
8
9define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
10        %tmp = load <4 x float>* %P3            ; <<4 x float>> [#uses=1]
11        %tmp3 = load <4 x float>* %P1           ; <<4 x float>> [#uses=1]
12        %tmp4 = fmul <4 x float> %tmp, %tmp3             ; <<4 x float>> [#uses=1]
13        store <4 x float> %tmp4, <4 x float>* %P3
14        store <4 x float> zeroinitializer, <4 x float>* %P1
15        store <4 x i32> zeroinitializer, <4 x i32>* %P2
16        ret void
17}
18
19define void @VSPLTI(<4 x i32>* %P2, <8 x i16>* %P3) {
20        store <4 x i32> bitcast (<16 x i8> < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 > to <4 x i32>), <4 x i32>* %P2
21        store <8 x i16> < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >, <8 x i16>* %P3
22        ret void
23}
24
25