1; This test makes sure that mul instructions are properly eliminated.
2; RUN: opt < %s -instcombine -S | not grep mul
3
4define i32 @test1(i32 %A) {
5        %B = mul i32 %A, 1              ; <i32> [#uses=1]
6        ret i32 %B
7}
8
9define i32 @test2(i32 %A) {
10        ; Should convert to an add instruction
11        %B = mul i32 %A, 2              ; <i32> [#uses=1]
12        ret i32 %B
13}
14
15define i32 @test3(i32 %A) {
16        ; This should disappear entirely
17        %B = mul i32 %A, 0              ; <i32> [#uses=1]
18        ret i32 %B
19}
20
21define double @test4(double %A) {
22        ; This is safe for FP
23        %B = fmul double 1.000000e+00, %A                ; <double> [#uses=1]
24        ret double %B
25}
26
27define i32 @test5(i32 %A) {
28        %B = mul i32 %A, 8              ; <i32> [#uses=1]
29        ret i32 %B
30}
31
32define i8 @test6(i8 %A) {
33        %B = mul i8 %A, 8               ; <i8> [#uses=1]
34        %C = mul i8 %B, 8               ; <i8> [#uses=1]
35        ret i8 %C
36}
37
38define i32 @test7(i32 %i) {
39        %tmp = mul i32 %i, -1           ; <i32> [#uses=1]
40        ret i32 %tmp
41}
42
43define i64 @test8(i64 %i) {
44       ; tmp = sub 0, %i
45        %j = mul i64 %i, -1             ; <i64> [#uses=1]
46        ret i64 %j
47}
48
49define i32 @test9(i32 %i) {
50        ; %j = sub 0, %i
51        %j = mul i32 %i, -1             ; <i32> [#uses=1]
52        ret i32 %j
53}
54
55define i32 @test10(i32 %a, i32 %b) {
56        %c = icmp slt i32 %a, 0         ; <i1> [#uses=1]
57        %d = zext i1 %c to i32          ; <i32> [#uses=1]
58       ; e = b & (a >> 31)
59        %e = mul i32 %d, %b             ; <i32> [#uses=1]
60        ret i32 %e
61}
62
63define i32 @test11(i32 %a, i32 %b) {
64        %c = icmp sle i32 %a, -1                ; <i1> [#uses=1]
65        %d = zext i1 %c to i32          ; <i32> [#uses=1]
66        ; e = b & (a >> 31)
67        %e = mul i32 %d, %b             ; <i32> [#uses=1]
68        ret i32 %e
69}
70
71define i32 @test12(i8 %a, i32 %b) {
72        %c = icmp ugt i8 %a, 127                ; <i1> [#uses=1]
73        %d = zext i1 %c to i32          ; <i32> [#uses=1]
74        ; e = b & (a >> 31)
75        %e = mul i32 %d, %b             ; <i32> [#uses=1]
76        ret i32 %e
77}
78
79; PR2642
80define internal void @test13(<4 x float>*) {
81	load <4 x float>* %0, align 1
82	fmul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >
83	store <4 x float> %3, <4 x float>* %0, align 1
84	ret void
85}
86
87define <16 x i8> @test14(<16 x i8> %a) {
88        %b = mul <16 x i8> %a, zeroinitializer
89        ret <16 x i8> %b
90}
91
92; rdar://7293527
93define i32 @test15(i32 %A, i32 %B) {
94entry:
95  %shl = shl i32 1, %B
96  %m = mul i32 %shl, %A
97  ret i32 %m
98}
99
100; X * Y (when Y is 0 or 1) --> x & (0-Y)
101define i32 @test16(i32 %b, i1 %c) {
102        %d = zext i1 %c to i32          ; <i32> [#uses=1]
103        ; e = b & (a >> 31)
104        %e = mul i32 %d, %b             ; <i32> [#uses=1]
105        ret i32 %e
106}
107
108; X * Y (when Y is 0 or 1) --> x & (0-Y)
109define i32 @test17(i32 %a, i32 %b) {
110  %a.lobit = lshr i32 %a, 31
111  %e = mul i32 %a.lobit, %b
112  ret i32 %e
113}
114
115
116
117