1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|*                                                                            *|
3|* Calling Convention Implementation Fragment                                 *|
4|*                                                                            *|
5|* Automatically generated file, do not edit!                                 *|
6|*                                                                            *|
7\*===----------------------------------------------------------------------===*/
8
9static bool CC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
10                         MVT LocVT, CCValAssign::LocInfo LocInfo,
11                         ISD::ArgFlagsTy ArgFlags, CCState &State);
12static bool CC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
13                                MVT LocVT, CCValAssign::LocInfo LocInfo,
14                                ISD::ArgFlagsTy ArgFlags, CCState &State);
15static bool CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
16                             MVT LocVT, CCValAssign::LocInfo LocInfo,
17                             ISD::ArgFlagsTy ArgFlags, CCState &State);
18static bool CC_ARM_APCS(unsigned ValNo, MVT ValVT,
19                        MVT LocVT, CCValAssign::LocInfo LocInfo,
20                        ISD::ArgFlagsTy ArgFlags, CCState &State);
21static bool CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT,
22                            MVT LocVT, CCValAssign::LocInfo LocInfo,
23                            ISD::ArgFlagsTy ArgFlags, CCState &State);
24static bool FastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
25                            MVT LocVT, CCValAssign::LocInfo LocInfo,
26                            ISD::ArgFlagsTy ArgFlags, CCState &State);
27static bool RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
28                            MVT LocVT, CCValAssign::LocInfo LocInfo,
29                            ISD::ArgFlagsTy ArgFlags, CCState &State);
30static bool RetCC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
31                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
32                                   ISD::ArgFlagsTy ArgFlags, CCState &State);
33static bool RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
34                                MVT LocVT, CCValAssign::LocInfo LocInfo,
35                                ISD::ArgFlagsTy ArgFlags, CCState &State);
36static bool RetCC_ARM_APCS(unsigned ValNo, MVT ValVT,
37                           MVT LocVT, CCValAssign::LocInfo LocInfo,
38                           ISD::ArgFlagsTy ArgFlags, CCState &State);
39static bool RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
40                               MVT LocVT, CCValAssign::LocInfo LocInfo,
41                               ISD::ArgFlagsTy ArgFlags, CCState &State);
42
43
44static bool CC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
45                         MVT LocVT, CCValAssign::LocInfo LocInfo,
46                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
47
48  if (ArgFlags.isByVal()) {
49    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
50    return false;
51  }
52
53  if (ArgFlags.isNest()) {
54    if (unsigned Reg = State.AllocateReg(ARM::R12)) {
55      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
56      return false;
57    }
58  }
59
60  if (LocVT == MVT::v1i64 ||
61      LocVT == MVT::v2i32 ||
62      LocVT == MVT::v4i16 ||
63      LocVT == MVT::v4f16 ||
64      LocVT == MVT::v8i8 ||
65      LocVT == MVT::v2f32) {
66    LocVT = MVT::f64;
67    LocInfo = CCValAssign::BCvt;
68  }
69
70  if (LocVT == MVT::v2i64 ||
71      LocVT == MVT::v4i32 ||
72      LocVT == MVT::v8i16 ||
73      LocVT == MVT::v8f16 ||
74      LocVT == MVT::v16i8 ||
75      LocVT == MVT::v4f32) {
76    LocVT = MVT::v2f64;
77    LocInfo = CCValAssign::BCvt;
78  }
79
80  if (ArgFlags.isSwiftSelf()) {
81    if (LocVT == MVT::i32) {
82      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
83        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
84        return false;
85      }
86    }
87  }
88
89  if (ArgFlags.isSwiftError()) {
90    if (LocVT == MVT::i32) {
91      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
92        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
93        return false;
94      }
95    }
96  }
97
98  if (LocVT == MVT::f64 ||
99      LocVT == MVT::v2f64) {
100    if (CC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
101        return false;
102  }
103
104  if (LocVT == MVT::f32) {
105    LocVT = MVT::i32;
106    LocInfo = CCValAssign::BCvt;
107  }
108
109  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
110    return false;
111
112  return true;  // CC didn't match.
113}
114
115
116static bool CC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
117                                MVT LocVT, CCValAssign::LocInfo LocInfo,
118                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
119
120  if (LocVT == MVT::i1 ||
121      LocVT == MVT::i8 ||
122      LocVT == MVT::i16) {
123    LocVT = MVT::i32;
124    if (ArgFlags.isSExt())
125        LocInfo = CCValAssign::SExt;
126    else if (ArgFlags.isZExt())
127        LocInfo = CCValAssign::ZExt;
128    else
129        LocInfo = CCValAssign::AExt;
130  }
131
132  if (LocVT == MVT::i32) {
133    if (ArgFlags.getOrigAlign() == 8) {
134      static const MCPhysReg RegList1[] = {
135        ARM::R0, ARM::R2
136      };
137      static const MCPhysReg RegList2[] = {
138        ARM::R0, ARM::R1
139      };
140      if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
141        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
142        return false;
143      }
144    }
145  }
146
147  if (LocVT == MVT::i32) {
148    if (ArgFlags.getOrigAlign() != 8) {
149      static const MCPhysReg RegList3[] = {
150        ARM::R0, ARM::R1, ARM::R2, ARM::R3
151      };
152      if (unsigned Reg = State.AllocateReg(RegList3)) {
153        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
154        return false;
155      }
156    }
157  }
158
159  if (LocVT == MVT::i32) {
160    if (ArgFlags.getOrigAlign() == 8) {
161      static const MCPhysReg ShadowRegList4[] = {
162        ARM::R0, ARM::R1, ARM::R2, ARM::R3
163      };
164      unsigned Offset5 = State.AllocateStack(4, 8, ShadowRegList4);
165      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
166      return false;
167    }
168  }
169
170  if (LocVT == MVT::i32) {
171    static const MCPhysReg ShadowRegList6[] = {
172      ARM::R0, ARM::R1, ARM::R2, ARM::R3
173    };
174    unsigned Offset7 = State.AllocateStack(4, 4, ShadowRegList6);
175    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
176    return false;
177  }
178
179  if (LocVT == MVT::f32) {
180    static const MCPhysReg ShadowRegList8[] = {
181      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
182    };
183    unsigned Offset9 = State.AllocateStack(4, 4, ShadowRegList8);
184    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
185    return false;
186  }
187
188  if (LocVT == MVT::f64) {
189    static const MCPhysReg ShadowRegList10[] = {
190      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
191    };
192    unsigned Offset11 = State.AllocateStack(8, 8, ShadowRegList10);
193    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
194    return false;
195  }
196
197  if (LocVT == MVT::v2f64) {
198    if (ArgFlags.getOrigAlign() == 16) {
199      static const MCPhysReg ShadowRegList12[] = {
200        ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
201      };
202      unsigned Offset13 = State.AllocateStack(16, 16, ShadowRegList12);
203      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
204      return false;
205    }
206  }
207
208  if (LocVT == MVT::v2f64) {
209    static const MCPhysReg ShadowRegList14[] = {
210      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
211    };
212    unsigned Offset15 = State.AllocateStack(16, 8, ShadowRegList14);
213    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
214    return false;
215  }
216
217  return true;  // CC didn't match.
218}
219
220
221static bool CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
222                             MVT LocVT, CCValAssign::LocInfo LocInfo,
223                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
224
225  if (ArgFlags.isByVal()) {
226    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
227    return false;
228  }
229
230  if (LocVT == MVT::v1i64 ||
231      LocVT == MVT::v2i32 ||
232      LocVT == MVT::v4i16 ||
233      LocVT == MVT::v4f16 ||
234      LocVT == MVT::v8i8 ||
235      LocVT == MVT::v2f32) {
236    LocVT = MVT::f64;
237    LocInfo = CCValAssign::BCvt;
238  }
239
240  if (LocVT == MVT::v2i64 ||
241      LocVT == MVT::v4i32 ||
242      LocVT == MVT::v8i16 ||
243      LocVT == MVT::v8f16 ||
244      LocVT == MVT::v16i8 ||
245      LocVT == MVT::v4f32) {
246    LocVT = MVT::v2f64;
247    LocInfo = CCValAssign::BCvt;
248  }
249
250  if (ArgFlags.isSwiftSelf()) {
251    if (LocVT == MVT::i32) {
252      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
253        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
254        return false;
255      }
256    }
257  }
258
259  if (ArgFlags.isSwiftError()) {
260    if (LocVT == MVT::i32) {
261      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
262        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
263        return false;
264      }
265    }
266  }
267
268  if (ArgFlags.isInConsecutiveRegs()) {
269    if (CC_ARM_AAPCS_Custom_Aggregate(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
270        return false;
271  }
272
273  if (LocVT == MVT::v2f64) {
274    static const MCPhysReg RegList1[] = {
275      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
276    };
277    if (unsigned Reg = State.AllocateReg(RegList1)) {
278      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
279      return false;
280    }
281  }
282
283  if (LocVT == MVT::f64) {
284    static const MCPhysReg RegList2[] = {
285      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
286    };
287    if (unsigned Reg = State.AllocateReg(RegList2)) {
288      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
289      return false;
290    }
291  }
292
293  if (LocVT == MVT::f32) {
294    static const MCPhysReg RegList3[] = {
295      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
296    };
297    if (unsigned Reg = State.AllocateReg(RegList3)) {
298      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
299      return false;
300    }
301  }
302
303  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
304    return false;
305
306  return true;  // CC didn't match.
307}
308
309
310static bool CC_ARM_APCS(unsigned ValNo, MVT ValVT,
311                        MVT LocVT, CCValAssign::LocInfo LocInfo,
312                        ISD::ArgFlagsTy ArgFlags, CCState &State) {
313
314  if (ArgFlags.isByVal()) {
315    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
316    return false;
317  }
318
319  if (LocVT == MVT::i1 ||
320      LocVT == MVT::i8 ||
321      LocVT == MVT::i16) {
322    LocVT = MVT::i32;
323    if (ArgFlags.isSExt())
324        LocInfo = CCValAssign::SExt;
325    else if (ArgFlags.isZExt())
326        LocInfo = CCValAssign::ZExt;
327    else
328        LocInfo = CCValAssign::AExt;
329  }
330
331  if (ArgFlags.isSwiftSelf()) {
332    if (LocVT == MVT::i32) {
333      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
334        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
335        return false;
336      }
337    }
338  }
339
340  if (ArgFlags.isSwiftError()) {
341    if (LocVT == MVT::i32) {
342      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
343        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
344        return false;
345      }
346    }
347  }
348
349  if (LocVT == MVT::v1i64 ||
350      LocVT == MVT::v2i32 ||
351      LocVT == MVT::v4i16 ||
352      LocVT == MVT::v8i8 ||
353      LocVT == MVT::v2f32) {
354    LocVT = MVT::f64;
355    LocInfo = CCValAssign::BCvt;
356  }
357
358  if (LocVT == MVT::v2i64 ||
359      LocVT == MVT::v4i32 ||
360      LocVT == MVT::v8i16 ||
361      LocVT == MVT::v16i8 ||
362      LocVT == MVT::v4f32) {
363    LocVT = MVT::v2f64;
364    LocInfo = CCValAssign::BCvt;
365  }
366
367  if (LocVT == MVT::f64 ||
368      LocVT == MVT::v2f64) {
369    if (CC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
370        return false;
371  }
372
373  if (LocVT == MVT::f32) {
374    LocVT = MVT::i32;
375    LocInfo = CCValAssign::BCvt;
376  }
377
378  if (LocVT == MVT::i32) {
379    static const MCPhysReg RegList1[] = {
380      ARM::R0, ARM::R1, ARM::R2, ARM::R3
381    };
382    if (unsigned Reg = State.AllocateReg(RegList1)) {
383      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
384      return false;
385    }
386  }
387
388  if (LocVT == MVT::i32) {
389    unsigned Offset2 = State.AllocateStack(4, 4);
390    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
391    return false;
392  }
393
394  if (LocVT == MVT::f64) {
395    unsigned Offset3 = State.AllocateStack(8, 4);
396    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
397    return false;
398  }
399
400  if (LocVT == MVT::v2f64) {
401    unsigned Offset4 = State.AllocateStack(16, 4);
402    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
403    return false;
404  }
405
406  return true;  // CC didn't match.
407}
408
409
410static bool CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT,
411                            MVT LocVT, CCValAssign::LocInfo LocInfo,
412                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
413
414  if (LocVT == MVT::v1i64 ||
415      LocVT == MVT::v2i32 ||
416      LocVT == MVT::v4i16 ||
417      LocVT == MVT::v8i8 ||
418      LocVT == MVT::v2f32) {
419    LocVT = MVT::f64;
420    LocInfo = CCValAssign::BCvt;
421  }
422
423  if (LocVT == MVT::v2i64 ||
424      LocVT == MVT::v4i32 ||
425      LocVT == MVT::v8i16 ||
426      LocVT == MVT::v16i8 ||
427      LocVT == MVT::v4f32) {
428    LocVT = MVT::v2f64;
429    LocInfo = CCValAssign::BCvt;
430  }
431
432  if (LocVT == MVT::v2f64) {
433    static const MCPhysReg RegList1[] = {
434      ARM::Q4, ARM::Q5
435    };
436    if (unsigned Reg = State.AllocateReg(RegList1)) {
437      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
438      return false;
439    }
440  }
441
442  if (LocVT == MVT::f64) {
443    static const MCPhysReg RegList2[] = {
444      ARM::D8, ARM::D9, ARM::D10, ARM::D11
445    };
446    if (unsigned Reg = State.AllocateReg(RegList2)) {
447      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
448      return false;
449    }
450  }
451
452  if (LocVT == MVT::f32) {
453    static const MCPhysReg RegList3[] = {
454      ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23
455    };
456    if (unsigned Reg = State.AllocateReg(RegList3)) {
457      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
458      return false;
459    }
460  }
461
462  if (LocVT == MVT::i8 ||
463      LocVT == MVT::i16) {
464    LocVT = MVT::i32;
465    if (ArgFlags.isSExt())
466        LocInfo = CCValAssign::SExt;
467    else if (ArgFlags.isZExt())
468        LocInfo = CCValAssign::ZExt;
469    else
470        LocInfo = CCValAssign::AExt;
471  }
472
473  if (LocVT == MVT::i32) {
474    static const MCPhysReg RegList4[] = {
475      ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11
476    };
477    if (unsigned Reg = State.AllocateReg(RegList4)) {
478      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
479      return false;
480    }
481  }
482
483  return true;  // CC didn't match.
484}
485
486
487static bool FastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
488                            MVT LocVT, CCValAssign::LocInfo LocInfo,
489                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
490
491  if (LocVT == MVT::v1i64 ||
492      LocVT == MVT::v2i32 ||
493      LocVT == MVT::v4i16 ||
494      LocVT == MVT::v8i8 ||
495      LocVT == MVT::v2f32) {
496    LocVT = MVT::f64;
497    LocInfo = CCValAssign::BCvt;
498  }
499
500  if (LocVT == MVT::v2i64 ||
501      LocVT == MVT::v4i32 ||
502      LocVT == MVT::v8i16 ||
503      LocVT == MVT::v16i8 ||
504      LocVT == MVT::v4f32) {
505    LocVT = MVT::v2f64;
506    LocInfo = CCValAssign::BCvt;
507  }
508
509  if (LocVT == MVT::v2f64) {
510    static const MCPhysReg RegList1[] = {
511      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
512    };
513    if (unsigned Reg = State.AllocateReg(RegList1)) {
514      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
515      return false;
516    }
517  }
518
519  if (LocVT == MVT::f64) {
520    static const MCPhysReg RegList2[] = {
521      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
522    };
523    if (unsigned Reg = State.AllocateReg(RegList2)) {
524      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
525      return false;
526    }
527  }
528
529  if (LocVT == MVT::f32) {
530    static const MCPhysReg RegList3[] = {
531      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
532    };
533    if (unsigned Reg = State.AllocateReg(RegList3)) {
534      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
535      return false;
536    }
537  }
538
539  if (LocVT == MVT::f32) {
540    static const MCPhysReg ShadowRegList4[] = {
541      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
542    };
543    unsigned Offset5 = State.AllocateStack(4, 4, ShadowRegList4);
544    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
545    return false;
546  }
547
548  if (LocVT == MVT::f64) {
549    static const MCPhysReg ShadowRegList6[] = {
550      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
551    };
552    unsigned Offset7 = State.AllocateStack(8, 4, ShadowRegList6);
553    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
554    return false;
555  }
556
557  if (LocVT == MVT::v2f64) {
558    static const MCPhysReg ShadowRegList8[] = {
559      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
560    };
561    unsigned Offset9 = State.AllocateStack(16, 4, ShadowRegList8);
562    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
563    return false;
564  }
565
566  if (!CC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
567    return false;
568
569  return true;  // CC didn't match.
570}
571
572
573static bool RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
574                            MVT LocVT, CCValAssign::LocInfo LocInfo,
575                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
576
577  if (LocVT == MVT::v1i64 ||
578      LocVT == MVT::v2i32 ||
579      LocVT == MVT::v4i16 ||
580      LocVT == MVT::v4f16 ||
581      LocVT == MVT::v8i8 ||
582      LocVT == MVT::v2f32) {
583    LocVT = MVT::f64;
584    LocInfo = CCValAssign::BCvt;
585  }
586
587  if (LocVT == MVT::v2i64 ||
588      LocVT == MVT::v4i32 ||
589      LocVT == MVT::v8i16 ||
590      LocVT == MVT::v8f16 ||
591      LocVT == MVT::v16i8 ||
592      LocVT == MVT::v4f32) {
593    LocVT = MVT::v2f64;
594    LocInfo = CCValAssign::BCvt;
595  }
596
597  if (ArgFlags.isSwiftSelf()) {
598    if (LocVT == MVT::i32) {
599      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
600        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
601        return false;
602      }
603    }
604  }
605
606  if (ArgFlags.isSwiftError()) {
607    if (LocVT == MVT::i32) {
608      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
609        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
610        return false;
611      }
612    }
613  }
614
615  if (LocVT == MVT::f64 ||
616      LocVT == MVT::v2f64) {
617    if (RetCC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
618        return false;
619  }
620
621  if (LocVT == MVT::f32) {
622    LocVT = MVT::i32;
623    LocInfo = CCValAssign::BCvt;
624  }
625
626  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
627    return false;
628
629  return true;  // CC didn't match.
630}
631
632
633static bool RetCC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
634                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
635                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
636
637  if (LocVT == MVT::i1 ||
638      LocVT == MVT::i8 ||
639      LocVT == MVT::i16) {
640    LocVT = MVT::i32;
641    if (ArgFlags.isSExt())
642        LocInfo = CCValAssign::SExt;
643    else if (ArgFlags.isZExt())
644        LocInfo = CCValAssign::ZExt;
645    else
646        LocInfo = CCValAssign::AExt;
647  }
648
649  if (LocVT == MVT::i32) {
650    static const MCPhysReg RegList1[] = {
651      ARM::R0, ARM::R1, ARM::R2, ARM::R3
652    };
653    if (unsigned Reg = State.AllocateReg(RegList1)) {
654      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
655      return false;
656    }
657  }
658
659  if (LocVT == MVT::i64) {
660    static const MCPhysReg RegList2[] = {
661      ARM::R0, ARM::R2
662    };
663    static const MCPhysReg RegList3[] = {
664      ARM::R1, ARM::R3
665    };
666    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
667      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
668      return false;
669    }
670  }
671
672  return true;  // CC didn't match.
673}
674
675
676static bool RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
677                                MVT LocVT, CCValAssign::LocInfo LocInfo,
678                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
679
680  if (LocVT == MVT::v1i64 ||
681      LocVT == MVT::v2i32 ||
682      LocVT == MVT::v4i16 ||
683      LocVT == MVT::v4f16 ||
684      LocVT == MVT::v8i8 ||
685      LocVT == MVT::v2f32) {
686    LocVT = MVT::f64;
687    LocInfo = CCValAssign::BCvt;
688  }
689
690  if (LocVT == MVT::v2i64 ||
691      LocVT == MVT::v4i32 ||
692      LocVT == MVT::v8i16 ||
693      LocVT == MVT::v8f16 ||
694      LocVT == MVT::v16i8 ||
695      LocVT == MVT::v4f32) {
696    LocVT = MVT::v2f64;
697    LocInfo = CCValAssign::BCvt;
698  }
699
700  if (ArgFlags.isSwiftSelf()) {
701    if (LocVT == MVT::i32) {
702      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
703        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
704        return false;
705      }
706    }
707  }
708
709  if (ArgFlags.isSwiftError()) {
710    if (LocVT == MVT::i32) {
711      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
712        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
713        return false;
714      }
715    }
716  }
717
718  if (LocVT == MVT::v2f64) {
719    static const MCPhysReg RegList1[] = {
720      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
721    };
722    if (unsigned Reg = State.AllocateReg(RegList1)) {
723      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
724      return false;
725    }
726  }
727
728  if (LocVT == MVT::f64) {
729    static const MCPhysReg RegList2[] = {
730      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
731    };
732    if (unsigned Reg = State.AllocateReg(RegList2)) {
733      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
734      return false;
735    }
736  }
737
738  if (LocVT == MVT::f32) {
739    static const MCPhysReg RegList3[] = {
740      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
741    };
742    if (unsigned Reg = State.AllocateReg(RegList3)) {
743      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
744      return false;
745    }
746  }
747
748  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
749    return false;
750
751  return true;  // CC didn't match.
752}
753
754
755static bool RetCC_ARM_APCS(unsigned ValNo, MVT ValVT,
756                           MVT LocVT, CCValAssign::LocInfo LocInfo,
757                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
758
759  if (LocVT == MVT::i1 ||
760      LocVT == MVT::i8 ||
761      LocVT == MVT::i16) {
762    LocVT = MVT::i32;
763    if (ArgFlags.isSExt())
764        LocInfo = CCValAssign::SExt;
765    else if (ArgFlags.isZExt())
766        LocInfo = CCValAssign::ZExt;
767    else
768        LocInfo = CCValAssign::AExt;
769  }
770
771  if (LocVT == MVT::f32) {
772    LocVT = MVT::i32;
773    LocInfo = CCValAssign::BCvt;
774  }
775
776  if (ArgFlags.isSwiftSelf()) {
777    if (LocVT == MVT::i32) {
778      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
779        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
780        return false;
781      }
782    }
783  }
784
785  if (ArgFlags.isSwiftError()) {
786    if (LocVT == MVT::i32) {
787      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
788        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
789        return false;
790      }
791    }
792  }
793
794  if (LocVT == MVT::v1i64 ||
795      LocVT == MVT::v2i32 ||
796      LocVT == MVT::v4i16 ||
797      LocVT == MVT::v8i8 ||
798      LocVT == MVT::v2f32) {
799    LocVT = MVT::f64;
800    LocInfo = CCValAssign::BCvt;
801  }
802
803  if (LocVT == MVT::v2i64 ||
804      LocVT == MVT::v4i32 ||
805      LocVT == MVT::v8i16 ||
806      LocVT == MVT::v16i8 ||
807      LocVT == MVT::v4f32) {
808    LocVT = MVT::v2f64;
809    LocInfo = CCValAssign::BCvt;
810  }
811
812  if (LocVT == MVT::f64 ||
813      LocVT == MVT::v2f64) {
814    if (RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
815        return false;
816  }
817
818  if (LocVT == MVT::i32) {
819    static const MCPhysReg RegList1[] = {
820      ARM::R0, ARM::R1, ARM::R2, ARM::R3
821    };
822    if (unsigned Reg = State.AllocateReg(RegList1)) {
823      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
824      return false;
825    }
826  }
827
828  if (LocVT == MVT::i64) {
829    static const MCPhysReg RegList2[] = {
830      ARM::R0, ARM::R2
831    };
832    static const MCPhysReg RegList3[] = {
833      ARM::R1, ARM::R3
834    };
835    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
836      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
837      return false;
838    }
839  }
840
841  return true;  // CC didn't match.
842}
843
844
845static bool RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
846                               MVT LocVT, CCValAssign::LocInfo LocInfo,
847                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
848
849  if (LocVT == MVT::v1i64 ||
850      LocVT == MVT::v2i32 ||
851      LocVT == MVT::v4i16 ||
852      LocVT == MVT::v8i8 ||
853      LocVT == MVT::v2f32) {
854    LocVT = MVT::f64;
855    LocInfo = CCValAssign::BCvt;
856  }
857
858  if (LocVT == MVT::v2i64 ||
859      LocVT == MVT::v4i32 ||
860      LocVT == MVT::v8i16 ||
861      LocVT == MVT::v16i8 ||
862      LocVT == MVT::v4f32) {
863    LocVT = MVT::v2f64;
864    LocInfo = CCValAssign::BCvt;
865  }
866
867  if (LocVT == MVT::v2f64) {
868    static const MCPhysReg RegList1[] = {
869      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
870    };
871    if (unsigned Reg = State.AllocateReg(RegList1)) {
872      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
873      return false;
874    }
875  }
876
877  if (LocVT == MVT::f64) {
878    static const MCPhysReg RegList2[] = {
879      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
880    };
881    if (unsigned Reg = State.AllocateReg(RegList2)) {
882      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
883      return false;
884    }
885  }
886
887  if (LocVT == MVT::f32) {
888    static const MCPhysReg RegList3[] = {
889      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
890    };
891    if (unsigned Reg = State.AllocateReg(RegList3)) {
892      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
893      return false;
894    }
895  }
896
897  if (!RetCC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
898    return false;
899
900  return true;  // CC didn't match.
901}
902