1 //===- TargetSubtargetInfo.cpp - General Target Information ----------------==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file This file describes the general parts of a Subtarget.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "llvm/CodeGen/TargetSubtargetInfo.h"
15 #include "llvm/ADT/Optional.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/CodeGen/TargetInstrInfo.h"
18 #include "llvm/CodeGen/TargetSchedule.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/Support/Format.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include <string>
23
24 using namespace llvm;
25
TargetSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS,ArrayRef<SubtargetFeatureKV> PF,ArrayRef<SubtargetFeatureKV> PD,const SubtargetInfoKV * ProcSched,const MCWriteProcResEntry * WPR,const MCWriteLatencyEntry * WL,const MCReadAdvanceEntry * RA,const InstrStage * IS,const unsigned * OC,const unsigned * FP)26 TargetSubtargetInfo::TargetSubtargetInfo(
27 const Triple &TT, StringRef CPU, StringRef FS,
28 ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD,
29 const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR,
30 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
31 const InstrStage *IS, const unsigned *OC, const unsigned *FP)
32 : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) {
33 }
34
35 TargetSubtargetInfo::~TargetSubtargetInfo() = default;
36
enableAtomicExpand() const37 bool TargetSubtargetInfo::enableAtomicExpand() const {
38 return true;
39 }
40
enableIndirectBrExpand() const41 bool TargetSubtargetInfo::enableIndirectBrExpand() const {
42 return false;
43 }
44
enableMachineScheduler() const45 bool TargetSubtargetInfo::enableMachineScheduler() const {
46 return false;
47 }
48
enableJoinGlobalCopies() const49 bool TargetSubtargetInfo::enableJoinGlobalCopies() const {
50 return enableMachineScheduler();
51 }
52
enableRALocalReassignment(CodeGenOpt::Level OptLevel) const53 bool TargetSubtargetInfo::enableRALocalReassignment(
54 CodeGenOpt::Level OptLevel) const {
55 return true;
56 }
57
enableAdvancedRASplitCost() const58 bool TargetSubtargetInfo::enableAdvancedRASplitCost() const {
59 return false;
60 }
61
enablePostRAScheduler() const62 bool TargetSubtargetInfo::enablePostRAScheduler() const {
63 return getSchedModel().PostRAScheduler;
64 }
65
useAA() const66 bool TargetSubtargetInfo::useAA() const {
67 return false;
68 }
69
createSchedInfoStr(unsigned Latency,double RThroughput)70 static std::string createSchedInfoStr(unsigned Latency, double RThroughput) {
71 static const char *SchedPrefix = " sched: [";
72 std::string Comment;
73 raw_string_ostream CS(Comment);
74 if (RThroughput != 0.0)
75 CS << SchedPrefix << Latency << format(":%2.2f", RThroughput)
76 << "]";
77 else
78 CS << SchedPrefix << Latency << ":?]";
79 CS.flush();
80 return Comment;
81 }
82
83 /// Returns string representation of scheduler comment
getSchedInfoStr(const MachineInstr & MI) const84 std::string TargetSubtargetInfo::getSchedInfoStr(const MachineInstr &MI) const {
85 if (MI.isPseudo() || MI.isTerminator())
86 return std::string();
87 // We don't cache TSchedModel because it depends on TargetInstrInfo
88 // that could be changed during the compilation
89 TargetSchedModel TSchedModel;
90 TSchedModel.init(this);
91 unsigned Latency = TSchedModel.computeInstrLatency(&MI);
92 double RThroughput = TSchedModel.computeReciprocalThroughput(&MI);
93 return createSchedInfoStr(Latency, RThroughput);
94 }
95
96 /// Returns string representation of scheduler comment
getSchedInfoStr(MCInst const & MCI) const97 std::string TargetSubtargetInfo::getSchedInfoStr(MCInst const &MCI) const {
98 // We don't cache TSchedModel because it depends on TargetInstrInfo
99 // that could be changed during the compilation
100 TargetSchedModel TSchedModel;
101 TSchedModel.init(this);
102 unsigned Latency;
103 if (TSchedModel.hasInstrSchedModel())
104 Latency = TSchedModel.computeInstrLatency(MCI);
105 else if (TSchedModel.hasInstrItineraries()) {
106 auto *ItinData = TSchedModel.getInstrItineraries();
107 Latency = ItinData->getStageLatency(
108 getInstrInfo()->get(MCI.getOpcode()).getSchedClass());
109 } else
110 return std::string();
111 double RThroughput = TSchedModel.computeReciprocalThroughput(MCI);
112 return createSchedInfoStr(Latency, RThroughput);
113 }
114
mirFileLoaded(MachineFunction & MF) const115 void TargetSubtargetInfo::mirFileLoaded(MachineFunction &MF) const {
116 }
117