1 //===--- HexagonHazardRecognizer.h - Hexagon Post RA Hazard Recognizer ----===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // This file defines the hazard recognizer for scheduling on Hexagon. 10 //===----------------------------------------------------------------------===// 11 12 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H 13 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H 14 15 #include "HexagonInstrInfo.h" 16 #include "HexagonSubtarget.h" 17 #include "llvm/ADT/SmallSet.h" 18 #include "llvm/CodeGen/DFAPacketizer.h" 19 #include "llvm/CodeGen/ScheduleHazardRecognizer.h" 20 21 namespace llvm { 22 23 class HexagonHazardRecognizer : public ScheduleHazardRecognizer { 24 DFAPacketizer *Resources; 25 const HexagonInstrInfo *TII; 26 unsigned PacketNum = 0; 27 // If the packet contains a potential dot cur instruction. This is 28 // used for the scheduling priority function. 29 SUnit *UsesDotCur = nullptr; 30 // The packet number when a dor cur is emitted. If its use is not generated 31 // in the same packet, then try to wait another cycle before emitting. 32 int DotCurPNum = -1; 33 // Does the packet contain a load. Used to restrict another load, if possible. 34 bool UsesLoad = false; 35 // Check if we should prefer a vector store that will become a .new version. 36 // The .new store uses different resources than a normal store, and the 37 // packetizer will not generate the .new if the regular store does not have 38 // resources available (even if the .new version does). To help, the schedule 39 // attempts to schedule the .new as soon as possible in the packet. 40 SUnit *PrefVectorStoreNew = nullptr; 41 // The set of registers defined by instructions in the current packet. 42 SmallSet<unsigned, 8> RegDefs; 43 44 public: HexagonHazardRecognizer(const InstrItineraryData * II,const HexagonInstrInfo * HII,const HexagonSubtarget & ST)45 HexagonHazardRecognizer(const InstrItineraryData *II, 46 const HexagonInstrInfo *HII, 47 const HexagonSubtarget &ST) 48 : Resources(ST.createDFAPacketizer(II)), TII(HII) { } 49 ~HexagonHazardRecognizer()50 ~HexagonHazardRecognizer() override { 51 if (Resources) 52 delete Resources; 53 } 54 55 /// This callback is invoked when a new block of instructions is about to be 56 /// scheduled. The hazard state is set to an initialized state. 57 void Reset() override; 58 59 /// Return the hazard type of emitting this node. There are three 60 /// possible results. Either: 61 /// * NoHazard: it is legal to issue this instruction on this cycle. 62 /// * Hazard: issuing this instruction would stall the machine. If some 63 /// other instruction is available, issue it first. 64 HazardType getHazardType(SUnit *SU, int stalls) override; 65 66 /// This callback is invoked when an instruction is emitted to be scheduled, 67 /// to advance the hazard state. 68 void EmitInstruction(SUnit *) override; 69 70 /// This callback may be invoked if getHazardType returns NoHazard. If, even 71 /// though there is no hazard, it would be better to schedule another 72 /// available instruction, this callback should return true. 73 bool ShouldPreferAnother(SUnit *) override; 74 75 /// This callback is invoked whenever the next top-down instruction to be 76 /// scheduled cannot issue in the current cycle, either because of latency 77 /// or resource conflicts. This should increment the internal state of the 78 /// hazard recognizer so that previously "Hazard" instructions will now not 79 /// be hazards. 80 void AdvanceCycle() override; 81 }; 82 83 } // end namespace llvm 84 85 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H 86