1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file declares WebAssembly-specific per-machine-function
12 /// information.
13 ///
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
18 
19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 
22 namespace llvm {
23 
24 /// This class is derived from MachineFunctionInfo and contains private
25 /// WebAssembly-specific information for each MachineFunction.
26 class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
27   MachineFunction &MF;
28 
29   std::vector<MVT> Params;
30   std::vector<MVT> Results;
31   std::vector<MVT> Locals;
32 
33   /// A mapping from CodeGen vreg index to WebAssembly register number.
34   std::vector<unsigned> WARegs;
35 
36   /// A mapping from CodeGen vreg index to a boolean value indicating whether
37   /// the given register is considered to be "stackified", meaning it has been
38   /// determined or made to meet the stack requirements:
39   ///   - single use (per path)
40   ///   - single def (per path)
41   ///   - defined and used in LIFO order with other stack registers
42   BitVector VRegStackified;
43 
44   // A virtual register holding the pointer to the vararg buffer for vararg
45   // functions. It is created and set in TLI::LowerFormalArguments and read by
46   // TLI::LowerVASTART
47   unsigned VarargVreg = -1U;
48 
49   // A virtual register holding the base pointer for functions that have
50   // overaligned values on the user stack.
51   unsigned BasePtrVreg = -1U;
52 
53  public:
WebAssemblyFunctionInfo(MachineFunction & MF)54   explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
55   ~WebAssemblyFunctionInfo() override;
56 
addParam(MVT VT)57   void addParam(MVT VT) { Params.push_back(VT); }
getParams()58   const std::vector<MVT> &getParams() const { return Params; }
59 
addResult(MVT VT)60   void addResult(MVT VT) { Results.push_back(VT); }
getResults()61   const std::vector<MVT> &getResults() const { return Results; }
62 
clearParamsAndResults()63   void clearParamsAndResults() { Params.clear(); Results.clear(); }
64 
setNumLocals(size_t NumLocals)65   void setNumLocals(size_t NumLocals) { Locals.resize(NumLocals, MVT::i32); }
setLocal(size_t i,MVT VT)66   void setLocal(size_t i, MVT VT) { Locals[i] = VT; }
addLocal(MVT VT)67   void addLocal(MVT VT) { Locals.push_back(VT); }
getLocals()68   const std::vector<MVT> &getLocals() const { return Locals; }
69 
getVarargBufferVreg()70   unsigned getVarargBufferVreg() const {
71     assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
72     return VarargVreg;
73   }
setVarargBufferVreg(unsigned Reg)74   void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
75 
getBasePointerVreg()76   unsigned getBasePointerVreg() const {
77     assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set");
78     return BasePtrVreg;
79   }
setBasePointerVreg(unsigned Reg)80   void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; }
81 
82   static const unsigned UnusedReg = -1u;
83 
stackifyVReg(unsigned VReg)84   void stackifyVReg(unsigned VReg) {
85     assert(MF.getRegInfo().getUniqueVRegDef(VReg));
86     auto I = TargetRegisterInfo::virtReg2Index(VReg);
87     if (I >= VRegStackified.size())
88       VRegStackified.resize(I + 1);
89     VRegStackified.set(I);
90   }
isVRegStackified(unsigned VReg)91   bool isVRegStackified(unsigned VReg) const {
92     auto I = TargetRegisterInfo::virtReg2Index(VReg);
93     if (I >= VRegStackified.size())
94       return false;
95     return VRegStackified.test(I);
96   }
97 
98   void initWARegs();
setWAReg(unsigned VReg,unsigned WAReg)99   void setWAReg(unsigned VReg, unsigned WAReg) {
100     assert(WAReg != UnusedReg);
101     auto I = TargetRegisterInfo::virtReg2Index(VReg);
102     assert(I < WARegs.size());
103     WARegs[I] = WAReg;
104   }
getWAReg(unsigned VReg)105   unsigned getWAReg(unsigned VReg) const {
106     auto I = TargetRegisterInfo::virtReg2Index(VReg);
107     assert(I < WARegs.size());
108     return WARegs[I];
109   }
110 
111   // For a given stackified WAReg, return the id number to print with push/pop.
getWARegStackId(unsigned Reg)112   static unsigned getWARegStackId(unsigned Reg) {
113     assert(Reg & INT32_MIN);
114     return Reg & INT32_MAX;
115   }
116 };
117 
118 void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM,
119                           Type *Ty, SmallVectorImpl<MVT> &ValueVTs);
120 
121 void ComputeSignatureVTs(const Function &F, const TargetMachine &TM,
122                          SmallVectorImpl<MVT> &Params,
123                          SmallVectorImpl<MVT> &Results);
124 
125 } // end namespace llvm
126 
127 #endif
128