1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2
3; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse4.2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42
4; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1
5; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2
6; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f | FileCheck %s -check-prefixes=CHECK,AVX512,AVX512F
7; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s -check-prefixes=CHECK,AVX512,AVX512BW
8; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512vl,+avx512bw,+avx512dq,+avx512cd | FileCheck %s -check-prefixes=CHECK,AVX512CD
9
10; Verify the cost of scalar leading zero count instructions.
11
12declare i64 @llvm.ctlz.i64(i64, i1)
13declare i32 @llvm.ctlz.i32(i32, i1)
14declare i16 @llvm.ctlz.i16(i16, i1)
15declare  i8 @llvm.ctlz.i8(i8, i1)
16
17define i64 @var_ctlz_i64(i64 %a) {
18; CHECK-LABEL: 'var_ctlz_i64'
19; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 false)
20; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz
21;
22  %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 0)
23  ret i64 %ctlz
24}
25
26define i64 @var_ctlz_i64u(i64 %a) {
27; CHECK-LABEL: 'var_ctlz_i64u'
28; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 true)
29; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz
30;
31  %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 1)
32  ret i64 %ctlz
33}
34
35define i32 @var_ctlz_i32(i32 %a) {
36; CHECK-LABEL: 'var_ctlz_i32'
37; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 false)
38; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz
39;
40  %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 0)
41  ret i32 %ctlz
42}
43
44define i32 @var_ctlz_i32u(i32 %a) {
45; CHECK-LABEL: 'var_ctlz_i32u'
46; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 true)
47; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz
48;
49  %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 1)
50  ret i32 %ctlz
51}
52
53define i16 @var_ctlz_i16(i16 %a) {
54; CHECK-LABEL: 'var_ctlz_i16'
55; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 false)
56; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz
57;
58  %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 0)
59  ret i16 %ctlz
60}
61
62define i16 @var_ctlz_i16u(i16 %a) {
63; CHECK-LABEL: 'var_ctlz_i16u'
64; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 true)
65; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz
66;
67  %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 1)
68  ret i16 %ctlz
69}
70
71define i8 @var_ctlz_i8(i8 %a) {
72; CHECK-LABEL: 'var_ctlz_i8'
73; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 false)
74; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz
75;
76  %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 0)
77  ret i8 %ctlz
78}
79
80define i8 @var_ctlz_i8u(i8 %a) {
81; CHECK-LABEL: 'var_ctlz_i8u'
82; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 true)
83; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz
84;
85  %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 1)
86  ret i8 %ctlz
87}
88
89; Verify the cost of vector leading zero count instructions.
90
91declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
92declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1)
93declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1)
94declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1)
95
96declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>, i1)
97declare <8 x i32> @llvm.ctlz.v8i32(<8 x i32>, i1)
98declare <16 x i16> @llvm.ctlz.v16i16(<16 x i16>, i1)
99declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1)
100
101declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1)
102declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1)
103declare <32 x i16> @llvm.ctlz.v32i16(<32 x i16>, i1)
104declare <64 x i8> @llvm.ctlz.v64i8(<64 x i8>, i1)
105
106define <2 x i64> @var_ctlz_v2i64(<2 x i64> %a) {
107; SSE2-LABEL: 'var_ctlz_v2i64'
108; SSE2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
109; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
110;
111; SSE42-LABEL: 'var_ctlz_v2i64'
112; SSE42-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
113; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
114;
115; AVX-LABEL: 'var_ctlz_v2i64'
116; AVX-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
117; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
118;
119; AVX512-LABEL: 'var_ctlz_v2i64'
120; AVX512-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
121; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
122;
123; AVX512CD-LABEL: 'var_ctlz_v2i64'
124; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
125; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
126;
127  %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 0)
128  ret <2 x i64> %ctlz
129}
130
131define <2 x i64> @var_ctlz_v2i64u(<2 x i64> %a) {
132; SSE2-LABEL: 'var_ctlz_v2i64u'
133; SSE2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
134; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
135;
136; SSE42-LABEL: 'var_ctlz_v2i64u'
137; SSE42-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
138; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
139;
140; AVX-LABEL: 'var_ctlz_v2i64u'
141; AVX-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
142; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
143;
144; AVX512-LABEL: 'var_ctlz_v2i64u'
145; AVX512-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
146; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
147;
148; AVX512CD-LABEL: 'var_ctlz_v2i64u'
149; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
150; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
151;
152  %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 1)
153  ret <2 x i64> %ctlz
154}
155
156define <4 x i64> @var_ctlz_v4i64(<4 x i64> %a) {
157; SSE2-LABEL: 'var_ctlz_v4i64'
158; SSE2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
159; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
160;
161; SSE42-LABEL: 'var_ctlz_v4i64'
162; SSE42-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
163; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
164;
165; AVX1-LABEL: 'var_ctlz_v4i64'
166; AVX1-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
167; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
168;
169; AVX2-LABEL: 'var_ctlz_v4i64'
170; AVX2-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
171; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
172;
173; AVX512-LABEL: 'var_ctlz_v4i64'
174; AVX512-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
175; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
176;
177; AVX512CD-LABEL: 'var_ctlz_v4i64'
178; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
179; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
180;
181  %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 0)
182  ret <4 x i64> %ctlz
183}
184
185define <4 x i64> @var_ctlz_v4i64u(<4 x i64> %a) {
186; SSE2-LABEL: 'var_ctlz_v4i64u'
187; SSE2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
188; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
189;
190; SSE42-LABEL: 'var_ctlz_v4i64u'
191; SSE42-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
192; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
193;
194; AVX1-LABEL: 'var_ctlz_v4i64u'
195; AVX1-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
196; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
197;
198; AVX2-LABEL: 'var_ctlz_v4i64u'
199; AVX2-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
200; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
201;
202; AVX512-LABEL: 'var_ctlz_v4i64u'
203; AVX512-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
204; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
205;
206; AVX512CD-LABEL: 'var_ctlz_v4i64u'
207; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
208; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
209;
210  %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 1)
211  ret <4 x i64> %ctlz
212}
213
214define <8 x i64> @var_ctlz_v8i64(<8 x i64> %a) {
215; SSE2-LABEL: 'var_ctlz_v8i64'
216; SSE2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
217; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
218;
219; SSE42-LABEL: 'var_ctlz_v8i64'
220; SSE42-NEXT:  Cost Model: Found an estimated cost of 92 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
221; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
222;
223; AVX1-LABEL: 'var_ctlz_v8i64'
224; AVX1-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
225; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
226;
227; AVX2-LABEL: 'var_ctlz_v8i64'
228; AVX2-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
229; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
230;
231; AVX512F-LABEL: 'var_ctlz_v8i64'
232; AVX512F-NEXT:  Cost Model: Found an estimated cost of 29 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
233; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
234;
235; AVX512BW-LABEL: 'var_ctlz_v8i64'
236; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
237; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
238;
239; AVX512CD-LABEL: 'var_ctlz_v8i64'
240; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
241; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
242;
243  %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 0)
244  ret <8 x i64> %ctlz
245}
246
247define <8 x i64> @var_ctlz_v8i64u(<8 x i64> %a) {
248; SSE2-LABEL: 'var_ctlz_v8i64u'
249; SSE2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
250; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
251;
252; SSE42-LABEL: 'var_ctlz_v8i64u'
253; SSE42-NEXT:  Cost Model: Found an estimated cost of 92 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
254; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
255;
256; AVX1-LABEL: 'var_ctlz_v8i64u'
257; AVX1-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
258; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
259;
260; AVX2-LABEL: 'var_ctlz_v8i64u'
261; AVX2-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
262; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
263;
264; AVX512F-LABEL: 'var_ctlz_v8i64u'
265; AVX512F-NEXT:  Cost Model: Found an estimated cost of 29 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
266; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
267;
268; AVX512BW-LABEL: 'var_ctlz_v8i64u'
269; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
270; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
271;
272; AVX512CD-LABEL: 'var_ctlz_v8i64u'
273; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
274; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
275;
276  %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 1)
277  ret <8 x i64> %ctlz
278}
279
280define <4 x i32> @var_ctlz_v4i32(<4 x i32> %a) {
281; SSE2-LABEL: 'var_ctlz_v4i32'
282; SSE2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
283; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
284;
285; SSE42-LABEL: 'var_ctlz_v4i32'
286; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
287; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
288;
289; AVX-LABEL: 'var_ctlz_v4i32'
290; AVX-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
291; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
292;
293; AVX512-LABEL: 'var_ctlz_v4i32'
294; AVX512-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
295; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
296;
297; AVX512CD-LABEL: 'var_ctlz_v4i32'
298; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
299; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
300;
301  %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 0)
302  ret <4 x i32> %ctlz
303}
304
305define <4 x i32> @var_ctlz_v4i32u(<4 x i32> %a) {
306; SSE2-LABEL: 'var_ctlz_v4i32u'
307; SSE2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
308; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
309;
310; SSE42-LABEL: 'var_ctlz_v4i32u'
311; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
312; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
313;
314; AVX-LABEL: 'var_ctlz_v4i32u'
315; AVX-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
316; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
317;
318; AVX512-LABEL: 'var_ctlz_v4i32u'
319; AVX512-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
320; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
321;
322; AVX512CD-LABEL: 'var_ctlz_v4i32u'
323; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
324; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
325;
326  %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 1)
327  ret <4 x i32> %ctlz
328}
329
330define <8 x i32> @var_ctlz_v8i32(<8 x i32> %a) {
331; SSE2-LABEL: 'var_ctlz_v8i32'
332; SSE2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
333; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
334;
335; SSE42-LABEL: 'var_ctlz_v8i32'
336; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
337; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
338;
339; AVX1-LABEL: 'var_ctlz_v8i32'
340; AVX1-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
341; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
342;
343; AVX2-LABEL: 'var_ctlz_v8i32'
344; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
345; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
346;
347; AVX512-LABEL: 'var_ctlz_v8i32'
348; AVX512-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
349; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
350;
351; AVX512CD-LABEL: 'var_ctlz_v8i32'
352; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
353; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
354;
355  %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 0)
356  ret <8 x i32> %ctlz
357}
358
359define <8 x i32> @var_ctlz_v8i32u(<8 x i32> %a) {
360; SSE2-LABEL: 'var_ctlz_v8i32u'
361; SSE2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
362; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
363;
364; SSE42-LABEL: 'var_ctlz_v8i32u'
365; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
366; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
367;
368; AVX1-LABEL: 'var_ctlz_v8i32u'
369; AVX1-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
370; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
371;
372; AVX2-LABEL: 'var_ctlz_v8i32u'
373; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
374; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
375;
376; AVX512-LABEL: 'var_ctlz_v8i32u'
377; AVX512-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
378; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
379;
380; AVX512CD-LABEL: 'var_ctlz_v8i32u'
381; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
382; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
383;
384  %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 1)
385  ret <8 x i32> %ctlz
386}
387
388define <16 x i32> @var_ctlz_v16i32(<16 x i32> %a) {
389; SSE2-LABEL: 'var_ctlz_v16i32'
390; SSE2-NEXT:  Cost Model: Found an estimated cost of 104 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
391; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
392;
393; SSE42-LABEL: 'var_ctlz_v16i32'
394; SSE42-NEXT:  Cost Model: Found an estimated cost of 72 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
395; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
396;
397; AVX1-LABEL: 'var_ctlz_v16i32'
398; AVX1-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
399; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
400;
401; AVX2-LABEL: 'var_ctlz_v16i32'
402; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
403; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
404;
405; AVX512F-LABEL: 'var_ctlz_v16i32'
406; AVX512F-NEXT:  Cost Model: Found an estimated cost of 35 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
407; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
408;
409; AVX512BW-LABEL: 'var_ctlz_v16i32'
410; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
411; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
412;
413; AVX512CD-LABEL: 'var_ctlz_v16i32'
414; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
415; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
416;
417  %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 0)
418  ret <16 x i32> %ctlz
419}
420
421define <16 x i32> @var_ctlz_v16i32u(<16 x i32> %a) {
422; SSE2-LABEL: 'var_ctlz_v16i32u'
423; SSE2-NEXT:  Cost Model: Found an estimated cost of 104 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
424; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
425;
426; SSE42-LABEL: 'var_ctlz_v16i32u'
427; SSE42-NEXT:  Cost Model: Found an estimated cost of 72 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
428; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
429;
430; AVX1-LABEL: 'var_ctlz_v16i32u'
431; AVX1-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
432; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
433;
434; AVX2-LABEL: 'var_ctlz_v16i32u'
435; AVX2-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
436; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
437;
438; AVX512F-LABEL: 'var_ctlz_v16i32u'
439; AVX512F-NEXT:  Cost Model: Found an estimated cost of 35 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
440; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
441;
442; AVX512BW-LABEL: 'var_ctlz_v16i32u'
443; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
444; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
445;
446; AVX512CD-LABEL: 'var_ctlz_v16i32u'
447; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
448; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
449;
450  %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 1)
451  ret <16 x i32> %ctlz
452}
453
454define <8 x i16> @var_ctlz_v8i16(<8 x i16> %a) {
455; SSE2-LABEL: 'var_ctlz_v8i16'
456; SSE2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
457; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
458;
459; SSE42-LABEL: 'var_ctlz_v8i16'
460; SSE42-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
461; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
462;
463; AVX-LABEL: 'var_ctlz_v8i16'
464; AVX-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
465; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
466;
467; AVX512-LABEL: 'var_ctlz_v8i16'
468; AVX512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
469; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
470;
471; AVX512CD-LABEL: 'var_ctlz_v8i16'
472; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
473; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
474;
475  %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 0)
476  ret <8 x i16> %ctlz
477}
478
479define <8 x i16> @var_ctlz_v8i16u(<8 x i16> %a) {
480; SSE2-LABEL: 'var_ctlz_v8i16u'
481; SSE2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
482; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
483;
484; SSE42-LABEL: 'var_ctlz_v8i16u'
485; SSE42-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
486; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
487;
488; AVX-LABEL: 'var_ctlz_v8i16u'
489; AVX-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
490; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
491;
492; AVX512-LABEL: 'var_ctlz_v8i16u'
493; AVX512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
494; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
495;
496; AVX512CD-LABEL: 'var_ctlz_v8i16u'
497; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
498; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
499;
500  %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 1)
501  ret <8 x i16> %ctlz
502}
503
504define <16 x i16> @var_ctlz_v16i16(<16 x i16> %a) {
505; SSE2-LABEL: 'var_ctlz_v16i16'
506; SSE2-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
507; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
508;
509; SSE42-LABEL: 'var_ctlz_v16i16'
510; SSE42-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
511; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
512;
513; AVX1-LABEL: 'var_ctlz_v16i16'
514; AVX1-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
515; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
516;
517; AVX2-LABEL: 'var_ctlz_v16i16'
518; AVX2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
519; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
520;
521; AVX512-LABEL: 'var_ctlz_v16i16'
522; AVX512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
523; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
524;
525; AVX512CD-LABEL: 'var_ctlz_v16i16'
526; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
527; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
528;
529  %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 0)
530  ret <16 x i16> %ctlz
531}
532
533define <16 x i16> @var_ctlz_v16i16u(<16 x i16> %a) {
534; SSE2-LABEL: 'var_ctlz_v16i16u'
535; SSE2-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
536; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
537;
538; SSE42-LABEL: 'var_ctlz_v16i16u'
539; SSE42-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
540; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
541;
542; AVX1-LABEL: 'var_ctlz_v16i16u'
543; AVX1-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
544; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
545;
546; AVX2-LABEL: 'var_ctlz_v16i16u'
547; AVX2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
548; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
549;
550; AVX512-LABEL: 'var_ctlz_v16i16u'
551; AVX512-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
552; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
553;
554; AVX512CD-LABEL: 'var_ctlz_v16i16u'
555; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
556; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
557;
558  %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 1)
559  ret <16 x i16> %ctlz
560}
561
562define <32 x i16> @var_ctlz_v32i16(<32 x i16> %a) {
563; SSE2-LABEL: 'var_ctlz_v32i16'
564; SSE2-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
565; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
566;
567; SSE42-LABEL: 'var_ctlz_v32i16'
568; SSE42-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
569; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
570;
571; AVX1-LABEL: 'var_ctlz_v32i16'
572; AVX1-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
573; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
574;
575; AVX2-LABEL: 'var_ctlz_v32i16'
576; AVX2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
577; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
578;
579; AVX512F-LABEL: 'var_ctlz_v32i16'
580; AVX512F-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
581; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
582;
583; AVX512BW-LABEL: 'var_ctlz_v32i16'
584; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
585; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
586;
587; AVX512CD-LABEL: 'var_ctlz_v32i16'
588; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
589; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
590;
591  %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 0)
592  ret <32 x i16> %ctlz
593}
594
595define <32 x i16> @var_ctlz_v32i16u(<32 x i16> %a) {
596; SSE2-LABEL: 'var_ctlz_v32i16u'
597; SSE2-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
598; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
599;
600; SSE42-LABEL: 'var_ctlz_v32i16u'
601; SSE42-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
602; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
603;
604; AVX1-LABEL: 'var_ctlz_v32i16u'
605; AVX1-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
606; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
607;
608; AVX2-LABEL: 'var_ctlz_v32i16u'
609; AVX2-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
610; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
611;
612; AVX512F-LABEL: 'var_ctlz_v32i16u'
613; AVX512F-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
614; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
615;
616; AVX512BW-LABEL: 'var_ctlz_v32i16u'
617; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
618; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
619;
620; AVX512CD-LABEL: 'var_ctlz_v32i16u'
621; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
622; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
623;
624  %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 1)
625  ret <32 x i16> %ctlz
626}
627
628define <16 x i8> @var_ctlz_v16i8(<16 x i8> %a) {
629; SSE2-LABEL: 'var_ctlz_v16i8'
630; SSE2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
631; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
632;
633; SSE42-LABEL: 'var_ctlz_v16i8'
634; SSE42-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
635; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
636;
637; AVX-LABEL: 'var_ctlz_v16i8'
638; AVX-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
639; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
640;
641; AVX512-LABEL: 'var_ctlz_v16i8'
642; AVX512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
643; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
644;
645; AVX512CD-LABEL: 'var_ctlz_v16i8'
646; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
647; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
648;
649  %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 0)
650  ret <16 x i8> %ctlz
651}
652
653define <16 x i8> @var_ctlz_v16i8u(<16 x i8> %a) {
654; SSE2-LABEL: 'var_ctlz_v16i8u'
655; SSE2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
656; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
657;
658; SSE42-LABEL: 'var_ctlz_v16i8u'
659; SSE42-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
660; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
661;
662; AVX-LABEL: 'var_ctlz_v16i8u'
663; AVX-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
664; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
665;
666; AVX512-LABEL: 'var_ctlz_v16i8u'
667; AVX512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
668; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
669;
670; AVX512CD-LABEL: 'var_ctlz_v16i8u'
671; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
672; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
673;
674  %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 1)
675  ret <16 x i8> %ctlz
676}
677
678define <32 x i8> @var_ctlz_v32i8(<32 x i8> %a) {
679; SSE2-LABEL: 'var_ctlz_v32i8'
680; SSE2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
681; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
682;
683; SSE42-LABEL: 'var_ctlz_v32i8'
684; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
685; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
686;
687; AVX1-LABEL: 'var_ctlz_v32i8'
688; AVX1-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
689; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
690;
691; AVX2-LABEL: 'var_ctlz_v32i8'
692; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
693; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
694;
695; AVX512-LABEL: 'var_ctlz_v32i8'
696; AVX512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
697; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
698;
699; AVX512CD-LABEL: 'var_ctlz_v32i8'
700; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
701; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
702;
703  %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0)
704  ret <32 x i8> %ctlz
705}
706
707define <32 x i8> @var_ctlz_v32i8u(<32 x i8> %a) {
708; SSE2-LABEL: 'var_ctlz_v32i8u'
709; SSE2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
710; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
711;
712; SSE42-LABEL: 'var_ctlz_v32i8u'
713; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
714; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
715;
716; AVX1-LABEL: 'var_ctlz_v32i8u'
717; AVX1-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
718; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
719;
720; AVX2-LABEL: 'var_ctlz_v32i8u'
721; AVX2-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
722; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
723;
724; AVX512-LABEL: 'var_ctlz_v32i8u'
725; AVX512-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
726; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
727;
728; AVX512CD-LABEL: 'var_ctlz_v32i8u'
729; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
730; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
731;
732  %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1)
733  ret <32 x i8> %ctlz
734}
735
736define <64 x i8> @var_ctlz_v64i8(<64 x i8> %a) {
737; SSE2-LABEL: 'var_ctlz_v64i8'
738; SSE2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
739; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
740;
741; SSE42-LABEL: 'var_ctlz_v64i8'
742; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
743; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
744;
745; AVX1-LABEL: 'var_ctlz_v64i8'
746; AVX1-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
747; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
748;
749; AVX2-LABEL: 'var_ctlz_v64i8'
750; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
751; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
752;
753; AVX512F-LABEL: 'var_ctlz_v64i8'
754; AVX512F-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
755; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
756;
757; AVX512BW-LABEL: 'var_ctlz_v64i8'
758; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
759; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
760;
761; AVX512CD-LABEL: 'var_ctlz_v64i8'
762; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
763; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
764;
765  %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 0)
766  ret <64 x i8> %ctlz
767}
768
769define <64 x i8> @var_ctlz_v64i8u(<64 x i8> %a) {
770; SSE2-LABEL: 'var_ctlz_v64i8u'
771; SSE2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
772; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
773;
774; SSE42-LABEL: 'var_ctlz_v64i8u'
775; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
776; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
777;
778; AVX1-LABEL: 'var_ctlz_v64i8u'
779; AVX1-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
780; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
781;
782; AVX2-LABEL: 'var_ctlz_v64i8u'
783; AVX2-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
784; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
785;
786; AVX512F-LABEL: 'var_ctlz_v64i8u'
787; AVX512F-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
788; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
789;
790; AVX512BW-LABEL: 'var_ctlz_v64i8u'
791; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
792; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
793;
794; AVX512CD-LABEL: 'var_ctlz_v64i8u'
795; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
796; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
797;
798  %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 1)
799  ret <64 x i8> %ctlz
800}
801