1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3---
4name:            mul_i64_sext_imm32
5legalized:       true
6regBankSelected: true
7
8registers:
9  - { id: 0, class: gpr }
10  - { id: 1, class: gpr }
11  - { id: 2, class: gpr }
12  - { id: 3, class: gpr }
13
14body:             |
15  bb.0:
16    liveins: $w0
17
18    ; Make sure InstructionSelector is able to match a pattern
19    ; with an SDNodeXForm, trunc_imm.
20    ; def : Pat<(i64 (mul (sext GPR32:$Rn), (s64imm_32bit:$C))),
21    ;             (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), XZR)>;
22    ; CHECK-LABEL: name: mul_i64_sext_imm32
23    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
24    ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 3
25    ; CHECK: [[SMADDLrrr:%[0-9]+]]:gpr64 = SMADDLrrr [[COPY]], [[MOVi32imm]], $xzr
26    ; CHECK: $x0 = COPY [[SMADDLrrr]]
27    %0:gpr(s32) = COPY $w0
28    %1:gpr(s64) = G_SEXT %0(s32)
29    %2:gpr(s64) = G_CONSTANT i64 3
30    %3:gpr(s64) = G_MUL %1, %2
31    $x0 = COPY %3(s64)
32...
33
34
35