1; RUN: llc -mtriple=arm64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s
2
3; REQUIRES: asserts
4
5; CHECK-LABEL: Pass Arguments:
6; CHECK-NEXT: Target Library Information
7; CHECK-NEXT: Target Pass Configuration
8; CHECK-NEXT: Machine Module Information
9; CHECK-NEXT: Target Transform Information
10; CHECK-NEXT: Type-Based Alias Analysis
11; CHECK-NEXT: Scoped NoAlias Alias Analysis
12; CHECK-NEXT: Assumption Cache Tracker
13; CHECK-NEXT: Create Garbage Collector Module Metadata
14; CHECK-NEXT: Machine Branch Probability Analysis
15; CHECK-NEXT:   ModulePass Manager
16; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
17; CHECK-NEXT:     FunctionPass Manager
18; CHECK-NEXT:       Expand Atomic instructions
19; CHECK-NEXT:       Dominator Tree Construction
20; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
21; CHECK-NEXT:       Module Verifier
22; CHECK-NEXT:       Lower Garbage Collection Instructions
23; CHECK-NEXT:       Shadow Stack GC Lowering
24; CHECK-NEXT:       Remove unreachable blocks from the CFG
25; CHECK-NEXT:       Instrument function entry/exit with calls to e.g. mcount() (post inlining)
26; CHECK-NEXT:       Scalarize Masked Memory Intrinsics
27; CHECK-NEXT:       Expand reduction intrinsics
28; CHECK-NEXT:     Rewrite Symbols
29; CHECK-NEXT:     FunctionPass Manager
30; CHECK-NEXT:       Dominator Tree Construction
31; CHECK-NEXT:       Exception handling preparation
32; CHECK-NEXT:       Safe Stack instrumentation pass
33; CHECK-NEXT:       Insert stack protectors
34; CHECK-NEXT:       Module Verifier
35; CHECK-NEXT:       IRTranslator
36; CHECK-NEXT:       Legalizer
37; CHECK-NEXT:       RegBankSelect
38; CHECK-NEXT:       Localizer
39; CHECK-NEXT:       InstructionSelect
40; CHECK-NEXT:       ResetMachineFunction
41; CHECK-NEXT:       AArch64 Instruction Selection
42; CHECK-NEXT:       Expand ISel Pseudo-instructions
43; CHECK-NEXT:       Local Stack Slot Allocation
44; CHECK-NEXT:       Eliminate PHI nodes for register allocation
45; CHECK-NEXT:       Two-Address instruction pass
46; CHECK-NEXT:       Fast Register Allocator
47; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
48; CHECK-NEXT:       Machine Optimization Remark Emitter
49; CHECK-NEXT:       Prologue/Epilogue Insertion & Frame Finalization
50; CHECK-NEXT:       Post-RA pseudo instruction expansion pass
51; CHECK-NEXT:       AArch64 pseudo instruction expansion pass
52; CHECK-NEXT:       Analyze Machine Code For Garbage Collection
53; CHECK-NEXT:       Branch relaxation pass
54; CHECK-NEXT:       Contiguously Lay Out Funclets
55; CHECK-NEXT:       StackMap Liveness Analysis
56; CHECK-NEXT:       Live DEBUG_VALUE analysis
57; CHECK-NEXT:       Insert fentry calls
58; CHECK-NEXT:       Insert XRay ops
59; CHECK-NEXT:       Implement the 'patchable-function' attribute
60; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
61; CHECK-NEXT:       Machine Optimization Remark Emitter
62; CHECK-NEXT:       AArch64 Assembly Printer
63; CHECK-NEXT:       Free MachineFunction
64
65define void @f() {
66  ret void
67}
68