1; RUN: llc -mtriple=arm64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s 2 3; REQUIRES: asserts 4 5; CHECK-LABEL: Pass Arguments: 6; CHECK-NEXT: Target Library Information 7; CHECK-NEXT: Target Pass Configuration 8; CHECK-NEXT: Machine Module Information 9; CHECK-NEXT: Target Transform Information 10; CHECK-NEXT: Assumption Cache Tracker 11; CHECK-NEXT: Type-Based Alias Analysis 12; CHECK-NEXT: Scoped NoAlias Alias Analysis 13; CHECK-NEXT: Create Garbage Collector Module Metadata 14; CHECK-NEXT: Profile summary info 15; CHECK-NEXT: Machine Branch Probability Analysis 16; CHECK-NEXT: ModulePass Manager 17; CHECK-NEXT: Pre-ISel Intrinsic Lowering 18; CHECK-NEXT: FunctionPass Manager 19; CHECK-NEXT: Expand Atomic instructions 20; CHECK-NEXT: Simplify the CFG 21; CHECK-NEXT: Dominator Tree Construction 22; CHECK-NEXT: Natural Loop Information 23; CHECK-NEXT: Lazy Branch Probability Analysis 24; CHECK-NEXT: Lazy Block Frequency Analysis 25; CHECK-NEXT: Optimization Remark Emitter 26; CHECK-NEXT: Scalar Evolution Analysis 27; CHECK-NEXT: Loop Data Prefetch 28; CHECK-NEXT: Falkor HW Prefetch Fix 29; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) 30; CHECK-NEXT: Module Verifier 31; CHECK-NEXT: Canonicalize natural loops 32; CHECK-NEXT: Loop Pass Manager 33; CHECK-NEXT: Induction Variable Users 34; CHECK-NEXT: Loop Strength Reduction 35; CHECK-NEXT: Merge contiguous icmps into a memcmp 36; CHECK-NEXT: Expand memcmp() to load/stores 37; CHECK-NEXT: Lower Garbage Collection Instructions 38; CHECK-NEXT: Shadow Stack GC Lowering 39; CHECK-NEXT: Remove unreachable blocks from the CFG 40; CHECK-NEXT: Dominator Tree Construction 41; CHECK-NEXT: Natural Loop Information 42; CHECK-NEXT: Branch Probability Analysis 43; CHECK-NEXT: Block Frequency Analysis 44; CHECK-NEXT: Constant Hoisting 45; CHECK-NEXT: Partially inline calls to library functions 46; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining) 47; CHECK-NEXT: Scalarize Masked Memory Intrinsics 48; CHECK-NEXT: Expand reduction intrinsics 49; CHECK-NEXT: Dominator Tree Construction 50; CHECK-NEXT: Interleaved Access Pass 51; CHECK-NEXT: Natural Loop Information 52; CHECK-NEXT: CodeGen Prepare 53; CHECK-NEXT: Rewrite Symbols 54; CHECK-NEXT: FunctionPass Manager 55; CHECK-NEXT: Dominator Tree Construction 56; CHECK-NEXT: Exception handling preparation 57; CHECK-NEXT: AArch64 Promote Constant 58; CHECK-NEXT: Unnamed pass: implement Pass::getPassName() 59; CHECK-NEXT: FunctionPass Manager 60; CHECK-NEXT: Merge internal globals 61; CHECK-NEXT: Safe Stack instrumentation pass 62; CHECK-NEXT: Insert stack protectors 63; CHECK-NEXT: Module Verifier 64; CHECK-NEXT: Dominator Tree Construction 65; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) 66; CHECK-NEXT: Function Alias Analysis Results 67; CHECK-NEXT: Natural Loop Information 68; CHECK-NEXT: Branch Probability Analysis 69; CHECK-NEXT: AArch64 Instruction Selection 70; CHECK-NEXT: MachineDominator Tree Construction 71; CHECK-NEXT: AArch64 Local Dynamic TLS Access Clean-up 72; CHECK-NEXT: Expand ISel Pseudo-instructions 73; CHECK-NEXT: Early Tail Duplication 74; CHECK-NEXT: Optimize machine instruction PHIs 75; CHECK-NEXT: Slot index numbering 76; CHECK-NEXT: Merge disjoint stack slots 77; CHECK-NEXT: Local Stack Slot Allocation 78; CHECK-NEXT: Remove dead machine instructions 79; CHECK-NEXT: MachineDominator Tree Construction 80; CHECK-NEXT: AArch64 Condition Optimizer 81; CHECK-NEXT: Machine Natural Loop Construction 82; CHECK-NEXT: Machine Trace Metrics 83; CHECK-NEXT: AArch64 Conditional Compares 84; CHECK-NEXT: Machine InstCombiner 85; CHECK-NEXT: AArch64 Conditional Branch Tuning 86; CHECK-NEXT: Machine Trace Metrics 87; CHECK-NEXT: Early If-Conversion 88; CHECK-NEXT: AArch64 Store Pair Suppression 89; CHECK-NEXT: AArch64 SIMD instructions optimization pass 90; CHECK-NEXT: MachineDominator Tree Construction 91; CHECK-NEXT: Machine Natural Loop Construction 92; CHECK-NEXT: Early Machine Loop Invariant Code Motion 93; CHECK-NEXT: Machine Common Subexpression Elimination 94; CHECK-NEXT: MachinePostDominator Tree Construction 95; CHECK-NEXT: Machine Block Frequency Analysis 96; CHECK-NEXT: Machine code sinking 97; CHECK-NEXT: Peephole Optimizations 98; CHECK-NEXT: Remove dead machine instructions 99; CHECK-NEXT: AArch64 Dead register definitions 100; CHECK-NEXT: Detect Dead Lanes 101; CHECK-NEXT: Process Implicit Definitions 102; CHECK-NEXT: Remove unreachable machine basic blocks 103; CHECK-NEXT: Live Variable Analysis 104; CHECK-NEXT: Eliminate PHI nodes for register allocation 105; CHECK-NEXT: Two-Address instruction pass 106; CHECK-NEXT: Slot index numbering 107; CHECK-NEXT: Live Interval Analysis 108; CHECK-NEXT: Simple Register Coalescing 109; CHECK-NEXT: Rename Disconnected Subregister Components 110; CHECK-NEXT: Machine Instruction Scheduler 111; CHECK-NEXT: Machine Block Frequency Analysis 112; CHECK-NEXT: Debug Variable Analysis 113; CHECK-NEXT: Live Stack Slot Analysis 114; CHECK-NEXT: Virtual Register Map 115; CHECK-NEXT: Live Register Matrix 116; CHECK-NEXT: Bundle Machine CFG Edges 117; CHECK-NEXT: Spill Code Placement Analysis 118; CHECK-NEXT: Lazy Machine Block Frequency Analysis 119; CHECK-NEXT: Machine Optimization Remark Emitter 120; CHECK-NEXT: Greedy Register Allocator 121; CHECK-NEXT: Virtual Register Rewriter 122; CHECK-NEXT: Stack Slot Coloring 123; CHECK-NEXT: Machine Copy Propagation Pass 124; CHECK-NEXT: Machine Loop Invariant Code Motion 125; CHECK-NEXT: AArch64 Redundant Copy Elimination 126; CHECK-NEXT: A57 FP Anti-dependency breaker 127; CHECK-NEXT: PostRA Machine Sink 128; CHECK-NEXT: MachineDominator Tree Construction 129; CHECK-NEXT: Machine Natural Loop Construction 130; CHECK-NEXT: Machine Block Frequency Analysis 131; CHECK-NEXT: MachinePostDominator Tree Construction 132; CHECK-NEXT: Lazy Machine Block Frequency Analysis 133; CHECK-NEXT: Machine Optimization Remark Emitter 134; CHECK-NEXT: Shrink Wrapping analysis 135; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization 136; CHECK-NEXT: Control Flow Optimizer 137; CHECK-NEXT: Tail Duplication 138; CHECK-NEXT: Machine Copy Propagation Pass 139; CHECK-NEXT: Post-RA pseudo instruction expansion pass 140; CHECK-NEXT: AArch64 pseudo instruction expansion pass 141; CHECK-NEXT: AArch64 load / store optimization pass 142; CHECK-NEXT: MachineDominator Tree Construction 143; CHECK-NEXT: Machine Natural Loop Construction 144; CHECK-NEXT: Falkor HW Prefetch Fix Late Phase 145; CHECK-NEXT: PostRA Machine Instruction Scheduler 146; CHECK-NEXT: Analyze Machine Code For Garbage Collection 147; CHECK-NEXT: Machine Block Frequency Analysis 148; CHECK-NEXT: MachinePostDominator Tree Construction 149; CHECK-NEXT: Branch Probability Basic Block Placement 150; CHECK-NEXT: Branch relaxation pass 151; CHECK-NEXT: Contiguously Lay Out Funclets 152; CHECK-NEXT: StackMap Liveness Analysis 153; CHECK-NEXT: Live DEBUG_VALUE analysis 154; CHECK-NEXT: Insert fentry calls 155; CHECK-NEXT: Insert XRay ops 156; CHECK-NEXT: Implement the 'patchable-function' attribute 157; CHECK-NEXT: Machine Outliner 158; CHECK-NEXT: FunctionPass Manager 159; CHECK-NEXT: Lazy Machine Block Frequency Analysis 160; CHECK-NEXT: Machine Optimization Remark Emitter 161; CHECK-NEXT: AArch64 Assembly Printer 162; CHECK-NEXT: Free MachineFunction 163; CHECK-NEXT: Pass Arguments: -domtree 164; CHECK-NEXT: FunctionPass Manager 165; CHECK-NEXT: Dominator Tree Construction 166 167define void @f() { 168 ret void 169} 170