1; RUN: llc -fast-isel-sink-local-values -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s 2; RUN: llc -fast-isel-sink-local-values -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -fast-isel < %s | FileCheck %s --check-prefix=FAST 3; RUN: llc -fast-isel-sink-local-values -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -filetype=obj -o %t %s 4; RUN: llvm-objdump -triple arm64-apple-darwin -d %t | FileCheck %s --check-prefix CHECK-ENCODING 5 6; CHECK-ENCODING-NOT: <unknown> 7; CHECK-ENCODING: mov x16, #281470681743360 8; CHECK-ENCODING: movk x16, #57005, lsl #16 9; CHECK-ENCODING: movk x16, #48879 10 11; One argument will be passed in register, the other will be pushed on the stack. 12; Return value in x0. 13define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { 14entry: 15; CHECK-LABEL: jscall_patchpoint_codegen: 16; CHECK: str x{{.+}}, [sp] 17; CHECK-NEXT: mov x0, x{{.+}} 18; CHECK: Ltmp 19; CHECK-NEXT: mov x16, #281470681743360 20; CHECK: movk x16, #57005, lsl #16 21; CHECK: movk x16, #48879 22; CHECK-NEXT: blr x16 23; FAST-LABEL: jscall_patchpoint_codegen: 24; FAST: str x{{.+}}, [sp] 25; FAST: Ltmp 26; FAST-NEXT: mov x16, #281470681743360 27; FAST-NEXT: movk x16, #57005, lsl #16 28; FAST-NEXT: movk x16, #48879 29; FAST-NEXT: blr x16 30 %resolveCall2 = inttoptr i64 281474417671919 to i8* 31 %result = tail call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* %resolveCall2, i32 2, i64 %p4, i64 %p2) 32 %resolveCall3 = inttoptr i64 244837814038255 to i8* 33 tail call webkit_jscc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 20, i8* %resolveCall3, i32 2, i64 %p4, i64 %result) 34 ret void 35} 36 37; Test if the arguments are properly aligned and that we don't store undef arguments. 38define i64 @jscall_patchpoint_codegen2(i64 %callee) { 39entry: 40; CHECK-LABEL: jscall_patchpoint_codegen2: 41; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6 42; CHECK-NEXT: str x[[REG]], [sp, #24] 43; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4 44; CHECK-NEXT: str w[[REG]], [sp, #16] 45; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2 46; CHECK-NEXT: str x[[REG]], [sp] 47; CHECK: Ltmp 48; CHECK-NEXT: mov x16, #281470681743360 49; CHECK-NEXT: movk x16, #57005, lsl #16 50; CHECK-NEXT: movk x16, #48879 51; CHECK-NEXT: blr x16 52; FAST-LABEL: jscall_patchpoint_codegen2: 53; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2 54; FAST-NEXT: str [[REG1]], [sp] 55; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4 56; FAST-NEXT: str [[REG2]], [sp, #16] 57; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6 58; FAST-NEXT: str [[REG3]], [sp, #24] 59; FAST: Ltmp 60; FAST-NEXT: mov x16, #281470681743360 61; FAST-NEXT: movk x16, #57005, lsl #16 62; FAST-NEXT: movk x16, #48879 63; FAST-NEXT: blr x16 64 %call = inttoptr i64 281474417671919 to i8* 65 %result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 6, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6) 66 ret i64 %result 67} 68 69; Test if the arguments are properly aligned and that we don't store undef arguments. 70define i64 @jscall_patchpoint_codegen3(i64 %callee) { 71entry: 72; CHECK-LABEL: jscall_patchpoint_codegen3: 73; CHECK: mov w[[REG:[0-9]+]], #10 74; CHECK-NEXT: str x[[REG]], [sp, #48] 75; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8 76; CHECK-NEXT: str w[[REG]], [sp, #36] 77; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x6 78; CHECK-NEXT: str x[[REG]], [sp, #24] 79; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4 80; CHECK-NEXT: str w[[REG]], [sp, #16] 81; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2 82; CHECK-NEXT: str x[[REG]], [sp] 83; CHECK: Ltmp 84; CHECK-NEXT: mov x16, #281470681743360 85; CHECK-NEXT: movk x16, #57005, lsl #16 86; CHECK-NEXT: movk x16, #48879 87; CHECK-NEXT: blr x16 88; FAST-LABEL: jscall_patchpoint_codegen3: 89; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2 90; FAST-NEXT: str [[REG1]], [sp] 91; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4 92; FAST-NEXT: str [[REG2]], [sp, #16] 93; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6 94; FAST-NEXT: str [[REG3]], [sp, #24] 95; FAST-NEXT: orr [[REG4:w[0-9]+]], wzr, #0x8 96; FAST-NEXT: str [[REG4]], [sp, #36] 97; FAST-NEXT: mov [[REG5:x[0-9]+]], #10 98; FAST-NEXT: str [[REG5]], [sp, #48] 99; FAST: Ltmp 100; FAST-NEXT: mov x16, #281470681743360 101; FAST-NEXT: movk x16, #57005, lsl #16 102; FAST-NEXT: movk x16, #48879 103; FAST-NEXT: blr x16 104 %call = inttoptr i64 281474417671919 to i8* 105 %result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 10, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6, i32 undef, i32 8, i32 undef, i64 10) 106 ret i64 %result 107} 108 109; CHECK-LABEL: test_i16: 110; CHECK: ldrh [[BREG:w[0-9]+]], [sp] 111; CHECK: add {{w[0-9]+}}, w0, [[BREG]] 112define webkit_jscc zeroext i16 @test_i16(i16 zeroext %a, i16 zeroext %b) { 113 %sum = add i16 %a, %b 114 ret i16 %sum 115} 116 117declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...) 118declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...) 119