1; RUN: llc -mtriple=arm64-apple-ios < %s | FileCheck %s
2
3define i64 @sbfiz64(i64 %v) {
4; CHECK-LABEL: sbfiz64:
5; CHECK: sbfiz	x0, x0, #1, #16
6  %shl = shl i64 %v, 48
7  %shr = ashr i64 %shl, 47
8  ret i64 %shr
9}
10
11define i32 @sbfiz32(i32 %v) {
12; CHECK-LABEL: sbfiz32:
13; CHECK: sbfiz	w0, w0, #1, #14
14  %shl = shl i32 %v, 18
15  %shr = ashr i32 %shl, 17
16  ret i32 %shr
17}
18
19define i64 @ubfiz64(i64 %v) {
20; CHECK-LABEL: ubfiz64:
21; CHECK: ubfiz	x0, x0, #36, #11
22  %shl = shl i64 %v, 53
23  %shr = lshr i64 %shl, 17
24  ret i64 %shr
25}
26
27define i32 @ubfiz32(i32 %v) {
28; CHECK-LABEL: ubfiz32:
29; CHECK: ubfiz	w0, w0, #6, #24
30  %shl = shl i32 %v, 8
31  %shr = lshr i32 %shl, 2
32  ret i32 %shr
33}
34
35define i64 @ubfiz64and(i64 %v) {
36; CHECK-LABEL: ubfiz64and:
37; CHECK: ubfiz	x0, x0, #36, #11
38  %shl = shl i64 %v, 36
39  %and = and i64 %shl, 140668768878592
40  ret i64 %and
41}
42
43define i32 @ubfiz32and(i32 %v) {
44; CHECK-LABEL: ubfiz32and:
45; CHECK: ubfiz	w0, w0, #6, #24
46  %shl = shl i32 %v, 6
47  %and = and i32 %shl, 1073741760
48  ret i32 %and
49}
50
51; Check that we don't generate a ubfiz if the lsl has more than one
52; use, since we'd just be replacing an and with a ubfiz.
53define i32 @noubfiz32(i32 %v) {
54; CHECK-LABEL: noubfiz32:
55; CHECK: lsl	w[[REG1:[0-9]+]], w0, #6
56; CHECK: and	w[[REG2:[0-9]+]], w[[REG1]], #0x3fffffc0
57; CHECK: add	w0, w[[REG1]], w[[REG2]]
58; CHECK: ret
59  %shl = shl i32 %v, 6
60  %and = and i32 %shl, 1073741760
61  %add = add i32 %shl, %and
62  ret i32 %add
63}
64