1# XFAIL: *
2# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
3
4# FIXME: This requires additional context for what input registers are special inputs not present in MIR.
5
6---
7
8name:            kernarg_segment_Ptr
9legalized:       true
10regBankSelected: true
11
12body: |
13  bb.0:
14    %0:vgpr(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr)
15    %1:sgpr(s32) = G_LOAD %0 :: (load 4)
16    %2:vgpr(p1) = G_IMPLICIT_DEF
17    G_STORE %1, %2 :: (store 4)
18...
19---
20