1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s | FileCheck %s
3
4---
5name: test_merge_s32_s32_s64
6body: |
7  bb.0:
8    ; CHECK-LABEL: name: test_merge_s32_s32_s64
9    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
10    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
11    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C1]](s32)
12    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
13    %0:_(s32) = G_CONSTANT i32 0
14    %1:_(s32) = G_CONSTANT i32 1
15    %2:_(s64) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
16    $vgpr0_vgpr1 = COPY %2(s64)
17...
18
19---
20name: test_merge_s32_s32_v2s32
21body: |
22  bb.0:
23    ; CHECK-LABEL: name: test_merge_s32_s32_v2s32
24    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
25    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
26    ; CHECK: [[MV:%[0-9]+]]:_(<2 x s32>) = G_MERGE_VALUES [[C]](s32), [[C1]](s32)
27    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](<2 x s32>)
28    %0:_(s32) = G_CONSTANT i32 0
29    %1:_(s32) = G_CONSTANT i32 1
30    %2:_(<2 x s32>) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
31    $vgpr0_vgpr1 = COPY %2(<2 x s32>)
32...
33
34---
35name: test_merge_s32_s32_s32_v3s32
36body: |
37  bb.0:
38    ; CHECK-LABEL: name: test_merge_s32_s32_s32_v3s32
39    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
40    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
41    ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
42    ; CHECK: [[MV:%[0-9]+]]:_(<3 x s32>) = G_MERGE_VALUES [[C]](s32), [[C1]](s32), [[C2]](s32)
43    ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](<3 x s32>)
44    %0:_(s32) = G_CONSTANT i32 0
45    %1:_(s32) = G_CONSTANT i32 1
46    %2:_(s32) = G_CONSTANT i32 2
47    %3:_(<3 x s32>) = G_MERGE_VALUES %0:_(s32), %1:_(s32), %2:_(s32)
48    $vgpr0_vgpr1_vgpr2 = COPY %3(<3 x s32>)
49...
50
51---
52name: test_merge_s64_s64_s128
53body: |
54  bb.0:
55    ; CHECK-LABEL: name: test_merge_s64_s64_s128
56    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
57    ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
58    ; CHECK: [[MV:%[0-9]+]]:_(<2 x s64>) = G_MERGE_VALUES [[C]](s64), [[C1]](s64)
59    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](<2 x s64>)
60    %0:_(s64) = G_CONSTANT i64 0
61    %1:_(s64) = G_CONSTANT i64 1
62    %2:_(<2 x s64>) = G_MERGE_VALUES %0(s64), %1(s64)
63    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2(<2 x s64>)
64...
65
66---
67name: test_merge_s64_s64_s64_s64_v4s64
68body: |
69  bb.0:
70    ; CHECK-LABEL: name: test_merge_s64_s64_s64_s64_v4s64
71    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
72    ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
73    ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
74    ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
75    ; CHECK: [[MV:%[0-9]+]]:_(<4 x s64>) = G_MERGE_VALUES [[C]](s64), [[C1]](s64), [[C2]](s64), [[C3]](s64)
76    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[MV]](<4 x s64>)
77    %0:_(s64) = G_CONSTANT i64 0
78    %1:_(s64) = G_CONSTANT i64 1
79    %2:_(s64) = G_CONSTANT i64 2
80    %3:_(s64) = G_CONSTANT i64 3
81    %4:_(<4 x s64>) = G_MERGE_VALUES %0(s64), %1(s64), %2(s64), %3(s64)
82    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %4(<4 x s64>)
83...
84
85# FIXME: Should be split up
86# ---
87# name: test_merge_17_x_i32
88# body: |
89#   bb.0:
90#     %0:_(s32) = G_CONSTANT i32 0
91#     %1:_(s32) = G_CONSTANT i32 1
92#     %2:_(s32) = G_CONSTANT i32 2
93#     %3:_(s32) = G_CONSTANT i32 3
94
95#     %4:_(s32) = G_CONSTANT i32 4
96#     %5:_(s32) = G_CONSTANT i32 5
97#     %6:_(s32) = G_CONSTANT i32 6
98#     %7:_(s32) = G_CONSTANT i32 7
99
100#     %8:_(s32) = G_CONSTANT i32 8
101#     %9:_(s32) = G_CONSTANT i32 9
102#     %10:_(s32) = G_CONSTANT i32 10
103#     %11:_(s32) = G_CONSTANT i32 11
104
105#     %12:_(s32) = G_CONSTANT i32 12
106#     %13:_(s32) = G_CONSTANT i32 13
107#     %14:_(s32) = G_CONSTANT i32 14
108#     %15:_(s32) = G_CONSTANT i32 15
109
110#     %16:_(s32) = G_CONSTANT i32 16
111
112#     %17:_(<17 x s32>) = G_MERGE_VALUES %0:_(s32), %1:_(s32), %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32), %6:_(s32), %7:_(s32), %8:_(s32), %9:_(s32), %10:_(s32), %11:_(s32), %12:_(s32), %13:_(s32), %14:_(s32), %15:_(s32), %16:_(s32)
113#     S_ENDPGM implicit %17(<17 x s32>)
114# ...
115