1; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
3
4; GCN-LABEL: {{^}}mbcnt_intrinsics:
5; GCN: v_mbcnt_lo_u32_b32{{(_e64)*}} [[LO:v[0-9]+]], -1, 0
6; SI: v_mbcnt_hi_u32_b32_e32 {{v[0-9]+}}, -1, [[LO]]
7; VI: v_mbcnt_hi_u32_b32 {{v[0-9]+}}, -1, [[LO]]
8define amdgpu_ps void @mbcnt_intrinsics(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, i32 inreg %arg3) {
9main_body:
10  %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
11  %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo) #0
12  %tmp = bitcast i32 %hi to float
13  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp, float %tmp, float %tmp, float %tmp, i1 true, i1 true) #1
14  ret void
15}
16
17; GCN-LABEL: {{^}}mbcnt_lo_known_bits:
18; GCN: v_mbcnt_lo_u32_b32
19; GCN-NOT: and
20define i32 @mbcnt_lo_known_bits(i32 %x, i32 %y) #0 {
21  %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 %y)
22  %mask = and i32 %lo, 63
23  ret i32 %mask
24}
25
26; GCN-LABEL: {{^}}mbcnt_hi_known_bits:
27; GCN: v_mbcnt_hi_u32_b32
28; GCN-NOT: and
29define i32 @mbcnt_hi_known_bits(i32 %x, i32 %y) #0 {
30  %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 %y)
31  %mask = and i32 %hi, 63
32  ret i32 %mask
33}
34
35declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
36declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
37declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
38
39attributes #0 = { nounwind readnone }
40attributes #1 = { nounwind }
41