1; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s
2
3; CHECK-LABEL: @test1
4; CHECK:  %mac1{{\.}}026 = phi i32 [ [[V8:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]
5; CHECK:  [[V4:%[0-9]+]] = bitcast i16* %arrayidx3 to i32*
6; CHECK:  [[V5:%[0-9]+]] = load i32, i32* [[V4]], align 2
7; CHECK:  [[V6:%[0-9]+]] = bitcast i16* %arrayidx to i32*
8; CHECK:  [[V7:%[0-9]+]] = load i32, i32* [[V6]], align 2
9; CHECK:  [[V8]] = call i32 @llvm.arm.smlad(i32 [[V5]], i32 [[V7]], i32 %mac1{{\.}}026)
10
11define dso_local i32 @test1(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
12entry:
13  %cmp24 = icmp sgt i32 %arg, 0
14  br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
15
16for.body.preheader:
17  %.pre = load i16, i16* %arg3, align 2
18  %.pre27 = load i16, i16* %arg2, align 2
19  br label %for.body
20
21for.cond.cleanup:
22  %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]
23  ret i32 %mac1.0.lcssa
24
25for.body:
26  %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]
27  %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
28  %arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.025
29  %0 = load i16, i16* %arrayidx, align 2
30  %add = add nuw nsw i32 %i.025, 1
31  %arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
32  %1 = load i16, i16* %arrayidx1, align 2
33  %arrayidx3 = getelementptr inbounds i16, i16* %arg2, i32 %i.025
34  %2 = load i16, i16* %arrayidx3, align 2
35  %conv = sext i16 %2 to i32
36  %conv4 = sext i16 %0 to i32
37  %mul = mul nsw i32 %conv, %conv4
38  %arrayidx6 = getelementptr inbounds i16, i16* %arg2, i32 %add
39  %3 = load i16, i16* %arrayidx6, align 2
40  %conv7 = sext i16 %3 to i32
41  %conv8 = sext i16 %1 to i32
42  %mul9 = mul nsw i32 %conv7, %conv8
43  %add10 = add i32 %mul, %mac1.026
44
45; And here the Add is the LHS, the Mul the RHS
46  %add11 = add i32 %add10, %mul9
47
48  %exitcond = icmp ne i32 %add, %arg
49  br i1 %exitcond, label %for.body, label %for.cond.cleanup
50}
51
52; Here we have i8 loads, which we do want to support, but don't handle yet.
53;
54; CHECK-LABEL: @test2
55; CHECK-NOT:   call i32 @llvm.arm.smlad
56;
57define dso_local i32 @test2(i32 %arg, i32* nocapture readnone %arg1, i8* nocapture readonly %arg2, i8* nocapture readonly %arg3) {
58entry:
59  %cmp24 = icmp sgt i32 %arg, 0
60  br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
61
62for.body.preheader:
63  %.pre = load i8, i8* %arg3, align 2
64  %.pre27 = load i8, i8* %arg2, align 2
65  br label %for.body
66
67for.cond.cleanup:
68  %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]
69  ret i32 %mac1.0.lcssa
70
71for.body:
72  %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]
73  %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
74  %arrayidx = getelementptr inbounds i8, i8* %arg3, i32 %i.025
75  %0 = load i8, i8* %arrayidx, align 2
76  %add = add nuw nsw i32 %i.025, 1
77  %arrayidx1 = getelementptr inbounds i8, i8* %arg3, i32 %add
78  %1 = load i8, i8* %arrayidx1, align 2
79  %arrayidx3 = getelementptr inbounds i8, i8* %arg2, i32 %i.025
80  %2 = load i8, i8* %arrayidx3, align 2
81  %conv = sext i8 %2 to i32
82  %conv4 = sext i8 %0 to i32
83  %mul = mul nsw i32 %conv, %conv4
84  %arrayidx6 = getelementptr inbounds i8, i8* %arg2, i32 %add
85  %3 = load i8, i8* %arrayidx6, align 2
86  %conv7 = sext i8 %3 to i32
87  %conv8 = sext i8 %1 to i32
88  %mul9 = mul nsw i32 %conv7, %conv8
89  %add10 = add i32 %mul, %mac1.026
90  %add11 = add i32 %add10, %mul9
91  %exitcond = icmp ne i32 %add, %arg
92  br i1 %exitcond, label %for.body, label %for.cond.cleanup
93}
94
95
96