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1; RUN: llc < %s -O0
2; PR 1323
3
4	%struct.comp = type { i8*, i32, i8*, [3 x i8], i32 }
5
6define void @regbranch() {
7cond_next240.i:
8	br i1 false, label %cond_true251.i, label %cond_next272.i
9
10cond_true251.i:		; preds = %cond_next240.i
11	switch i8 0, label %cond_next272.i [
12		 i8 42, label %bb268.i
13		 i8 43, label %bb268.i
14		 i8 63, label %bb268.i
15	]
16
17bb268.i:		; preds = %cond_true251.i, %cond_true251.i, %cond_true251.i
18	br label %cond_next272.i
19
20cond_next272.i:		; preds = %bb268.i, %cond_true251.i, %cond_next240.i
21	%len.2.i = phi i32 [ 0, %bb268.i ], [ 0, %cond_next240.i ], [ 0, %cond_true251.i ]		; <i32> [#uses=1]
22	%tmp278.i = icmp eq i32 %len.2.i, 1		; <i1> [#uses=0]
23	ret void
24}
25