• Home
  • History
  • Annotate
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s
2
3; Test uses 32-bit registers which aren't supported on AVR.
4; XFAIL: avr
5
6@G = common global i32 0, align 4
7
8define i32 @foo(i8* %p) nounwind uwtable {
9entry:
10  %p.addr = alloca i8*, align 8
11  %rv = alloca i32, align 4
12  store i8* %p, i8** %p.addr, align 8
13  store i32 0, i32* @G, align 4
14  %0 = load i8*, i8** %p.addr, align 8
15; CHECK: blah
16  %1 = call i32 asm "blah", "=r,r,~{memory}"(i8* %0) nounwind
17; CHECK: @G
18  store i32 %1, i32* %rv, align 4
19  %2 = load i32, i32* %rv, align 4
20  %3 = load i32, i32* @G, align 4
21  %add = add nsw i32 %2, %3
22  ret i32 %add
23}
24
25