1; RUN: llc -march=hexagon -enable-pipeliner -pipeliner-max-stages=2 < %s | FileCheck %s
2
3; Check that the pipelined code uses the proper address in the
4; prolog and the kernel. The bug occurs when the address computation
5; computes the same value twice.
6
7; CHECK: = addasl(r{{[0-9]+}},[[REG0:(r[0-9]+)]],#1)
8; CHECK-NOT: = addasl(r{{[0-9]+}},[[REG0]],#1)
9
10; Function Attrs: nounwind
11define void @f0(i32 %a0, i16* nocapture %a1) #0 {
12b0:
13  br i1 undef, label %b2, label %b1
14
15b1:                                               ; preds = %b0
16  unreachable
17
18b2:                                               ; preds = %b0
19  br label %b3
20
21b3:                                               ; preds = %b4, %b2
22  br i1 undef, label %b4, label %b5
23
24b4:                                               ; preds = %b3
25  br label %b3
26
27b5:                                               ; preds = %b3
28  br i1 undef, label %b6, label %b7
29
30b6:                                               ; preds = %b5
31  unreachable
32
33b7:                                               ; preds = %b5
34  br i1 undef, label %b8, label %b12
35
36b8:                                               ; preds = %b7
37  br i1 undef, label %b9, label %b11
38
39b9:                                               ; preds = %b9, %b8
40  br i1 undef, label %b9, label %b10
41
42b10:                                              ; preds = %b9
43  br i1 undef, label %b12, label %b11
44
45b11:                                              ; preds = %b11, %b10, %b8
46  %v0 = phi i32 [ %v6, %b11 ], [ undef, %b8 ], [ undef, %b10 ]
47  %v1 = phi i32 [ %v0, %b11 ], [ %a0, %b8 ], [ undef, %b10 ]
48  %v2 = add nsw i32 %v1, -2
49  %v3 = getelementptr inbounds i16, i16* %a1, i32 %v2
50  %v4 = load i16, i16* %v3, align 2, !tbaa !0
51  %v5 = getelementptr inbounds i16, i16* %a1, i32 %v0
52  store i16 %v4, i16* %v5, align 2, !tbaa !0
53  %v6 = add nsw i32 %v0, -1
54  %v7 = icmp sgt i32 %v6, 0
55  br i1 %v7, label %b11, label %b12
56
57b12:                                              ; preds = %b11, %b10, %b7
58  ret void
59}
60
61attributes #0 = { nounwind "target-cpu"="hexagonv55" }
62
63!0 = !{!1, !1, i64 0}
64!1 = !{!"short", !2}
65!2 = !{!"omnipotent char", !3}
66!3 = !{!"Simple C/C++ TBAA"}
67