1# RUN: llc -mtriple aarch64-- -run-pass instruction-select -simplify-mir \
2# RUN:     -verify-machineinstrs %s -o - | FileCheck %s
3#
4# RUN: llc -mtriple aarch64-- -global-isel=true -global-isel-abort=2 \
5# RUN:     -start-after=regbankselect -stop-before=expand-isel-pseudos \
6# RUN:     -simplify-mir -verify-machineinstrs %s -o - 2>&1 \
7# RUN:    | FileCheck %s --check-prefix=FALLBACK
8
9# Test that:
10# 1) MIRParser can deserialize FailedISel property.
11# 2) Machine Verifier respects FailedISel and doesn't complain needlessly.
12# 3) MIRPrinter is able to print FailedISel MIR after InstructionSelect pass.
13# 4) MIRPrinter can serialize FailedISel property.
14# 5) It's possible to start llc mid-GlobalISel pipeline from a MIR file with
15#    the FailedISel property set to true and watch it properly fallback to
16#    FastISel / SelectionDAG ISel.
17# 6) Resetting a MachineFunction resets unique MachineBasicBlock IDs as well.
18--- |
19  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
20  target triple = "aarch64--"
21
22  define i32 @test(i32 %a, i32 %b) #0 {
23  entry:
24    %add = add i32 %b, %a
25    ret i32 %add
26  }
27
28  attributes #0 = { nounwind readnone ssp }
29...
30---
31# CHECK-LABEL: name: test
32# CHECK: failedISel: true
33#
34# FALLBACK: warning: Instruction selection used fallback path for test
35# FALLBACK-LABEL: name: test
36# FALLBACK-NOT: failedISel
37name:            test
38alignment:       2
39legalized:       true
40regBankSelected: true
41failedISel:      true
42tracksRegLiveness: true
43body:             |
44  bb.0.entry:
45    liveins: $w0, $w1
46
47    ; CHECK: liveins: $w0, $w1
48    ;
49    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
50    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
51    ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY1]], [[COPY]]
52    ; CHECK: $w0 = COPY [[ADD]](s32)
53    ; CHECK: RET_ReallyLR implicit $w0
54    ;
55    ; FALLBACK: body: |
56    ; FALLBACK-NEXT: bb.0.entry:
57    ; FALLBACK-NEXT: liveins: $w0, $w1
58    ;
59    ; FALLBACK: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
60    ; FALLBACK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
61    ; FALLBACK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]
62    ; FALLBACK: $w0 = COPY [[ADDWrr]]
63    ; FALLBACK: RET_ReallyLR implicit $w0
64
65    %0:_(s32) = COPY $w0
66    %1:_(s32) = COPY $w1
67    %2:gpr(s32) = G_ADD %1, %0
68    $w0 = COPY %2(s32)
69    RET_ReallyLR implicit $w0
70...
71